Bug with fmv.w.x command

[ShadowCreator250]

I found another one :D

I have the Continuous Release version (currently at 46ab74d) installed and ran into issues with the fmv.w.x t0, f1 command that is translated to fmv.s.x t0, f1 by the assembler.

It appears that even though RARS validates the command as fmv.w.x <int register> <float register> and shows it as such in the Execute tab, it runs it as fmv.w.x <float register> <int register>. Which means even tho you input x11, f4, RARS executes it as x4, f11 (if you keep the registers in the order like it is with the current command).

Here is a program to reproduce this:

.data
float1: .float 3.5

.text
main:
# load float1 into a float register
flw fs0, float1, t0

# move float in float register to a0
fmv.x.w a0, fs0

call float_incr

# move float in a0 to a float register
fmv.w.x x10, f9 # fmv.w.x a0, fs1

# exit program
li a7, 10
ecall


# float_incr procedure: increments a float passed in a0 by 1 and returns the result in a0
.data
__fi_one: .float 1
.text
float_incr:
# move float in a0 to a float register
fmv.w.x x10, f0 # fmv.w.x a0, ft0 

flw ft1, __fi_one, t0

fadd.s ft0, ft0, f1

# move float in float register to a0
fmv.x.w a0, ft0

ret

You'll notice when running this that fs1 does not contain 4.5 like expected.

To counteract this weird behavior, I had to switch the register numbers like shown in this code:

.data
float1: .float 3.5

.text
main:
# load float1 into a float register
flw fs0, float1, t0

# move float in float register to a0
fmv.x.w a0, fs0

call float_incr

# move float in a0 to a float register
fmv.w.x x9, f10 # fmv.w.x s1, fa0

# exit program
li a7, 10
ecall


# float_incr procedure: increments a float passed in a0 by 1 and returns the result in a0
.data
__fi_one: .float 1
.text
float_incr:
# move float in a0 to a float register
fmv.w.x x0, f10 # fmv.w.x zero, fa0 

flw ft1, __fi_one, t0

fadd.s ft0, ft0, f1

# move float in float register to a0
fmv.x.w a0, ft0

ret

This code produces the expected result.

After each fmv.w.x command, I wrote a comment with what the register numbers would mean if they were translated to the register names.

[TheThirdOne]

The issue is with the definition of fmv.w.x. I made a typo that didn't treat the first digit as a floating point register.

rars/src/PseudoOps.txt

Lines 254 to 255 in dce53ad

	fmv.x.w t1, f1 ; fmv.x.s RG1, RG2 ;#Move float (New mnemonic): move bits representing a float to an integer register
	fmv.w.x t1, f1 ; fmv.s.x RG1, RG2 ;#Move float (New mnemonic): move bits representing a float from an integer register

It seems like the semantics is correct, but it makes a compiler error if you put the correct type of registers in. Should be an easy fix.

Thanks for finding this.

[TheThirdOne]

This should be fixed by f0c874c. The first argument of fmv.w.x should be a floating point register.