uninitialised signals in arithmetic

[dominicbeesley]

Hi,

Thanks for this great core

I've been using your core to validate my project in as a testbench in modelsim. I used to use the old TG68 but on upgrading to the new version I get thousands of warnings in modelsim like below [this is particularly bad in my project because the CPU is held in reset for ~250 us!]:

# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
#    Time: 28529424 ps  Iteration: 4  Instance: /sim_68000_tb/e_daughter/e_top/e_fb_mem

To avoid this I've added a load of initialisers (see https://github.com/dominicbeesley/blitter-vhdl-6502/blob/dev-68k/src/hdl/library/3rdparty/TG68/TG68K_ALU.vhd line 142). I'm not sure this is the right way to go about it though - I'm happy to continue doing this and make a pull request if you think it is the correct way of solving this problem

Thanks

D

[sorgelig]

simulators usually don't like signals without default values. Because simulators work with defined states only. In real use it usually doesn't matter.

[dominicbeesley]

Yes, I know. But I really want to use this as a test bench and having tabs of thousands of warnings at reset means it takes a very long time to run. The question is really do you have a need for the uninitialized values (either for testing or for synthesis). If not would you be willing to merge my changes so that TG68 can be used in Modelling etc

Thanks

D

[sorgelig]

initialization will require more logic.