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Final opcodes (#452)
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‎proposals/simd/BinarySIMD.md

Lines changed: 50 additions & 50 deletions
Original file line numberDiff line numberDiff line change
@@ -192,14 +192,14 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive).
192192
| `i64x2.add` | `0xce`| - |
193193
| `i64x2.sub` | `0xd1`| - |
194194
| `i64x2.mul` | `0xd5`| - |
195-
| `f32x4.ceil` | `0xd8`| - |
196-
| `f32x4.floor` | `0xd9`| - |
197-
| `f32x4.trunc` | `0xda`| - |
198-
| `f32x4.nearest` | `0xdb`| - |
199-
| `f64x2.ceil` | `0xdc`| - |
200-
| `f64x2.floor` | `0xdd`| - |
201-
| `f64x2.trunc` | `0xde`| - |
202-
| `f64x2.nearest` | `0xdf`| - |
195+
| `f32x4.ceil` | `0x67`| - |
196+
| `f32x4.floor` | `0x68`| - |
197+
| `f32x4.trunc` | `0x69`| - |
198+
| `f32x4.nearest` | `0x6a`| - |
199+
| `f64x2.ceil` | `0x74`| - |
200+
| `f64x2.floor` | `0x75`| - |
201+
| `f64x2.trunc` | `0x7a`| - |
202+
| `f64x2.nearest` | `0x94`| - |
203203
| `f32x4.abs` | `0xe0`| - |
204204
| `f32x4.neg` | `0xe1`| - |
205205
| `f32x4.sqrt` | `0xe3`| - |
@@ -226,45 +226,45 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive).
226226
| `i32x4.trunc_sat_f32x4_u` | `0xf9`| - |
227227
| `f32x4.convert_i32x4_s` | `0xfa`| - |
228228
| `f32x4.convert_i32x4_u` | `0xfb`| - |
229-
| `v128.load32_zero` | `0xfc`| - |
230-
| `v128.load64_zero` | `0xfd`| - |
231-
| `i16x8.extmul_low_i8x16_s` | `0x110`| - |
232-
| `i16x8.extmul_high_i8x16_s` | `0x111`| - |
233-
| `i16x8.extmul_low_i8x16_u` | `0x112`| - |
234-
| `i16x8.extmul_high_i8x16_u` | `0x113`| - |
235-
| `i32x4.extmul_low_i16x8_s` | `0x114`| - |
236-
| `i32x4.extmul_high_i16x8_s` | `0x115`| - |
237-
| `i32x4.extmul_low_i16x8_u` | `0x116`| - |
238-
| `i32x4.extmul_high_i16x8_u` | `0x117`| - |
239-
| `i64x2.extmul_low_i32x4_s` | `0x118`| - |
240-
| `i64x2.extmul_high_i32x4_s` | `0x119`| - |
241-
| `i64x2.extmul_low_i32x4_u` | `0x11a`| - |
242-
| `i64x2.extmul_high_i32x4_u` | `0x11b`| - |
243-
| `i16x8.q15mulr_sat_s` | `TBD`| - |
244-
| `v128.any_true` | `TBD`| - |
245-
| `v128.load8_lane` | `TBD`| m:memarg, i:ImmLaneIdx16 |
246-
| `v128.load16_lane` | `TBD`| m:memarg, i:ImmLaneIdx8 |
247-
| `v128.load32_lane` | `TBD`| m:memarg, i:ImmLaneIdx4 |
248-
| `v128.load64_lane` | `TBD`| m:memarg, i:ImmLaneIdx2 |
249-
| `v128.store8_lane` | `TBD`| m:memarg, i:ImmLaneIdx16 |
250-
| `v128.store16_lane` | `TBD`| m:memarg, i:ImmLaneIdx8 |
251-
| `v128.store32_lane` | `TBD`| m:memarg, i:ImmLaneIdx4 |
252-
| `v128.store64_lane` | `TBD`| m:memarg, i:ImmLaneIdx2 |
253-
| `i64x2.eq` | `TBD`| - |
254-
| `i64x2.ne` | `TBD`| - |
255-
| `i64x2.lt_s` | `TBD`| - |
256-
| `i64x2.gt_s` | `TBD`| - |
257-
| `i64x2.le_s` | `TBD`| - |
258-
| `i64x2.ge_s` | `TBD`| - |
259-
| `i64x2.all_true` | `TBD`| - |
260-
| `f64x2.convert_low_i32x4_s` | `TBD`| - |
261-
| `f64x2.convert_low_i32x4_u` | `TBD`| - |
262-
| `i32x4.trunc_sat_f64x2_s_zero` | `TBD`| - |
263-
| `i32x4.trunc_sat_f64x2_u_zero` | `TBD`| - |
264-
| `f32x4.demote_f64x2_zero` | `TBD`| - |
265-
| `f64x2.promote_low_f32x4` | `TBD`| - |
266-
| `i8x16.popcnt` | `TBD`| - |
267-
| `i16x8.extadd_pairwise_i8x16_s` | `TBD`| - |
268-
| `i16x8.extadd_pairwise_i8x16_u` | `TBD`| - |
269-
| `i32x4.extadd_pairwise_i16x8_s` | `TBD`| - |
270-
| `i32x4.extadd_pairwise_i16x8_u` | `TBD`| - |
229+
| `v128.load32_zero` | `0x5c`| - |
230+
| `v128.load64_zero` | `0x5d`| - |
231+
| `i16x8.extmul_low_i8x16_s` | `0x9c`| - |
232+
| `i16x8.extmul_high_i8x16_s` | `0x9d`| - |
233+
| `i16x8.extmul_low_i8x16_u` | `0x9e`| - |
234+
| `i16x8.extmul_high_i8x16_u` | `0x9f`| - |
235+
| `i32x4.extmul_low_i16x8_s` | `0xbc`| - |
236+
| `i32x4.extmul_high_i16x8_s` | `0xbd`| - |
237+
| `i32x4.extmul_low_i16x8_u` | `0xbe`| - |
238+
| `i32x4.extmul_high_i16x8_u` | `0xbf`| - |
239+
| `i64x2.extmul_low_i32x4_s` | `0xdc`| - |
240+
| `i64x2.extmul_high_i32x4_s` | `0xdd`| - |
241+
| `i64x2.extmul_low_i32x4_u` | `0xde`| - |
242+
| `i64x2.extmul_high_i32x4_u` | `0xdf`| - |
243+
| `i16x8.q15mulr_sat_s` | `0x82`| - |
244+
| `v128.any_true` | `0x53`| - |
245+
| `v128.load8_lane` | `0x54`| m:memarg, i:ImmLaneIdx16 |
246+
| `v128.load16_lane` | `0x55`| m:memarg, i:ImmLaneIdx8 |
247+
| `v128.load32_lane` | `0x56`| m:memarg, i:ImmLaneIdx4 |
248+
| `v128.load64_lane` | `0x57`| m:memarg, i:ImmLaneIdx2 |
249+
| `v128.store8_lane` | `0x58`| m:memarg, i:ImmLaneIdx16 |
250+
| `v128.store16_lane` | `0x59`| m:memarg, i:ImmLaneIdx8 |
251+
| `v128.store32_lane` | `0x5a`| m:memarg, i:ImmLaneIdx4 |
252+
| `v128.store64_lane` | `0x5b`| m:memarg, i:ImmLaneIdx2 |
253+
| `i64x2.eq` | `0xd6`| - |
254+
| `i64x2.ne` | `0xd7`| - |
255+
| `i64x2.lt_s` | `0xd8`| - |
256+
| `i64x2.gt_s` | `0xd9`| - |
257+
| `i64x2.le_s` | `0xda`| - |
258+
| `i64x2.ge_s` | `0xdb`| - |
259+
| `i64x2.all_true` | `0xc3`| - |
260+
| `f64x2.convert_low_i32x4_s` | `0xfe`| - |
261+
| `f64x2.convert_low_i32x4_u` | `0xff`| - |
262+
| `i32x4.trunc_sat_f64x2_s_zero` | `0xfc`| - |
263+
| `i32x4.trunc_sat_f64x2_u_zero` | `0xfd`| - |
264+
| `f32x4.demote_f64x2_zero` | `0x5e`| - |
265+
| `f64x2.promote_low_f32x4` | `0x5f`| - |
266+
| `i8x16.popcnt` | `0x62`| - |
267+
| `i16x8.extadd_pairwise_i8x16_s` | `0x7c`| - |
268+
| `i16x8.extadd_pairwise_i8x16_u` | `0x7d`| - |
269+
| `i32x4.extadd_pairwise_i16x8_s` | `0x7e`| - |
270+
| `i32x4.extadd_pairwise_i16x8_u` | `0x7f`| - |

‎proposals/simd/NewOpcodes.md

Lines changed: 63 additions & 38 deletions
Original file line numberDiff line numberDiff line change
@@ -12,8 +12,6 @@
1212
| v128.load32_splat | 0x09 |
1313
| v128.load64_splat | 0x0a |
1414
| v128.store | 0x0b |
15-
| v128.load32_zero | 0xfc |
16-
| v128.load64_zero | 0xfd |
1715

1816
| Basic operation | opcode |
1917
| ----------------| ------ |
@@ -77,37 +75,60 @@
7775
| v128.or | 0x50 |
7876
| v128.xor | 0x51 |
7977
| v128.bitselect | 0x52 |
78+
| v128.any_true | 0x53 |
8079

81-
| i8x16 Op | opcode | i16x8 Op | opcode | i32x4 Op | opcode | i64x2 Op | opcode |
82-
| -------------------- | ------ | ------------------------ | ------ | ------------------------ | ------ | ------------------------ | ------ |
83-
| i8x16.abs | 0x60 | i16x8.abs | 0x80 | i32x4.abs | 0xa0 | i64x2.abs | 0xc0 |
84-
| i8x16.neg | 0x61 | i16x8.neg | 0x81 | i32x4.neg | 0xa1 | i64x2.neg | 0xc1 |
85-
| ------------- | 0x62 | ------------- | 0x82 | ------------- | 0xa2 | ------------- | 0xc2 |
86-
| i8x16.all_true | 0x63 | i16x8.all_true | 0x83 | i32x4.all_true | 0xa3 | (i64x2.all_true) [TBD] | 0xc3 |
87-
| i8x16.bitmask | 0x64 | i16x8.bitmask | 0x84 | i32x4.bitmask | 0xa4 | i64x2.bitmask | 0xc4 |
88-
| i8x16.narrow_i16x8_s | 0x65 | i16x8.narrow_i32x4_s | 0x85 | ---- narrow ---- | 0xa5 | ------------- | 0xc5 |
89-
| i8x16.narrow_i16x8_u | 0x66 | i16x8.narrow_i32x4_u | 0x86 | ---- narrow ---- | 0xa6 | ------------- | 0xc6 |
90-
| ---- widen ---- | 0x67 | i16x8.widen_low_i8x16_s | 0x87 | i32x4.widen_low_i16x8_s | 0xa7 | i64x2.widen_low_i32x4_s | 0xc7 |
91-
| ---- widen ---- | 0x68 | i16x8.widen_high_i8x16_s | 0x88 | i32x4.widen_high_i16x8_s | 0xa8 | i64x2.widen_high_i32x4_s | 0xc8 |
92-
| ---- widen ---- | 0x69 | i16x8.widen_low_i8x16_u | 0x89 | i32x4.widen_low_i16x8_u | 0xa9 | i64x2.widen_low_i32x4_u | 0xc9 |
93-
| ---- widen ---- | 0x6a | i16x8.widen_high_i8x16_u | 0x8a | i32x4.widen_high_i16x8_u | 0xaa | i64x2.widen_high_i32x4_u | 0xca |
94-
| i8x16.shl | 0x6b | i16x8.shl | 0x8b | i32x4.shl | 0xab | i64x2.shl | 0xcb |
95-
| i8x16.shr_s | 0x6c | i16x8.shr_s | 0x8c | i32x4.shr_s | 0xac | i64x2.shr_s | 0xcc |
96-
| i8x16.shr_u | 0x6d | i16x8.shr_u | 0x8d | i32x4.shr_u | 0xad | i64x2.shr_u | 0xcd |
97-
| i8x16.add | 0x6e | i16x8.add | 0x8e | i32x4.add | 0xae | i64x2.add | 0xce |
98-
| i8x16.add_sat_s | 0x6f | i16x8.add_sat_s | 0x8f | ---- add_sat ---- | 0xaf | ------------- | 0xcf |
99-
| i8x16.add_sat_u | 0x70 | i16x8.add_sat_u | 0x90 | ---- add_sat ---- | 0xb0 | ------------- | 0xd0 |
100-
| i8x16.sub | 0x71 | i16x8.sub | 0x91 | i32x4.sub | 0xb1 | i64x2.sub | 0xd1 |
101-
| i8x16.sub_sat_s | 0x72 | i16x8.sub_sat_s | 0x92 | ---- sub_sat ---- | 0xb2 | ------------- | 0xd2 |
102-
| i8x16.sub_sat_u | 0x73 | i16x8.sub_sat_u | 0x93 | ---- sub_sat ---- | 0xb3 | ------------- | 0xd3 |
103-
| ------------- | 0x74 | ------------- | 0x94 | ------------- | 0xb4 | ------------- | 0xd4 |
104-
| ---- mul ---- | 0x75 | i16x8.mul | 0x95 | i32x4.mul | 0xb5 | i64x2.mul | 0xd5 |
105-
| i8x16.min_s | 0x76 | i16x8.min_s | 0x96 | i32x4.min_s | 0xb6 | ------------- | 0xd6 |
106-
| i8x16.min_u | 0x77 | i16x8.min_u | 0x97 | i32x4.min_u | 0xb7 | ------------- | 0xd7 |
107-
| i8x16.max_s | 0x78 | i16x8.max_s | 0x98 | i32x4.max_s | 0xb8 | ------------- | 0xd8 |
108-
| i8x16.max_u | 0x79 | i16x8.max_u | 0x99 | i32x4.max_u | 0xb9 | ------------- | 0xd9 |
109-
| ---------------- | 0x7a | ---------------- | 0x9a | i32x4.dot_i16x8_s | 0xba | ------------- | 0xda |
110-
| i8x16.avgr_u | 0x7b | i16x8.avgr_u | 0x9b | ---- avgr_u ---- | 0xbb | ------------- | 0xdb |
80+
| Load Lane Op | opcode |
81+
| ----------------- | ------ |
82+
| v128.load8_lane | 0x54 |
83+
| v128.load16_lane | 0x55 |
84+
| v128.load32_lane | 0x56 |
85+
| v128.load64_lane | 0x57 |
86+
| v128.store8_lane | 0x58 |
87+
| v128.store16_lane | 0x59 |
88+
| v128.store32_lane | 0x5a |
89+
| v128.store64_lane | 0x5b |
90+
| v128.load32_zero | 0x5c |
91+
| v128.load64_zero | 0x5d |
92+
93+
| Float conversion | opcode |
94+
| ----------------------- | ------ |
95+
| f32x4.demote_f64x2_zero | 0x5e |
96+
| f64x2.promote_low_f32x4 | 0x5f |
97+
98+
| i8x16 Op | opcode | i16x8 Op | opcode | i32x4 Op | opcode | i64x2 Op | opcode |
99+
| ----------------------------- | ------ | ------------------------- | ------ | ------------------------- | ------ | ------------------------- | ------ |
100+
| i8x16.abs | 0x60 | i16x8.abs | 0x80 | i32x4.abs | 0xa0 | i64x2.abs | 0xc0 |
101+
| i8x16.neg | 0x61 | i16x8.neg | 0x81 | i32x4.neg | 0xa1 | i64x2.neg | 0xc1 |
102+
| i8x16.popcnt | 0x62 | i16x8.q15mulr_sat_s | 0x82 | | 0xa2 | ------------- | 0xc2 |
103+
| i8x16.all_true | 0x63 | i16x8.all_true | 0x83 | i32x4.all_true | 0xa3 | i64x2.all_true | 0xc3 |
104+
| i8x16.bitmask | 0x64 | i16x8.bitmask | 0x84 | i32x4.bitmask | 0xa4 | i64x2.bitmask | 0xc4 |
105+
| i8x16.narrow_i16x8_s | 0x65 | i16x8.narrow_i32x4_s | 0x85 | ---- narrow ---- | 0xa5 | ------------- | 0xc5 |
106+
| i8x16.narrow_i16x8_u | 0x66 | i16x8.narrow_i32x4_u | 0x86 | ---- narrow ---- | 0xa6 | ------------- | 0xc6 |
107+
| f32x4.ceil | 0x67 | i16x8.widen_low_i8x16_s | 0x87 | i32x4.widen_low_i16x8_s | 0xa7 | i64x2.widen_low_i32x4_s | 0xc7 |
108+
| f32x4.floor | 0x68 | i16x8.widen_high_i8x16_s | 0x88 | i32x4.widen_high_i16x8_s | 0xa8 | i64x2.widen_high_i32x4_s | 0xc8 |
109+
| f32x4.trunc | 0x69 | i16x8.widen_low_i8x16_u | 0x89 | i32x4.widen_low_i16x8_u | 0xa9 | i64x2.widen_low_i32x4_u | 0xc9 |
110+
| f32x4.nearest | 0x6a | i16x8.widen_high_i8x16_u | 0x8a | i32x4.widen_high_i16x8_u | 0xaa | i64x2.widen_high_i32x4_u | 0xca |
111+
| i8x16.shl | 0x6b | i16x8.shl | 0x8b | i32x4.shl | 0xab | i64x2.shl | 0xcb |
112+
| i8x16.shr_s | 0x6c | i16x8.shr_s | 0x8c | i32x4.shr_s | 0xac | i64x2.shr_s | 0xcc |
113+
| i8x16.shr_u | 0x6d | i16x8.shr_u | 0x8d | i32x4.shr_u | 0xad | i64x2.shr_u | 0xcd |
114+
| i8x16.add | 0x6e | i16x8.add | 0x8e | i32x4.add | 0xae | i64x2.add | 0xce |
115+
| i8x16.add_sat_s | 0x6f | i16x8.add_sat_s | 0x8f | ---- add_sat ---- | 0xaf | ------------- | 0xcf |
116+
| i8x16.add_sat_u | 0x70 | i16x8.add_sat_u | 0x90 | ---- add_sat ---- | 0xb0 | ------------- | 0xd0 |
117+
| i8x16.sub | 0x71 | i16x8.sub | 0x91 | i32x4.sub | 0xb1 | i64x2.sub | 0xd1 |
118+
| i8x16.sub_sat_s | 0x72 | i16x8.sub_sat_s | 0x92 | ---- sub_sat ---- | 0xb2 | ------------- | 0xd2 |
119+
| i8x16.sub_sat_u | 0x73 | i16x8.sub_sat_u | 0x93 | ---- sub_sat ---- | 0xb3 | ------------- | 0xd3 |
120+
| f64x2.ceil | 0x74 | f64x2.nearest | 0x94 | ------------- | 0xb4 | ------------- | 0xd4 |
121+
| f64x2.floor | 0x75 | i16x8.mul | 0x95 | i32x4.mul | 0xb5 | i64x2.mul | 0xd5 |
122+
| i8x16.min_s | 0x76 | i16x8.min_s | 0x96 | i32x4.min_s | 0xb6 | i64x2.eq | 0xd6 |
123+
| i8x16.min_u | 0x77 | i16x8.min_u | 0x97 | i32x4.min_u | 0xb7 | i64x2.ne | 0xd7 |
124+
| i8x16.max_s | 0x78 | i16x8.max_s | 0x98 | i32x4.max_s | 0xb8 | i64x2.lt_s | 0xd8 |
125+
| i8x16.max_u | 0x79 | i16x8.max_u | 0x99 | i32x4.max_u | 0xb9 | i64x2.gt_s | 0xd9 |
126+
| f64x2.trunc | 0x7a | | 0x9a | i32x4.dot_i16x8_s | 0xba | i64x2.le_s | 0xda |
127+
| i8x16.avgr_u | 0x7b | i16x8.avgr_u | 0x9b | ---- avgr_u ---- | 0xbb | i64x2.ge_s | 0xdb |
128+
| i16x8.extadd_pairwise_i8x16_s | 0x7c | i16x8.extmul_low_i8x16_s | 0x9c | i32x4.extmul_low_i16x8_s | 0xbc | i64x2.extmul_low_i32x4_s | 0xdc |
129+
| i16x8.extadd_pairwise_i8x16_u | 0x7d | i16x8.extmul_high_i8x16_s | 0x9d | i32x4.extmul_high_i16x8_s | 0xbd | i64x2.extmul_high_i32x4_s | 0xdd |
130+
| i32x4.extadd_pairwise_i16x8_s | 0x7e | i16x8.extmul_low_i8x16_u | 0x9e | i32x4.extmul_low_i16x8_u | 0xbe | i64x2.extmul_low_i32x4_u | 0xde |
131+
| i32x4.extadd_pairwise_i16x8_u | 0x7f | i16x8.extmul_high_i8x16_u | 0x9f | i32x4.extmul_high_i16x8_u | 0xbf | i64x2.extmul_high_i32x4_u | 0xdf |
111132

112133
| f32x4 Op | opcode | f64x2 Op | opcode |
113134
| --------------- | ------ | --------------- | ------ |
@@ -124,9 +145,13 @@
124145
| f32x4.pmin | 0xea | f64x2.pmin | 0xf6 |
125146
| f32x4.pmax | 0xeb | f64x2.pmax | 0xf7 |
126147

127-
| Conversion Op | opcode |
128-
| ----------------------- | ------ |
129-
| i32x4.trunc_sat_f32x4_s | 0xf8 |
130-
| i32x4.trunc_sat_f32x4_u | 0xf9 |
131-
| f32x4.convert_i32x4_s | 0xfa |
132-
| f32x4.convert_i32x4_u | 0xfb |
148+
| Conversion Op | opcode |
149+
| ---------------------------- | ------ |
150+
| i32x4.trunc_sat_f32x4_s | 0xf8 |
151+
| i32x4.trunc_sat_f32x4_u | 0xf9 |
152+
| f32x4.convert_i32x4_s | 0xfa |
153+
| f32x4.convert_i32x4_u | 0xfb |
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| i32x4.trunc_sat_f64x2_s_zero | 0xfc |
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| i32x4.trunc_sat_f64x2_u_zero | 0xfd |
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| f64x2.convert_low_i32x4_s | 0xfe |
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| f64x2.convert_low_i32x4_u | 0xff |

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