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i64x2.gt_s, i64x2.lt_s, i64x2.ge_s, and i64x2.le_s instructions
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‎proposals/simd/BinarySIMD.md‎

Lines changed: 230 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -30,6 +30,7 @@ In the description below, `ImmLaneIdx{I}` indicates the maximum value of the byt
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For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive).
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<<<<<<< HEAD
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| Instruction | `simdop` | Immediate operands |
3435
| --------------------------------|---------:|--------------------------|
3536
| `v128.load` | `0x00`| m:memarg |
@@ -262,4 +263,232 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive).
262263
| `i16x8.extadd_pairwise_i8x16_s` | `TBD`| - |
263264
| `i16x8.extadd_pairwise_i8x16_u` | `TBD`| - |
264265
| `i32x4.extadd_pairwise_i16x8_s` | `TBD`| - |
265-
| `i32x4.extadd_pairwise_i16x8_u` | `TBD`| - |
266+
| `i32x4.extadd_pairwise_i16x8_u` | `TBD`| - |
267+
=======
268+
| Instruction | `simdop` | Immediate operands |
269+
| ----------------------------|---------:|--------------------------|
270+
| `v128.load` | `0x00`| m:memarg |
271+
| `v128.load8x8_s` | `0x01`| m:memarg |
272+
| `v128.load8x8_u` | `0x02`| m:memarg |
273+
| `v128.load16x4_s` | `0x03`| m:memarg |
274+
| `v128.load16x4_u` | `0x04`| m:memarg |
275+
| `v128.load32x2_s` | `0x05`| m:memarg |
276+
| `v128.load32x2_u` | `0x06`| m:memarg |
277+
| `v128.load8_splat` | `0x07`| m:memarg |
278+
| `v128.load16_splat` | `0x08`| m:memarg |
279+
| `v128.load32_splat` | `0x09`| m:memarg |
280+
| `v128.load64_splat` | `0x0a`| m:memarg |
281+
| `v128.store` | `0x0b`| m:memarg |
282+
| `v128.const` | `0x0c`| i:ImmByte[16] |
283+
| `i8x16.shuffle` | `0x0d`| s:ImmLaneIdx32[16] |
284+
| `i8x16.swizzle` | `0x0e`| - |
285+
| `i8x16.splat` | `0x0f`| - |
286+
| `i16x8.splat` | `0x10`| - |
287+
| `i32x4.splat` | `0x11`| - |
288+
| `i64x2.splat` | `0x12`| - |
289+
| `f32x4.splat` | `0x13`| - |
290+
| `f64x2.splat` | `0x14`| - |
291+
| `i8x16.extract_lane_s` | `0x15`| i:ImmLaneIdx16 |
292+
| `i8x16.extract_lane_u` | `0x16`| i:ImmLaneIdx16 |
293+
| `i8x16.replace_lane` | `0x17`| i:ImmLaneIdx16 |
294+
| `i16x8.extract_lane_s` | `0x18`| i:ImmLaneIdx8 |
295+
| `i16x8.extract_lane_u` | `0x19`| i:ImmLaneIdx8 |
296+
| `i16x8.replace_lane` | `0x1a`| i:ImmLaneIdx8 |
297+
| `i32x4.extract_lane` | `0x1b`| i:ImmLaneIdx4 |
298+
| `i32x4.replace_lane` | `0x1c`| i:ImmLaneIdx4 |
299+
| `i64x2.extract_lane` | `0x1d`| i:ImmLaneIdx2 |
300+
| `i64x2.replace_lane` | `0x1e`| i:ImmLaneIdx2 |
301+
| `f32x4.extract_lane` | `0x1f`| i:ImmLaneIdx4 |
302+
| `f32x4.replace_lane` | `0x20`| i:ImmLaneIdx4 |
303+
| `f64x2.extract_lane` | `0x21`| i:ImmLaneIdx2 |
304+
| `f64x2.replace_lane` | `0x22`| i:ImmLaneIdx2 |
305+
| `i8x16.eq` | `0x23`| - |
306+
| `i8x16.ne` | `0x24`| - |
307+
| `i8x16.lt_s` | `0x25`| - |
308+
| `i8x16.lt_u` | `0x26`| - |
309+
| `i8x16.gt_s` | `0x27`| - |
310+
| `i8x16.gt_u` | `0x28`| - |
311+
| `i8x16.le_s` | `0x29`| - |
312+
| `i8x16.le_u` | `0x2a`| - |
313+
| `i8x16.ge_s` | `0x2b`| - |
314+
| `i8x16.ge_u` | `0x2c`| - |
315+
| `i16x8.eq` | `0x2d`| - |
316+
| `i16x8.ne` | `0x2e`| - |
317+
| `i16x8.lt_s` | `0x2f`| - |
318+
| `i16x8.lt_u` | `0x30`| - |
319+
| `i16x8.gt_s` | `0x31`| - |
320+
| `i16x8.gt_u` | `0x32`| - |
321+
| `i16x8.le_s` | `0x33`| - |
322+
| `i16x8.le_u` | `0x34`| - |
323+
| `i16x8.ge_s` | `0x35`| - |
324+
| `i16x8.ge_u` | `0x36`| - |
325+
| `i32x4.eq` | `0x37`| - |
326+
| `i32x4.ne` | `0x38`| - |
327+
| `i32x4.lt_s` | `0x39`| - |
328+
| `i32x4.lt_u` | `0x3a`| - |
329+
| `i32x4.gt_s` | `0x3b`| - |
330+
| `i32x4.gt_u` | `0x3c`| - |
331+
| `i32x4.le_s` | `0x3d`| - |
332+
| `i32x4.le_u` | `0x3e`| - |
333+
| `i32x4.ge_s` | `0x3f`| - |
334+
| `i32x4.ge_u` | `0x40`| - |
335+
| `f32x4.eq` | `0x41`| - |
336+
| `f32x4.ne` | `0x42`| - |
337+
| `f32x4.lt` | `0x43`| - |
338+
| `f32x4.gt` | `0x44`| - |
339+
| `f32x4.le` | `0x45`| - |
340+
| `f32x4.ge` | `0x46`| - |
341+
| `f64x2.eq` | `0x47`| - |
342+
| `f64x2.ne` | `0x48`| - |
343+
| `f64x2.lt` | `0x49`| - |
344+
| `f64x2.gt` | `0x4a`| - |
345+
| `f64x2.le` | `0x4b`| - |
346+
| `f64x2.ge` | `0x4c`| - |
347+
| `v128.not` | `0x4d`| - |
348+
| `v128.and` | `0x4e`| - |
349+
| `v128.andnot` | `0x4f`| - |
350+
| `v128.or` | `0x50`| - |
351+
| `v128.xor` | `0x51`| - |
352+
| `v128.bitselect` | `0x52`| - |
353+
| `i8x16.abs` | `0x60`| - |
354+
| `i8x16.neg` | `0x61`| - |
355+
| `i8x16.all_true` | `0x63`| - |
356+
| `i8x16.bitmask` | `0x64`| - |
357+
| `i8x16.narrow_i16x8_s` | `0x65`| - |
358+
| `i8x16.narrow_i16x8_u` | `0x66`| - |
359+
| `i8x16.shl` | `0x6b`| - |
360+
| `i8x16.shr_s` | `0x6c`| - |
361+
| `i8x16.shr_u` | `0x6d`| - |
362+
| `i8x16.add` | `0x6e`| - |
363+
| `i8x16.add_sat_s` | `0x6f`| - |
364+
| `i8x16.add_sat_u` | `0x70`| - |
365+
| `i8x16.sub` | `0x71`| - |
366+
| `i8x16.sub_sat_s` | `0x72`| - |
367+
| `i8x16.sub_sat_u` | `0x73`| - |
368+
| `i8x16.min_s` | `0x76`| - |
369+
| `i8x16.min_u` | `0x77`| - |
370+
| `i8x16.max_s` | `0x78`| - |
371+
| `i8x16.max_u` | `0x79`| - |
372+
| `i8x16.avgr_u` | `0x7b`| - |
373+
| `i16x8.abs` | `0x80`| - |
374+
| `i16x8.neg` | `0x81`| - |
375+
| `i16x8.all_true` | `0x83`| - |
376+
| `i16x8.bitmask` | `0x84`| - |
377+
| `i16x8.narrow_i32x4_s` | `0x85`| - |
378+
| `i16x8.narrow_i32x4_u` | `0x86`| - |
379+
| `i16x8.widen_low_i8x16_s` | `0x87`| - |
380+
| `i16x8.widen_high_i8x16_s` | `0x88`| - |
381+
| `i16x8.widen_low_i8x16_u` | `0x89`| - |
382+
| `i16x8.widen_high_i8x16_u` | `0x8a`| - |
383+
| `i16x8.shl` | `0x8b`| - |
384+
| `i16x8.shr_s` | `0x8c`| - |
385+
| `i16x8.shr_u` | `0x8d`| - |
386+
| `i16x8.add` | `0x8e`| - |
387+
| `i16x8.add_sat_s` | `0x8f`| - |
388+
| `i16x8.add_sat_u` | `0x90`| - |
389+
| `i16x8.sub` | `0x91`| - |
390+
| `i16x8.sub_sat_s` | `0x92`| - |
391+
| `i16x8.sub_sat_u` | `0x93`| - |
392+
| `i16x8.mul` | `0x95`| - |
393+
| `i16x8.min_s` | `0x96`| - |
394+
| `i16x8.min_u` | `0x97`| - |
395+
| `i16x8.max_s` | `0x98`| - |
396+
| `i16x8.max_u` | `0x99`| - |
397+
| `i16x8.avgr_u` | `0x9b`| - |
398+
| `i32x4.abs` | `0xa0`| - |
399+
| `i32x4.neg` | `0xa1`| - |
400+
| `i32x4.all_true` | `0xa3`| - |
401+
| `i32x4.bitmask` | `0xa4`| - |
402+
| `i32x4.widen_low_i16x8_s` | `0xa7`| - |
403+
| `i32x4.widen_high_i16x8_s` | `0xa8`| - |
404+
| `i32x4.widen_low_i16x8_u` | `0xa9`| - |
405+
| `i32x4.widen_high_i16x8_u` | `0xaa`| - |
406+
| `i32x4.shl` | `0xab`| - |
407+
| `i32x4.shr_s` | `0xac`| - |
408+
| `i32x4.shr_u` | `0xad`| - |
409+
| `i32x4.add` | `0xae`| - |
410+
| `i32x4.sub` | `0xb1`| - |
411+
| `i32x4.mul` | `0xb5`| - |
412+
| `i32x4.min_s` | `0xb6`| - |
413+
| `i32x4.min_u` | `0xb7`| - |
414+
| `i32x4.max_s` | `0xb8`| - |
415+
| `i32x4.max_u` | `0xb9`| - |
416+
| `i32x4.dot_i16x8_s` | `0xba`| - |
417+
| `i64x2.neg` | `0xc1`| - |
418+
| `i64x2.bitmask` | `0xc4`| - |
419+
| `i64x2.widen_low_i32x4_s` | `0xc7`| - |
420+
| `i64x2.widen_high_i32x4_s` | `0xc8`| - |
421+
| `i64x2.widen_low_i32x4_u` | `0xc9`| - |
422+
| `i64x2.widen_high_i32x4_u` | `0xca`| - |
423+
| `i64x2.shl` | `0xcb`| - |
424+
| `i64x2.shr_s` | `0xcc`| - |
425+
| `i64x2.shr_u` | `0xcd`| - |
426+
| `i64x2.add` | `0xce`| - |
427+
| `i64x2.sub` | `0xd1`| - |
428+
| `i64x2.mul` | `0xd5`| - |
429+
| `f32x4.ceil` | `0xd8`| - |
430+
| `f32x4.floor` | `0xd9`| - |
431+
| `f32x4.trunc` | `0xda`| - |
432+
| `f32x4.nearest` | `0xdb`| - |
433+
| `f64x2.ceil` | `0xdc`| - |
434+
| `f64x2.floor` | `0xdd`| - |
435+
| `f64x2.trunc` | `0xde`| - |
436+
| `f64x2.nearest` | `0xdf`| - |
437+
| `f32x4.abs` | `0xe0`| - |
438+
| `f32x4.neg` | `0xe1`| - |
439+
| `f32x4.sqrt` | `0xe3`| - |
440+
| `f32x4.add` | `0xe4`| - |
441+
| `f32x4.sub` | `0xe5`| - |
442+
| `f32x4.mul` | `0xe6`| - |
443+
| `f32x4.div` | `0xe7`| - |
444+
| `f32x4.min` | `0xe8`| - |
445+
| `f32x4.max` | `0xe9`| - |
446+
| `f32x4.pmin` | `0xea`| - |
447+
| `f32x4.pmax` | `0xeb`| - |
448+
| `f64x2.abs` | `0xec`| - |
449+
| `f64x2.neg` | `0xed`| - |
450+
| `f64x2.sqrt` | `0xef`| - |
451+
| `f64x2.add` | `0xf0`| - |
452+
| `f64x2.sub` | `0xf1`| - |
453+
| `f64x2.mul` | `0xf2`| - |
454+
| `f64x2.div` | `0xf3`| - |
455+
| `f64x2.min` | `0xf4`| - |
456+
| `f64x2.max` | `0xf5`| - |
457+
| `f64x2.pmin` | `0xf6`| - |
458+
| `f64x2.pmax` | `0xf7`| - |
459+
| `i32x4.trunc_sat_f32x4_s` | `0xf8`| - |
460+
| `i32x4.trunc_sat_f32x4_u` | `0xf9`| - |
461+
| `f32x4.convert_i32x4_s` | `0xfa`| - |
462+
| `f32x4.convert_i32x4_u` | `0xfb`| - |
463+
| `v128.load32_zero` | `0xfc`| - |
464+
| `v128.load64_zero` | `0xfd`| - |
465+
| `i16x8.extmul_low_i8x16_s` | `0x110`| - |
466+
| `i16x8.extmul_high_i8x16_s` | `0x111`| - |
467+
| `i16x8.extmul_low_i8x16_u` | `0x112`| - |
468+
| `i16x8.extmul_high_i8x16_u` | `0x113`| - |
469+
| `i32x4.extmul_low_i16x8_s` | `0x114`| - |
470+
| `i32x4.extmul_high_i16x8_s` | `0x115`| - |
471+
| `i32x4.extmul_low_i16x8_u` | `0x116`| - |
472+
| `i32x4.extmul_high_i16x8_u` | `0x117`| - |
473+
| `i64x2.extmul_low_i32x4_s` | `0x118`| - |
474+
| `i64x2.extmul_high_i32x4_s` | `0x119`| - |
475+
| `i64x2.extmul_low_i32x4_u` | `0x11a`| - |
476+
| `i64x2.extmul_high_i32x4_u` | `0x11b`| - |
477+
| `i16x8.q15mulr_sat_s` | `TBD`| - |
478+
| `v128.any_true` | `TBD`| - |
479+
| `v128.load8_lane` | `TBD`| m:memarg, i:ImmLaneIdx16 |
480+
| `v128.load16_lane` | `TBD`| m:memarg, i:ImmLaneIdx8 |
481+
| `v128.load32_lane` | `TBD`| m:memarg, i:ImmLaneIdx4 |
482+
| `v128.load64_lane` | `TBD`| m:memarg, i:ImmLaneIdx2 |
483+
| `v128.store8_lane` | `TBD`| m:memarg, i:ImmLaneIdx16 |
484+
| `v128.store16_lane` | `TBD`| m:memarg, i:ImmLaneIdx8 |
485+
| `v128.store32_lane` | `TBD`| m:memarg, i:ImmLaneIdx4 |
486+
| `v128.store64_lane` | `TBD`| m:memarg, i:ImmLaneIdx2 |
487+
| `i64x2.eq` | `TBD`| - |
488+
| `i64x2.ne` | `TBD`| - |
489+
| `i64x2.all_true` | `TBD`| - |
490+
| `i64x2.lt_s` | `TBD`| - |
491+
| `i64x2.gt_s` | `TBD`| - |
492+
| `i64x2.le_s` | `TBD`| - |
493+
| `i64x2.ge_s` | `TBD`| - |
494+
>>>>>>> 12d1340 (i64x2.gt_s, i64x2.lt_s, i64x2.ge_s, and i64x2.le_s instructions)

‎proposals/simd/ImplementationStatus.md‎

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Original file line numberDiff line numberDiff line change
@@ -231,6 +231,10 @@
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| `i16x8.extadd_pairwise_i8x16_u` | | | | | |
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| `i32x4.extadd_pairwise_i16x8_s` | | | | | |
233233
| `i32x4.extadd_pairwise_i16x8_u` | | | | | |
234+
| `i64x2.lt_s` | | | | | |
235+
| `i64x2.gt_s` | | | | | |
236+
| `i64x2.le_s` | | | | | |
237+
| `i64x2.ge_s` | | | | | |
234238

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[1] Tip of tree LLVM as of May 20, 2020
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‎proposals/simd/SIMD.md‎

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Original file line numberDiff line numberDiff line change
@@ -787,6 +787,7 @@ def S.ne(a, b):
787787
* `i16x8.lt_u(a: v128, b: v128) -> v128`
788788
* `i32x4.lt_s(a: v128, b: v128) -> v128`
789789
* `i32x4.lt_u(a: v128, b: v128) -> v128`
790+
* `i64x2.lt_s(a: v128, b: v128) -> v128`
790791
* `f32x4.lt(a: v128, b: v128) -> v128`
791792
* `f64x2.lt(a: v128, b: v128) -> v128`
792793

@@ -797,6 +798,7 @@ def S.ne(a, b):
797798
* `i16x8.le_u(a: v128, b: v128) -> v128`
798799
* `i32x4.le_s(a: v128, b: v128) -> v128`
799800
* `i32x4.le_u(a: v128, b: v128) -> v128`
801+
* `i64x2.le_s(a: v128, b: v128) -> v128`
800802
* `f32x4.le(a: v128, b: v128) -> v128`
801803
* `f64x2.le(a: v128, b: v128) -> v128`
802804

@@ -807,6 +809,7 @@ def S.ne(a, b):
807809
* `i16x8.gt_u(a: v128, b: v128) -> v128`
808810
* `i32x4.gt_s(a: v128, b: v128) -> v128`
809811
* `i32x4.gt_u(a: v128, b: v128) -> v128`
812+
* `i64x2.gt_s(a: v128, b: v128) -> v128`
810813
* `f32x4.gt(a: v128, b: v128) -> v128`
811814
* `f64x2.gt(a: v128, b: v128) -> v128`
812815

@@ -817,6 +820,7 @@ def S.ne(a, b):
817820
* `i16x8.ge_u(a: v128, b: v128) -> v128`
818821
* `i32x4.ge_s(a: v128, b: v128) -> v128`
819822
* `i32x4.ge_u(a: v128, b: v128) -> v128`
823+
* `i64x2.ge_s(a: v128, b: v128) -> v128`
820824
* `f32x4.ge(a: v128, b: v128) -> v128`
821825
* `f64x2.ge(a: v128, b: v128) -> v128`
822826

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