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This feature request is based on this thread. The high-level SPI drivers doesn't supports TWI (aka. half-duplex SPI) mode (where the MOSI and the MISO is common.)
The write on TWI is the same as on SPI. (because the MISO is unused).
The only difference comes up during read operation, when the SDIO (the common data buffer) should be tri-stated.
The QSPI core doesn't support TWI, therefore, external FPGA logic controls the tri-state pi always. Because of the external logic I suggest function pointer(s) in solution, to handle the tri-state control in all cases.
The text was updated successfully, but these errors were encountered:
This feature request is based on this thread. The high-level SPI drivers doesn't supports TWI (aka. half-duplex SPI) mode (where the MOSI and the MISO is common.)
The write on TWI is the same as on SPI. (because the MISO is unused).
The only difference comes up during read operation, when the SDIO (the common data buffer) should be tri-stated.
The QSPI core doesn't support TWI, therefore, external FPGA logic controls the tri-state pi always. Because of the external logic I suggest function pointer(s) in solution, to handle the tri-state control in all cases.
The text was updated successfully, but these errors were encountered: