|
4 | 4 | */ |
5 | 5 | #include <zephyr/devicetree.h> |
6 | 6 | #include <offsets.h> |
| 7 | +#include <kernel_arch_swap_macro.S> |
7 | 8 | #define OFFSET DT_PROP(DT_NODELABEL(intc0), if_offset) |
8 | 9 |
|
9 | | -#if defined(CONFIG_BOARD_DSPIC33A_CURIOSITY_P33AK512MPS512) |
10 | | -#define RAM_END 0x00013FFC |
11 | | -#elif defined(CONFIG_BOARD_DSPIC33A_CURIOSITY_P33AK128MC106) |
12 | | -#define RAM_END 0x00007FFC |
13 | | -#endif |
14 | | - |
15 | | - |
16 | 10 | .equ IF_OFFSET, OFFSET |
17 | 11 |
|
18 | 12 | .section .text,code |
|
23 | 17 | __COMMONInterrupt: |
24 | 18 | .section .isr.text._COMMONInterrupt,keep,code,keep |
25 | 19 | lnk #0x4 |
| 20 | + /* Handle ISR calls and clear handles IRQ |
| 21 | + */ |
26 | 22 | mov.l w8, [w15++] |
27 | | - mov.sl #__kernel,w8 |
| 23 | + mov.sl #__kernel + ___cpu_t_nested_OFFSET,w8 |
28 | 24 | add.l [w8],#1,[w8] |
29 | 25 | mov.w _INTTREGbits,w0 |
30 | | - and.l #(0x1ff&0xFFFF),w0 |
| 26 | + and.l #0x1ff,w0 |
31 | 27 | sub.l w0,#9,w0 |
32 | 28 | mov.sl #__sw_isr_table,w1 |
33 | 29 | sl.l w0,#3,w0 |
34 | 30 | add.l w0,w1,w2 |
35 | 31 | mov.l [w2+4],w1 |
36 | 32 | mov.l [w2],w0 |
37 | 33 |
|
38 | | - |
39 | 34 | call w1 |
40 | 35 | mov.w _INTTREGbits,w0 |
41 | | - and.l #(0x1ff&0xFFFF),w0 |
| 36 | + and.l #0x1ff,w0 |
42 | 37 | sub.l w0,#9,w0 |
43 | 38 | call _arch_dspic_irq_clear |
44 | 39 |
|
45 | | - |
| 40 | + /* Check and perform context switch |
| 41 | + */ |
46 | 42 | sub.l [w8],#1,w0 |
47 | 43 | mov.l w0,[w8] |
| 44 | + mov.l [--w15], w8 |
48 | 45 | cp.l w0,#0 |
49 | 46 | bra nz,.L2 |
50 | | - mov.sl #__kernel+20,w1 |
| 47 | + mov.sl #__kernel + ___kernel_t_ready_q_OFFSET,w1 |
51 | 48 | mov.l [w1],w1 |
52 | | - mov.sl #__kernel+8,w0 |
| 49 | + mov.sl #__kernel + ___cpu_t_current_OFFSET,w0 |
53 | 50 | mov.l [w0],w0 |
54 | 51 | cp.l w1,w0 |
55 | 52 | bra z,.L2 |
56 | 53 | cp0.b _z_sys_post_kernel |
57 | 54 | bra z,.L2 |
58 | | - mov.l [--w15], w8 |
59 | 55 | ulnk |
60 | 56 | CTXTSWP #0x0 |
61 | 57 | mov.l w0, [w15++] |
62 | 58 | mov.l #RAM_END, w0 |
63 | 59 | mov.l w0, SPLIM |
64 | | - mov.l sr, w0 |
65 | | - and #0xe0, w0 |
66 | | - bra nz, 1f |
67 | | - mov.l [--w15], w0 |
68 | | - ulnk |
69 | | - mov.l w2, [w15++] |
70 | | - mov.l w1, [w15++] |
71 | | - mov.l w0, [w15++] |
72 | | - mov.l #_swap_working_set, w0 |
73 | | - mov.l [--w15], [w0++] |
74 | | - mov.l [--w15], [w0++] |
75 | | - mov.l [--w15], [w0] |
76 | | - mov.l [--w15], w1 |
77 | | - mov.l sr, [w15++] |
78 | | - mov.l w1, [w15++] |
79 | | - mov.l [w0--], w2 |
80 | | - mov.l [w0--], w1 |
81 | | - mov.l [w0], w0 |
82 | | - mov.l w0, [w15++] |
83 | | - 1: |
84 | 60 | mov.l [--w15], w0 |
85 | | - push RCOUNT |
86 | | - push.l fsr |
87 | | - push.l fcr |
88 | | - mov.l w0, [w15++] |
89 | | - mov.l w1, [w15++] |
90 | | - mov.l w2, [w15++] |
91 | | - mov.l w3, [w15++] |
92 | | - mov.l w4, [w15++] |
93 | | - mov.l w5, [w15++] |
94 | | - mov.l w6, [w15++] |
95 | | - mov.l w7, [w15++] |
96 | | - push.l f0 |
97 | | - push.l f1 |
98 | | - push.l f2 |
99 | | - push.l f3 |
100 | | - push.l f4 |
101 | | - push.l f5 |
102 | | - push.l f6 |
103 | | - push.l f7 |
104 | | - lnk #0x4 |
105 | | - |
106 | | - mov.l #__kernel, w0 |
107 | | - mov.l #___cpu_t_current_OFFSET, w1 |
108 | | - add w0, w1, w1 |
109 | | - mov.l [w1], w2 |
110 | | - mov.l #___thread_t_callee_saved_OFFSET, w1 |
111 | | - add w2, w1, w1 |
| 61 | + z_dspic_save_caller_saved |
| 62 | + z_dspic_save_callee_saved |
112 | 63 |
|
113 | | - mov.l w8, [w1++] |
114 | | - mov.l w9, [w1++] |
115 | | - mov.l w10, [w1++] |
116 | | - mov.l w11, [w1++] |
117 | | - mov.l w12, [w1++] |
118 | | - mov.l w13, [w1++] |
119 | | - mov.l w14, [w1++] |
120 | | - mov.l f8, [w1++] |
121 | | - mov.l f9, [w1++] |
122 | | - mov.l f10, [w1++] |
123 | | - mov.l f11, [w1++] |
124 | | - mov.l f12, [w1++] |
125 | | - mov.l f13, [w1++] |
126 | | - mov.l f14, [w1++] |
127 | | - mov.l f15, [w1++] |
128 | | - mov.l f16, [w1++] |
129 | | - mov.l f17, [w1++] |
130 | | - mov.l f18, [w1++] |
131 | | - mov.l f19, [w1++] |
132 | | - mov.l f20, [w1++] |
133 | | - mov.l f21, [w1++] |
134 | | - mov.l f22, [w1++] |
135 | | - mov.l f23, [w1++] |
136 | | - mov.l f24, [w1++] |
137 | | - mov.l f25, [w1++] |
138 | | - mov.l f26, [w1++] |
139 | | - mov.l f27, [w1++] |
140 | | - mov.l f28, [w1++] |
141 | | - mov.l f29, [w1++] |
142 | | - mov.l f30, [w1++] |
143 | | - mov.l f31, [w1++] |
144 | | - mov.l #RCOUNT, w2 |
145 | | - mov.l [w2], [w1++] |
146 | | - mov.l #CORCON, w2 |
147 | | - mov.l [w2], [w1++] |
148 | | - mov.l #MODCON, w2 |
149 | | - mov.l [w2], [w1++] |
150 | | - mov.l #XMODSRT, w2 |
151 | | - mov.l [w2], [w1++] |
152 | | - mov.l #XMODEND, w2 |
153 | | - mov.l [w2], [w1++] |
154 | | - mov.l #YMODSRT, w2 |
155 | | - mov.l [w2], [w1++] |
156 | | - mov.l #YMODEND, w2 |
157 | | - mov.l [w2], [w1++] |
158 | | - mov.l #XBREV, w2 |
159 | | - mov.l [w2], [w1++] |
160 | | - slac.l A, [W1++] |
161 | | - sac.l A, [W1++] |
162 | | - suac.l A, [W1++] |
163 | | - slac.l B, [W1++] |
164 | | - sac.l B, [W1++] |
165 | | - suac.l B, [W1++] |
166 | | - mov.l w15, [w1++] |
167 | | - mov.l w14, [w1++] |
168 | | - mov.l #SPLIM, w2 |
169 | | - mov.l [w2], [w1++] |
| 64 | + mov.l #__kernel_ready_q_cache_OFFSET, w2 |
| 65 | + mov.l [w2], w2 |
| 66 | + mov.l #__kernel_current_OFFSET, w1 |
| 67 | + mov.l w2, [w1] |
170 | 68 |
|
171 | | - mov.sl #__kernel+20,w0 |
172 | | - mov.l [w0],w0 |
173 | | - mov.sl #__kernel,w1 |
174 | | - mov.l w0,[w1 + ___cpu_t_current_OFFSET] |
175 | | - mov.l [w0 + ___thread_t_tls_OFFSET],w0 |
176 | | - rcall __set_tls |
177 | | - |
178 | | - mov.l #__kernel, w0 |
179 | | - mov.l #___cpu_t_current_OFFSET, w1 |
180 | | - add w0, w1, w1 |
181 | | - mov.l [w1], w2 |
182 | | - mov.l #___thread_t_callee_saved_OFFSET, w1 |
183 | | - add w2, w1, w1 |
| 69 | +#ifdef CONFIG_CURRENT_THREAD_USE_TLS |
| 70 | + mov.l [w2 + ___thread_t_tls_OFFSET], w0 |
| 71 | + rcall __set_tls |
| 72 | +#endif |
184 | 73 |
|
185 | | - mov.l [w1++], w8 |
186 | | - mov.l [w1++], w9 |
187 | | - mov.l [w1++], w10 |
188 | | - mov.l [w1++], w11 |
189 | | - mov.l [w1++], w12 |
190 | | - mov.l [w1++], w13 |
191 | | - mov.l [w1++], w14 |
192 | | - mov.l [w1++], f8 |
193 | | - mov.l [w1++], f9 |
194 | | - mov.l [w1++], f10 |
195 | | - mov.l [w1++], f11 |
196 | | - mov.l [w1++], f12 |
197 | | - mov.l [w1++], f13 |
198 | | - mov.l [w1++], f14 |
199 | | - mov.l [w1++], f15 |
200 | | - mov.l [w1++], f16 |
201 | | - mov.l [w1++], f17 |
202 | | - mov.l [w1++], f18 |
203 | | - mov.l [w1++], f19 |
204 | | - mov.l [w1++], f20 |
205 | | - mov.l [w1++], f21 |
206 | | - mov.l [w1++], f22 |
207 | | - mov.l [w1++], f23 |
208 | | - mov.l [w1++], f24 |
209 | | - mov.l [w1++], f25 |
210 | | - mov.l [w1++], f26 |
211 | | - mov.l [w1++], f27 |
212 | | - mov.l [w1++], f28 |
213 | | - mov.l [w1++], f29 |
214 | | - mov.l [w1++], f30 |
215 | | - mov.l [w1++], f31 |
216 | | - mov.l #RCOUNT, w2 |
217 | | - mov.l [w1++], [w2] |
218 | | - mov.l #CORCON, w2 |
219 | | - mov.l [w1++], [w2] |
220 | | - mov.l #MODCON, w2 |
221 | | - mov.l [w1++], [w2] |
222 | | - mov.l #XMODSRT, w2 |
223 | | - mov.l [w1++], [w2] |
224 | | - mov.l #XMODEND, w2 |
225 | | - mov.l [w1++], [w2] |
226 | | - mov.l #YMODSRT, w2 |
227 | | - mov.l [w1++], [w2] |
228 | | - mov.l #YMODEND, w2 |
229 | | - mov.l [w1++], [w2] |
230 | | - mov.l #XBREV, w2 |
231 | | - mov.l [w1++], [w2] |
232 | | - clr A |
233 | | - clr B |
234 | | - llac.l [w1++], A |
235 | | - lac.l [w1++], A |
236 | | - luac.l [w1++], A |
237 | | - llac.l [w1++], B |
238 | | - lac.l [w1++], B |
239 | | - luac.l [w1++], B |
240 | | - mov.l [w1++], w15 |
241 | | - mov.l [w1++], w14 |
242 | | - mov.l #SPLIM, w2 |
243 | | - mov.l [w1++], [w2] |
| 74 | + z_dspic_restore_callee_saved |
| 75 | + z_dspic_restore_caller_saved |
244 | 76 |
|
245 | | - ulnk |
246 | | - pop.l f7 |
247 | | - pop.l f6 |
248 | | - pop.l f5 |
249 | | - pop.l f4 |
250 | | - pop.l f3 |
251 | | - pop.l f2 |
252 | | - pop.l f1 |
253 | | - pop.l f0 |
254 | | - mov.l [--w15], w7 |
255 | | - mov.l [--w15], w6 |
256 | | - mov.l [--w15], w5 |
257 | | - mov.l [--w15], w4 |
258 | | - mov.l [--w15], w3 |
259 | | - mov.l [--w15], w2 |
260 | | - mov.l [--w15], w1 |
261 | | - mov.l [--w15], w0 |
262 | | - pop.l fcr |
263 | | - pop.l fsr |
264 | | - pop RCOUNT |
265 | | - mov.l w0, [w15++] |
266 | | - mov.l sr, w0 |
267 | | - and #0xe0, w0 |
268 | | - mov.l [--w15], w0 |
269 | | - bra nz, 1f |
270 | 77 | mov.l w2, [w15++] |
271 | 78 | mov.l w1, [w15++] |
272 | 79 | mov.l w0, [w15++] |
273 | | - mov.l #_swap_working_set, w0 |
274 | | - mov.l [--w15], [w0++] |
275 | | - mov.l [--w15], [w0++] |
276 | | - mov.l [--w15], [w0] |
277 | | - mov.l [--w15], w1 |
278 | | - mov.l [--w15], w2 |
279 | | - mov.l w2, sr |
280 | | - mov.l w1, [w15++] |
281 | | - mov.l [w0--], w2 |
282 | | - mov.l [w0--], w1 |
283 | | - mov.l [w0], w0 |
284 | | - lnk #0x4 |
285 | | - 1: |
286 | | - mov.l w2, [w15++] |
287 | | - mov.l w1, [w15++] |
288 | | - mov.l w0, [w15++] |
289 | | - mov.sl #__kernel, w0 |
290 | | - mov.l [w0 + ___cpu_t_current_OFFSET], w1 |
291 | | - mov.l #___thread_t_arch_OFFSET, w2 |
292 | | - add.l w2, w1, w1 |
293 | | - mov.l [w1 + ___thread_arch_t_swapped_from_thread_OFFSET], w0 |
| 80 | + mov.sl #__kernel_current_OFFSET, w0 |
| 81 | + mov.l [w0], w1 |
| 82 | + mov.l [w1 + __thread_t_arch_swapped_from_thread_OFFSET], w0 |
294 | 83 | mov.l #0, w2 |
295 | 84 | cp.l w2, w0 |
296 | 85 | mov.l [--w15], w0 |
297 | | - bra z, 1f |
298 | | - mov.l [w1 + ___thread_arch_t_swap_return_value_OFFSET], w0 |
299 | | - mov.l w2, [w1 + ___thread_arch_t_swapped_from_thread_OFFSET] |
300 | | - 1: |
| 86 | + bra z, 2f |
| 87 | + mov.l [w1 + __thread_t_arch_swap_return_value_OFFSET], w0 |
| 88 | + mov.l w2, [w1 + __thread_t_arch_swapped_from_thread_OFFSET] |
| 89 | + 2: |
301 | 90 | mov.l [--w15], w1 |
302 | 91 | mov.l [--w15], w2 |
303 | 92 | nop |
304 | 93 | retfie |
305 | 94 |
|
306 | | - |
307 | | - |
308 | 95 | .L2: |
309 | | - mov.l [--w15], w8 |
310 | 96 | ulnk |
311 | | -.L1: |
312 | 97 | retfie |
313 | 98 |
|
314 | 99 |
|
315 | | - .section .text._arch_dspic_irq_clear,code |
316 | | - .align 4 |
317 | | - .global _arch_dspic_irq_clear ; export |
318 | | - .type _arch_dspic_irq_clear,@function |
319 | | -_arch_dspic_irq_clear: |
320 | | - |
| 100 | +GTEXT(arch_dspic_irq_clear) |
| 101 | +SECTION_FUNC(TEXT, arch_dspic_irq_clear) |
321 | 102 | lnk #0 |
322 | 103 | lsr.l w0,#5,w1 |
323 | 104 | sl.l w1,#2,w1 |
|
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