|
6 | 6 | target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7:8" |
7 | 7 | target triple = "amdgcn-amd-amdhsa" |
8 | 8 |
|
9 | | -declare void @use(ptr, ptr) |
| 9 | +declare void @use(ptr) |
| 10 | +declare void @use2(ptr, ptr) |
10 | 11 |
|
11 | 12 | define weak amdgpu_kernel void @__omp_offloading_802_ea0109_main_l8(ptr %a) { |
12 | 13 | ; CHECK-LABEL: @__omp_offloading_802_ea0109_main_l8( |
13 | 14 | ; CHECK-NEXT: .master: |
14 | 15 | ; CHECK-NEXT: [[TMP0:%.*]] = alloca [8 x i8], align 1 |
15 | | -; CHECK-NEXT: call void @use(ptr nonnull [[TMP0]], ptr nonnull [[TMP0]]) |
| 16 | +; CHECK-NEXT: call void @use2(ptr nonnull [[TMP0]], ptr nonnull [[TMP0]]) |
16 | 17 | ; CHECK-NEXT: ret void |
17 | 18 | ; |
18 | 19 | .master: |
19 | 20 | %0 = alloca i8, i64 8, align 1 |
20 | 21 | store ptr undef, ptr %0, align 8 |
21 | | - call void @use(ptr %0, ptr %0) |
| 22 | + call void @use2(ptr %0, ptr %0) |
22 | 23 | ret void |
23 | 24 | } |
24 | 25 |
|
|
40 | 41 | define i1 @alloca_addrspace_0_nonnull() { |
41 | 42 | ; CHECK-LABEL: @alloca_addrspace_0_nonnull( |
42 | 43 | ; CHECK-NEXT: [[ALLOCA:%.*]] = alloca i8, align 1 |
43 | | -; CHECK-NEXT: call void @use(ptr nonnull [[ALLOCA]], ptr null) |
| 44 | +; CHECK-NEXT: call void @use(ptr nonnull [[ALLOCA]]) |
44 | 45 | ; CHECK-NEXT: ret i1 true |
45 | 46 | ; |
46 | 47 | %alloca = alloca i8 |
|
0 commit comments