About pcie_us_if

[GGbang2]

Hello!
I just start learning your code, and there is one question that confuses me. Is the "pcie_us_if" module corresponding to the PCIe integrated blocks in UltraScale+? Is it referring to the left part in the diagram below? However, why is its axis direction different from what is mentioned in the product guide?

[dbarrie]

pcie_us_if is the user application in that diagram. It exposes the TLPs that come through the AXIS channels, and also manages the rest of the PCIe block. There are a number of example designs included in the repo that demonstrate how it is to be used with the rest of the generic TLP-based IP provided.