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aigsim latch behavior #4

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stwokra opened this issue Aug 10, 2021 · 2 comments
Open

aigsim latch behavior #4

stwokra opened this issue Aug 10, 2021 · 2 comments

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@stwokra
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stwokra commented Aug 10, 2021

Consider the following aiger circuit system.aag:

aag 2 0 1 2 1
2 1
2
4
4 2 2
o0 latch
o1 and

Running ./aigsim system.aag -r 4 yields:

0  10 1
1  11 1
1  11 1
1  11 1
Trace is a witness for: { b0 b1 }

I would have expected that both outputs o0 and o1 are the same in each step. In particular, I would have expected that the output o0 is 0 in the first step. Is this the intended behavior of a latch or is this a bug of the aigsim tool?

@5nizza
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5nizza commented Aug 16, 2022

Agreed; here is the result of aigtodot:
image
(I am having another issue with aigsim, no small example yet.)

@5nizza
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5nizza commented Aug 16, 2022

The problem may be caused by the order in which the new-value-computation and printing is done.
Currently, aigsim works as follows:

  1. print current values of latches
  2. compute new values of ANDs
  3. compute new values of latches
  4. print the values of inputs, outputs, latches

This seems to cause the outputs to use the newly computed latch values.

Maybe it should instead:

  1. print current values of latches
  2. compute new values of ANDs and print values of inputs and outputs
  3. compute new values of latches
  4. print new values of latches

A possible fix file is attached -- but it probably doesn't work for options like vcd into which I didn't look at.
possible_patch.txt

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