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Dargent proposal #316

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gteege opened this issue Nov 15, 2019 · 0 comments
Open

Dargent proposal #316

gteege opened this issue Nov 15, 2019 · 0 comments

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@gteege
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gteege commented Nov 15, 2019

(This time I want to be more constructive than the last days 8^)
When looking at the dargent layout specifications I noted that they are very specific for the layouted type and repeat much of the information from the type expression. Therefore I thought about integrating the layout specification into the type expressions, resulting in this proposal. For the details see the attached document.
proposal-darg-synt.pdf
Advantages of the proposal are:

  • Simpler surface syntax, no redundancy for specifying the type structure in layout specs (such as for {f1:U32,f2:U32} layout record {f1:4B at 0B, f2:4B at 6B}, it now becomes {f1:U32 sized 4B at 0B, f2:U32 sized 4B at 6B})
  • No need for layout declarations and layout names.
  • No need for a predicate / test that a layout matches a type.
  • Layout polymorphism can be supported with the existing polymorphism mechanism using type variables.
  • More flexibility by supporting partial layout specifications.
  • Layout information can automatically be specified for other types than records, as it was planned but not yet implemented for the current approach.
  • More expressiveness than for the current approach (e.g., layout for unboxed abstract types, layout for type variables, empty layout for the unit type).
  • The proposal includes support for endianness specification, including mixed endianness.

I realize that the proposal means substantial modifications for Dargent, but I think it could be worth the effort and I offer support for implementing it (e.g., change parser, extend surface syntax, provide examples and test cases, ...).

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