These instructions perform the sign-extension or zero-extension of the least significant 8 bits, 16 bits or 32 bits of the source register.
These instructions replace the generalized idioms slli rD,rS,(XLEN-<size>) + srli (for zero-extension) or slli + srai (for sign-extension) for the sign-extension of 8-bit and 16-bit quantities, and for the zero-extension of 16-bit and 32-bit quantities.
| RV32 | RV64 | Mnemonic | Instruction |
|---|---|---|---|
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sext.b rd, rs |
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✓ |
sext.h rd, rs |
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✓ |
✓ |
zext.h rd, rs |