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VCD with timestamps and value changes on the same line fails with "ValueError: invalid literal for int() with base 10: '0 0! 0"'" #17
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OK, so the problem is that the time is on the same line as the signal changes is that right? Feel free to send a PR with a test under https://github.com/cirosantilli/vcdvcd/blob/master/test.py I'll merge it :-) |
I have no idea, it's the first time I'm in contact with this format and its libsigrok implementation :-S... GTKWave seems to load it fine. |
OK, going to assume it is the case then :-) PR offer still open to anyone 🎊 If you see the existing tests like Line 31 in c52a073
I'm not super expert in VCD, but it seems that is not required then. Would be good to check standard, but I'd merge even if as an extension. |
Given:
And the following two lines of code code:
I'm getting the following backtrace, I guess you've not encountered this VCD corner case before? (from Sigrok):
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