Merge from 'sycl' to 'sycl-web'

Author: iclsrc

buildbot/dependency.conf

@@ -4,8 +4,8 @@ ocl_cpu_rt_ver=2020.11.10.0.05
 # https://github.com/intel/llvm/releases/download/2020-WW41/win-oclcpuexp-2020.11.10.0.05_rel.zip
 ocl_cpu_rt_ver_win=2020.11.10.0.05
 # Same GPU driver supports Level Zero and OpenCL:
-# https://github.com/intel/compute-runtime/releases/tag/20.39.17972
-ocl_gpu_rt_ver=20.39.17972
+# https://github.com/intel/compute-runtime/releases/tag/20.41.18123
+ocl_gpu_rt_ver=20.41.18123
 # Same GPU driver supports Level Zero and OpenCL:
 # https://downloadmirror.intel.com/29879/a08/igfx_win10_100.8778.zip
 ocl_gpu_rt_ver_win=27.20.100.8778
@@ -24,7 +24,7 @@ fpga_ver_win=20200913_000017
 [DRIVER VERSIONS]
 cpu_driver_lin=2020.11.10.0.05
 cpu_driver_win=2020.11.10.0.05
-gpu_driver_lin=20.39.17972
+gpu_driver_lin=20.41.18123
 gpu_driver_win=27.20.100.8778
 fpga_driver_lin=2020.11.10.0.05
 fpga_driver_win=2020.11.10.0.05

clang/lib/Driver/Driver.cpp

@@ -3743,6 +3743,16 @@ class OffloadingActionBuilder final {
           for (auto SDA : SYCLDeviceActions)
             SYCLLinkBinaryList.push_back(SDA);
           if (WrapDeviceOnlyBinary) {
+            // If used without -fintelfpga, -fsycl-link is used to wrap device
+            // objects for future host link. Device libraries should be linked
+            // by default to resolve any undefined reference.
+            if (!Args.hasArg(options::OPT_fintelfpga)) {
+              const auto *TC = ToolChains.front();
+              addSYCLDeviceLibs(TC, SYCLLinkBinaryList, true,
+                                C.getDefaultToolChain()
+                                    .getTriple()
+                                    .isWindowsMSVCEnvironment());
+            }
             // -fsycl-link behavior does the following to the unbundled device
             // binaries:
             //   1) Link them together using llvm-link

clang/lib/Driver/ToolChains/SYCL.cpp

@@ -510,7 +510,7 @@ static void addImpliedArgs(const llvm::Triple &Triple,
     if (!A->getOption().matches(options::OPT_g0))
       BeArgs.push_back("-g");
   if (Args.getLastArg(options::OPT_O0))
-    BeArgs.push_back(IsGen ? "-O0" : "-cl-opt-disable");
+    BeArgs.push_back("-cl-opt-disable");
   if (BeArgs.empty())
     return;
   if (Triple.getSubArch() == llvm::Triple::NoSubArch ||

clang/test/Driver/sycl-offload.c

@@ -416,9 +416,9 @@
 
 /// Check -fsycl-link behaviors unbundle
 // RUN:   touch %t.o
-// RUN:   %clang -### -ccc-print-phases -target x86_64-unknown-linux-gnu -fsycl -o %t.out -fsycl-link %t.o 2>&1 \
+// RUN:   %clang -### -ccc-print-phases -target x86_64-unknown-linux-gnu -fsycl -o %t.out -fsycl-link -fno-sycl-device-lib=all %t.o 2>&1 \
 // RUN:   | FileCheck -check-prefix=CHK-LINK-UB %s
-// RUN:   %clang_cl -### -ccc-print-phases -fsycl -o %t.out -fsycl-link %t.o 2>&1 \
+// RUN:   %clang_cl -### -ccc-print-phases -fsycl -o %t.out -fsycl-link -fno-sycl-device-lib=all %t.o 2>&1 \
 // RUN:   | FileCheck -check-prefix=CHK-LINK-UB %s
 // CHK-LINK-UB: 0: input, "[[INPUT:.+\.o]]", object
 // CHK-LINK-UB: 1: clang-offload-unbundler, {0}, object
@@ -431,9 +431,9 @@
 /// ###########################################################################
 
 /// Check -fsycl-link behaviors from source
-// RUN:   %clang -### -ccc-print-phases -target x86_64-unknown-linux-gnu -fsycl -o %t.out -fsycl-link %s 2>&1 \
+// RUN:   %clang -### -ccc-print-phases -target x86_64-unknown-linux-gnu -fsycl -o %t.out -fsycl-link -fno-sycl-device-lib=all %s 2>&1 \
 // RUN:   | FileCheck -check-prefix=CHK-LINK %s
-// RUN:   %clang_cl -### -ccc-print-phases -fsycl -o %t.out -fsycl-link %s 2>&1 \
+// RUN:   %clang_cl -### -ccc-print-phases -fsycl -o %t.out -fsycl-link -fno-sycl-device-lib=all %s 2>&1 \
 // RUN:   | FileCheck -check-prefix=CHK-LINK %s
 // CHK-LINK: 0: input, "[[INPUT:.+\.c]]", c++, (device-sycl)
 // CHK-LINK: 1: preprocessor, {0}, c++-cpp-output, (device-sycl)
@@ -758,7 +758,7 @@
 // RUN:   | FileCheck -check-prefix=CHK-TOOLS-IMPLIED-OPTS-GEN %s
 // RUN:   %clang_cl -### -fsycl -fsycl-targets=spir64_gen-unknown-unknown-sycldevice -Zi -Od -Xsycl-target-backend "-DFOO1 -DFOO2" %s 2>&1 \
 // RUN:   | FileCheck -check-prefix=CHK-TOOLS-IMPLIED-OPTS-GEN %s
-// CHK-TOOLS-IMPLIED-OPTS-GEN: ocloc{{.*}} "-options" "-g -O0" "-DFOO1" "-DFOO2"
+// CHK-TOOLS-IMPLIED-OPTS-GEN: ocloc{{.*}} "-options" "-g -cl-opt-disable" "-DFOO1" "-DFOO2"
 
 /// Check -Xsycl-target-linker option passing
 // RUN:   %clang -### -target x86_64-unknown-linux-gnu -fsycl -fsycl-targets=spir64_fpga-unknown-unknown-sycldevice -Xsycl-target-linker "-DFOO1 -DFOO2" %s 2>&1 \

libclc/generic/include/spirv/spirv_types.h

@@ -40,4 +40,10 @@ enum FPRoundingMode {
   SPV_RTN = 3,
 };
 
+enum GroupOperation {
+  Reduce = 0,
+  InclusiveScan = 1,
+  ExclusiveScan = 2,
+};
+
 #endif // CLC_SPIRV_TYPES

libclc/ptx-nvidiacl/libspirv/SOURCES

@@ -83,3 +83,5 @@ workitem/get_sub_group_local_id.cl
 workitem/get_sub_group_size.cl
 images/image_helpers.ll
 images/image.cl
+group/collectives_helpers.ll
+group/collectives.cl