Updating new batch of codasip posts

Author: nimisha-chaturvedi

_collections/_updates/2024-11-20-cosmic-compute-at-riscv-summit.md

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+---
+title: "Cosmic Compute at the RISC-V Summit North America Hackathon"
+date: 2024-11-20
+layout: update
+tags:
+  - codasip
+  - risc-v
+  - energy
+link: https://codasip.com/2024/11/20/cosmic-compute-at-the-risc-v-hackathon/
+---
+
+We, Codasip had the pleasure of sponsoring and hosting a hackathon at the RISC-V Summit North America 2024 in Santa Clara, California. As part of our commitment to advancing CPU design, we invited participants to take on a challenging technical mission that tested their skill through Codasip Studio, our advanced design tool. This tool, along with CodAL—our unique C-like language—enabled participants to create sophisticated custom CPU logic that could handle one of the most unforgiving environments: deep space.
+
+![Thumbnail](https://codasip.com/wp-content/uploads/2024/11/tadej.jpg)

_collections/_updates/2025-03-25-neural-networks-at-human-interface.md

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+---
+title: "Neural networks and human-to-human interfaces at Embedded World 2025 "
+date: 2024-11-20
+layout: update
+tags:
+  - codasip
+  - risc-v
+  - energy
+link: https://codasip.com/2024/11/20/cosmic-compute-at-the-risc-v-hackathon/
+---
+
+Someone asked me how many Embedded Worlds I’ve attended, and I honestly couldn’t give an exact answer. Is it 10? 12? 15? I’m not sure, but one thing’s for certain: I’m always excited to return. So, what makes this event so special? It’s not just the technical innovations that continue to impress; Embedded World is all about the people. Curious, knowledgeable, and friendly. At one point during the week, four PhDs in Physics were enjoying a lively conversation at our booth. To be fair, some of them were my colleagues, but that kind of interaction isn’t something you experience every day! 
+
+![Thumbnail](https://codasip.com/wp-content/uploads/2025/03/ew25-team-1440x1080.jpg)

_collections/_updates/2025-04-22-faster-simulation.md

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+---
+title: "Unlock early software development for custom RISC-V designs with faster simulation"
+date: 2025-04-22
+layout: update
+tags:
+  - codasip
+  - risc-v
+  - energy
+link: https://codasip.com/2025/04/22/machineware-simulation-in-codasip-studio/
+---
+
+When designing complex Systems-on-Chip, software teams should be involved early in the process. This will help identify architectural bottlenecks, validate system behavior, and accelerate the entire project timeline. In this process, processor simulation models play a crucial role. 

_collections/_updates/2025-06-08-beyond-design-automation.md

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+---
+title: "Beyond design automation: How we manage processor IP variants with Codasip Studio"
+date: 2025-04-22
+layout: update
+tags:
+  - codasip
+  - risc-v
+  - energy
+link: https://codasip.com/2025/06/08/processor-ip-management-in-codasip-studio/
+---
+
+If you’ve been following us at Codasip, you know we’re all about enabling Custom Compute. The power to shape processor hardware to get the best out of your software is, as we see it, key to standing out and getting that crucial edge in performance, power, and area. A big part of what we offer here is Codasip Studio, our processor design toolset, and its architectural language, CodAL. Many engineers know Studio for its powerful ability to generate both a Hardware Development Kit (HDK) and a Software Development Kit (SDK) – that’s compilers, debuggers, models, the whole lot – all from one CodAL description. That alone is a huge time saver, especially when you’re innovating with your own custom instructions. 
+
+In this blog, we take you deeper into another side of Codasip Studio that we find incredibly powerful, especially when we’re managing processor IP that comes in many different flavors. It’s something that might not be immediately obvious but is critical for serious processor development. Management of configurable processor IP.