AMD Zen4 [Raphael][Genoa]

[cyring]

Source: 55901 Rev 0.25 - Oct 6, 2022 PPR Vol 3 for AMD Family 19h Model 11h B1

7.2.1 Indirect Access Registers
There are six sets of indirect access registers, with three registers in each set: one for address and two for data (to support 64-bit accesses). DF provides six sets of FICAA/FICAD (FICAA[5:0], and paired FICADL[5:0], FICADH[5:0]) and associates them by index. For example, a write through FICADL[2] is routed to the register specified in FICAA[2]. Using one FICAA/FICAD to access a different instance of FICAA/FICAD has undefined results.
The sets are assigned to specific sources:
set 0: PSP
set 1: SMU
set 2: Microcode
set 3: BIOS, operating-system, and drivers
set 4: LW-SMI
set 5: Reserved
Accesses using single-instance and 64-bit registers requires use of indirect access.

One can investigate registers using zencli

Here's an example of command usage with a Matisse 3950X

## PSP (Low FICAD)
./zencli pci bus:0x0-dev:0x18-fn:0x4-reg:0xa0
[0x8000c4a0] READ(pci) = 0x00000043 (67)
   60   56   52   48   44   40   36   32   28   24   20   16   12   08   04   00
 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0100 0011

## PSP (High FICAD)
./zencli pci bus:0x0-dev:0x18-fn:0x4-reg:0xa4
[0x8000c4a4] READ(pci) = 0x00000043 (67)
   60   56   52   48   44   40   36   32   28   24   20   16   12   08   04   00
 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0100 0011

## SMU (Low FICAD)
./zencli pci bus:0x0-dev:0x18-fn:0x4-reg:0xa8
[0x8000c4a8] READ(pci) = 0x14401022 (339742754)
   60   56   52   48   44   40   36   32   28   24   20   16   12   08   04   00
 0000 0000 0000 0000 0000 0000 0000 0000 0001 0100 0100 0000 0001 0000 0010 0010

## SMU (High FICAD)
./zencli pci bus:0x0-dev:0x18-fn:0x4-reg:0xac
[0x8000c4ac] READ(pci) = 0x14401022 (339742754)
   60   56   52   48   44   40   36   32   28   24   20   16   12   08   04   00
 0000 0000 0000 0000 0000 0000 0000 0000 0001 0100 0100 0000 0001 0000 0010 0010

## set 2, set 3, and set 4 are returning zero

## set 5 (Low FICAD)
./zencli pci bus:0x0-dev:0x18-fn:0x4-reg:0xc8
[0x8000c4c8] READ(pci) = 0x07020000 (117571584)
   60   56   52   48   44   40   36   32   28   24   20   16   12   08   04   00
 0000 0000 0000 0000 0000 0000 0000 0000 0000 0111 0000 0010 0000 0000 0000 0000

## set 5 (High FICAD)
./zencli pci bus:0x0-dev:0x18-fn:0x4-reg:0xcc
[0x8000c4cc] READ(pci) = 0x000e0b03 (920323)
   60   56   52   48   44   40   36   32   28   24   20   16   12   08   04   00
 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 1110 0000 1011 0000 0011

I would like to know if those FICAD sets are valid with Zen4 ?