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log-D202312063 #38

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SinnLiu opened this issue Jan 24, 2024 · 7 comments

SinnLiu commented Jan 24, 2024 •

edited

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https://github.com/SinnLiu/MIT_Learning

Author

SinnLiu commented Jan 24, 2024 •

edited

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TODO List

install Docker environment
finish lab1

Topic: basic bsv; barrel shifter
Total time: 2 days

Author

SinnLiu commented Jan 25, 2024 •

edited

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TODO List

finish lab2
finish lab3

Topic: fft; pipeline; booth
Total time: 6 hours

Author

SinnLiu commented Jan 30, 2024 •

edited

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TODO List

lab4
lab5

many times
basic cpu

Author

SinnLiu commented Feb 5, 2024

Learning Lab6:
Undestand piepeline, BTB BHT, epoch, Scoreboard and so on

Author

SinnLiu commented Feb 19, 2024

Learning Lab7 and others

understand relationship between method and wire in Verilog
memory controller and DRAM in BSV
sequential consistency and MSI protocol

Author

SinnLiu commented Feb 19, 2024

Maybe it should be learn once again in the future. The out-of-order cpu can be implemented for more arch learning.

Author

SinnLiu commented Mar 4, 2024

Date:2023.0304

Begin to learn 6.375, understand the contex and mission

Cost: 30min

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