@@ -65,7 +65,7 @@ struct xgpio_instance {
6565 DECLARE_BITMAP (state , 64 );
6666 DECLARE_BITMAP (last_irq_read , 64 );
6767 DECLARE_BITMAP (dir , 64 );
68- spinlock_t gpio_lock ; /* For serializing operations */
68+ raw_spinlock_t gpio_lock ; /* For serializing operations */
6969 int irq ;
7070 DECLARE_BITMAP (enable , 64 );
7171 DECLARE_BITMAP (rising_edge , 64 );
@@ -179,14 +179,14 @@ static void xgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
179179 struct xgpio_instance * chip = gpiochip_get_data (gc );
180180 int bit = xgpio_to_bit (chip , gpio );
181181
182- spin_lock_irqsave (& chip -> gpio_lock , flags );
182+ raw_spin_lock_irqsave (& chip -> gpio_lock , flags );
183183
184184 /* Write to GPIO signal and set its direction to output */
185185 __assign_bit (bit , chip -> state , val );
186186
187187 xgpio_write_ch (chip , XGPIO_DATA_OFFSET , bit , chip -> state );
188188
189- spin_unlock_irqrestore (& chip -> gpio_lock , flags );
189+ raw_spin_unlock_irqrestore (& chip -> gpio_lock , flags );
190190}
191191
192192/**
@@ -210,15 +210,15 @@ static void xgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask,
210210 bitmap_remap (hw_mask , mask , chip -> sw_map , chip -> hw_map , 64 );
211211 bitmap_remap (hw_bits , bits , chip -> sw_map , chip -> hw_map , 64 );
212212
213- spin_lock_irqsave (& chip -> gpio_lock , flags );
213+ raw_spin_lock_irqsave (& chip -> gpio_lock , flags );
214214
215215 bitmap_replace (state , chip -> state , hw_bits , hw_mask , 64 );
216216
217217 xgpio_write_ch_all (chip , XGPIO_DATA_OFFSET , state );
218218
219219 bitmap_copy (chip -> state , state , 64 );
220220
221- spin_unlock_irqrestore (& chip -> gpio_lock , flags );
221+ raw_spin_unlock_irqrestore (& chip -> gpio_lock , flags );
222222}
223223
224224/**
@@ -236,13 +236,13 @@ static int xgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
236236 struct xgpio_instance * chip = gpiochip_get_data (gc );
237237 int bit = xgpio_to_bit (chip , gpio );
238238
239- spin_lock_irqsave (& chip -> gpio_lock , flags );
239+ raw_spin_lock_irqsave (& chip -> gpio_lock , flags );
240240
241241 /* Set the GPIO bit in shadow register and set direction as input */
242242 __set_bit (bit , chip -> dir );
243243 xgpio_write_ch (chip , XGPIO_TRI_OFFSET , bit , chip -> dir );
244244
245- spin_unlock_irqrestore (& chip -> gpio_lock , flags );
245+ raw_spin_unlock_irqrestore (& chip -> gpio_lock , flags );
246246
247247 return 0 ;
248248}
@@ -265,7 +265,7 @@ static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
265265 struct xgpio_instance * chip = gpiochip_get_data (gc );
266266 int bit = xgpio_to_bit (chip , gpio );
267267
268- spin_lock_irqsave (& chip -> gpio_lock , flags );
268+ raw_spin_lock_irqsave (& chip -> gpio_lock , flags );
269269
270270 /* Write state of GPIO signal */
271271 __assign_bit (bit , chip -> state , val );
@@ -275,7 +275,7 @@ static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
275275 __clear_bit (bit , chip -> dir );
276276 xgpio_write_ch (chip , XGPIO_TRI_OFFSET , bit , chip -> dir );
277277
278- spin_unlock_irqrestore (& chip -> gpio_lock , flags );
278+ raw_spin_unlock_irqrestore (& chip -> gpio_lock , flags );
279279
280280 return 0 ;
281281}
@@ -401,7 +401,7 @@ static void xgpio_irq_mask(struct irq_data *irq_data)
401401 int bit = xgpio_to_bit (chip , irq_offset );
402402 u32 mask = BIT (bit / 32 ), temp ;
403403
404- spin_lock_irqsave (& chip -> gpio_lock , flags );
404+ raw_spin_lock_irqsave (& chip -> gpio_lock , flags );
405405
406406 __clear_bit (bit , chip -> enable );
407407
@@ -411,7 +411,7 @@ static void xgpio_irq_mask(struct irq_data *irq_data)
411411 temp &= ~mask ;
412412 xgpio_writereg (chip -> regs + XGPIO_IPIER_OFFSET , temp );
413413 }
414- spin_unlock_irqrestore (& chip -> gpio_lock , flags );
414+ raw_spin_unlock_irqrestore (& chip -> gpio_lock , flags );
415415
416416 gpiochip_disable_irq (& chip -> gc , irq_offset );
417417}
@@ -431,7 +431,7 @@ static void xgpio_irq_unmask(struct irq_data *irq_data)
431431
432432 gpiochip_enable_irq (& chip -> gc , irq_offset );
433433
434- spin_lock_irqsave (& chip -> gpio_lock , flags );
434+ raw_spin_lock_irqsave (& chip -> gpio_lock , flags );
435435
436436 __set_bit (bit , chip -> enable );
437437
@@ -450,7 +450,7 @@ static void xgpio_irq_unmask(struct irq_data *irq_data)
450450 xgpio_writereg (chip -> regs + XGPIO_IPIER_OFFSET , val );
451451 }
452452
453- spin_unlock_irqrestore (& chip -> gpio_lock , flags );
453+ raw_spin_unlock_irqrestore (& chip -> gpio_lock , flags );
454454}
455455
456456/**
@@ -515,7 +515,7 @@ static void xgpio_irqhandler(struct irq_desc *desc)
515515
516516 chained_irq_enter (irqchip , desc );
517517
518- spin_lock (& chip -> gpio_lock );
518+ raw_spin_lock (& chip -> gpio_lock );
519519
520520 xgpio_read_ch_all (chip , XGPIO_DATA_OFFSET , all );
521521
@@ -532,7 +532,7 @@ static void xgpio_irqhandler(struct irq_desc *desc)
532532 bitmap_copy (chip -> last_irq_read , all , 64 );
533533 bitmap_or (all , rising , falling , 64 );
534534
535- spin_unlock (& chip -> gpio_lock );
535+ raw_spin_unlock (& chip -> gpio_lock );
536536
537537 dev_dbg (gc -> parent , "IRQ rising %*pb falling %*pb\n" , 64 , rising , 64 , falling );
538538
@@ -623,7 +623,7 @@ static int xgpio_probe(struct platform_device *pdev)
623623 bitmap_set (chip -> hw_map , 0 , width [0 ]);
624624 bitmap_set (chip -> hw_map , 32 , width [1 ]);
625625
626- spin_lock_init (& chip -> gpio_lock );
626+ raw_spin_lock_init (& chip -> gpio_lock );
627627
628628 chip -> gc .base = -1 ;
629629 chip -> gc .ngpio = bitmap_weight (chip -> hw_map , 64 );
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