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ChristianKoenigAMDChristianKoenigAMD
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drm/ttm: nuke caching placement flags
Changing the caching on the fly never really worked flawlessly. So stop this completely and just let drivers specific the desired caching in the tt or bus object. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Michael J. Ruhl <michael.j.ruhl@intel.com> Link: https://patchwork.freedesktop.org/patch/394256/
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15 files changed

+61
-234
lines changed

15 files changed

+61
-234
lines changed

‎drivers/gpu/drm/amd/amdgpu/amdgpu_object.c‎

Lines changed: 5 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -137,7 +137,7 @@ void amdgpu_bo_placement_from_domain(struct amdgpu_bo *abo, u32 domain)
137137
places[c].fpfn = 0;
138138
places[c].lpfn = 0;
139139
places[c].mem_type = TTM_PL_VRAM;
140-
places[c].flags = TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED;
140+
places[c].flags = 0;
141141

142142
if (flags & AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED)
143143
places[c].lpfn = visible_pfn;
@@ -154,11 +154,6 @@ void amdgpu_bo_placement_from_domain(struct amdgpu_bo *abo, u32 domain)
154154
places[c].lpfn = 0;
155155
places[c].mem_type = TTM_PL_TT;
156156
places[c].flags = 0;
157-
if (flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC)
158-
places[c].flags |= TTM_PL_FLAG_WC |
159-
TTM_PL_FLAG_UNCACHED;
160-
else
161-
places[c].flags |= TTM_PL_FLAG_CACHED;
162157
c++;
163158
}
164159

@@ -167,43 +162,38 @@ void amdgpu_bo_placement_from_domain(struct amdgpu_bo *abo, u32 domain)
167162
places[c].lpfn = 0;
168163
places[c].mem_type = TTM_PL_SYSTEM;
169164
places[c].flags = 0;
170-
if (flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC)
171-
places[c].flags |= TTM_PL_FLAG_WC |
172-
TTM_PL_FLAG_UNCACHED;
173-
else
174-
places[c].flags |= TTM_PL_FLAG_CACHED;
175165
c++;
176166
}
177167

178168
if (domain & AMDGPU_GEM_DOMAIN_GDS) {
179169
places[c].fpfn = 0;
180170
places[c].lpfn = 0;
181171
places[c].mem_type = AMDGPU_PL_GDS;
182-
places[c].flags = TTM_PL_FLAG_UNCACHED;
172+
places[c].flags = 0;
183173
c++;
184174
}
185175

186176
if (domain & AMDGPU_GEM_DOMAIN_GWS) {
187177
places[c].fpfn = 0;
188178
places[c].lpfn = 0;
189179
places[c].mem_type = AMDGPU_PL_GWS;
190-
places[c].flags = TTM_PL_FLAG_UNCACHED;
180+
places[c].flags = 0;
191181
c++;
192182
}
193183

194184
if (domain & AMDGPU_GEM_DOMAIN_OA) {
195185
places[c].fpfn = 0;
196186
places[c].lpfn = 0;
197187
places[c].mem_type = AMDGPU_PL_OA;
198-
places[c].flags = TTM_PL_FLAG_UNCACHED;
188+
places[c].flags = 0;
199189
c++;
200190
}
201191

202192
if (!c) {
203193
places[c].fpfn = 0;
204194
places[c].lpfn = 0;
205195
places[c].mem_type = TTM_PL_SYSTEM;
206-
places[c].flags = TTM_PL_MASK_CACHING;
196+
places[c].flags = 0;
207197
c++;
208198
}
209199

‎drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c‎

Lines changed: 3 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -92,7 +92,7 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
9292
.fpfn = 0,
9393
.lpfn = 0,
9494
.mem_type = TTM_PL_SYSTEM,
95-
.flags = TTM_PL_MASK_CACHING
95+
.flags = 0
9696
};
9797

9898
/* Don't handle scatter gather BOs */
@@ -538,19 +538,13 @@ static int amdgpu_move_vram_ram(struct ttm_buffer_object *bo, bool evict,
538538
placements.fpfn = 0;
539539
placements.lpfn = 0;
540540
placements.mem_type = TTM_PL_TT;
541-
placements.flags = TTM_PL_MASK_CACHING;
541+
placements.flags = 0;
542542
r = ttm_bo_mem_space(bo, &placement, &tmp_mem, ctx);
543543
if (unlikely(r)) {
544544
pr_err("Failed to find GTT space for blit from VRAM\n");
545545
return r;
546546
}
547547

548-
/* set caching flags */
549-
r = ttm_tt_set_placement_caching(bo->ttm, tmp_mem.placement);
550-
if (unlikely(r)) {
551-
goto out_cleanup;
552-
}
553-
554548
r = ttm_tt_populate(bo->bdev, bo->ttm, ctx);
555549
if (unlikely(r))
556550
goto out_cleanup;
@@ -599,7 +593,7 @@ static int amdgpu_move_ram_vram(struct ttm_buffer_object *bo, bool evict,
599593
placements.fpfn = 0;
600594
placements.lpfn = 0;
601595
placements.mem_type = TTM_PL_TT;
602-
placements.flags = TTM_PL_MASK_CACHING;
596+
placements.flags = 0;
603597
r = ttm_bo_mem_space(bo, &placement, &tmp_mem, ctx);
604598
if (unlikely(r)) {
605599
pr_err("Failed to find GTT space for blit to VRAM\n");

‎drivers/gpu/drm/drm_gem_vram_helper.c‎

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -147,15 +147,12 @@ static void drm_gem_vram_placement(struct drm_gem_vram_object *gbo,
147147

148148
if (pl_flag & DRM_GEM_VRAM_PL_FLAG_VRAM) {
149149
gbo->placements[c].mem_type = TTM_PL_VRAM;
150-
gbo->placements[c++].flags = TTM_PL_FLAG_WC |
151-
TTM_PL_FLAG_UNCACHED |
152-
invariant_flags;
150+
gbo->placements[c++].flags = invariant_flags;
153151
}
154152

155153
if (pl_flag & DRM_GEM_VRAM_PL_FLAG_SYSTEM || !c) {
156154
gbo->placements[c].mem_type = TTM_PL_SYSTEM;
157-
gbo->placements[c++].flags = TTM_PL_MASK_CACHING |
158-
invariant_flags;
155+
gbo->placements[c++].flags = invariant_flags;
159156
}
160157

161158
gbo->placement.num_placement = c;

‎drivers/gpu/drm/nouveau/nouveau_bo.c‎

Lines changed: 9 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -343,37 +343,23 @@ nouveau_bo_new(struct nouveau_cli *cli, u64 size, int align,
343343
}
344344

345345
static void
346-
set_placement_list(struct nouveau_drm *drm, struct ttm_place *pl, unsigned *n,
347-
uint32_t domain, uint32_t flags)
346+
set_placement_list(struct ttm_place *pl, unsigned *n, uint32_t domain)
348347
{
349348
*n = 0;
350349

351350
if (domain & NOUVEAU_GEM_DOMAIN_VRAM) {
352-
struct nvif_mmu *mmu = &drm->client.mmu;
353-
const u8 type = mmu->type[drm->ttm.type_vram].type;
354-
355351
pl[*n].mem_type = TTM_PL_VRAM;
356-
pl[*n].flags = flags & ~TTM_PL_FLAG_CACHED;
357-
358-
/* Some BARs do not support being ioremapped WC */
359-
if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA &&
360-
type & NVIF_MEM_UNCACHED)
361-
pl[*n].flags &= ~TTM_PL_FLAG_WC;
362-
352+
pl[*n].flags = 0;
363353
(*n)++;
364354
}
365355
if (domain & NOUVEAU_GEM_DOMAIN_GART) {
366356
pl[*n].mem_type = TTM_PL_TT;
367-
pl[*n].flags = flags;
368-
369-
if (drm->agp.bridge)
370-
pl[*n].flags &= ~TTM_PL_FLAG_CACHED;
371-
357+
pl[*n].flags = 0;
372358
(*n)++;
373359
}
374360
if (domain & NOUVEAU_GEM_DOMAIN_CPU) {
375361
pl[*n].mem_type = TTM_PL_SYSTEM;
376-
pl[(*n)++].flags = flags;
362+
pl[(*n)++].flags = 0;
377363
}
378364
}
379365

@@ -415,18 +401,14 @@ void
415401
nouveau_bo_placement_set(struct nouveau_bo *nvbo, uint32_t domain,
416402
uint32_t busy)
417403
{
418-
struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
419404
struct ttm_placement *pl = &nvbo->placement;
420-
uint32_t flags = nvbo->force_coherent ? TTM_PL_FLAG_UNCACHED :
421-
TTM_PL_MASK_CACHING;
422405

423406
pl->placement = nvbo->placements;
424-
set_placement_list(drm, nvbo->placements, &pl->num_placement,
425-
domain, flags);
407+
set_placement_list(nvbo->placements, &pl->num_placement, domain);
426408

427409
pl->busy_placement = nvbo->busy_placements;
428-
set_placement_list(drm, nvbo->busy_placements, &pl->num_busy_placement,
429-
domain | busy, flags);
410+
set_placement_list(nvbo->busy_placements, &pl->num_busy_placement,
411+
domain | busy);
430412

431413
set_placement_range(nvbo, domain);
432414
}
@@ -888,7 +870,7 @@ nouveau_bo_move_flipd(struct ttm_buffer_object *bo, bool evict,
888870
.fpfn = 0,
889871
.lpfn = 0,
890872
.mem_type = TTM_PL_TT,
891-
.flags = TTM_PL_MASK_CACHING
873+
.flags = 0
892874
};
893875
struct ttm_placement placement;
894876
struct ttm_resource tmp_reg;
@@ -930,7 +912,7 @@ nouveau_bo_move_flips(struct ttm_buffer_object *bo, bool evict,
930912
.fpfn = 0,
931913
.lpfn = 0,
932914
.mem_type = TTM_PL_TT,
933-
.flags = TTM_PL_MASK_CACHING
915+
.flags = 0
934916
};
935917
struct ttm_placement placement;
936918
struct ttm_resource tmp_reg;

‎drivers/gpu/drm/qxl/qxl_object.c‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -64,21 +64,21 @@ void qxl_ttm_placement_from_domain(struct qxl_bo *qbo, u32 domain)
6464
qbo->placement.busy_placement = qbo->placements;
6565
if (domain == QXL_GEM_DOMAIN_VRAM) {
6666
qbo->placements[c].mem_type = TTM_PL_VRAM;
67-
qbo->placements[c++].flags = TTM_PL_FLAG_CACHED | pflag;
67+
qbo->placements[c++].flags = pflag;
6868
}
6969
if (domain == QXL_GEM_DOMAIN_SURFACE) {
7070
qbo->placements[c].mem_type = TTM_PL_PRIV;
71-
qbo->placements[c++].flags = TTM_PL_FLAG_CACHED | pflag;
71+
qbo->placements[c++].flags = pflag;
7272
qbo->placements[c].mem_type = TTM_PL_VRAM;
73-
qbo->placements[c++].flags = TTM_PL_FLAG_CACHED | pflag;
73+
qbo->placements[c++].flags = pflag;
7474
}
7575
if (domain == QXL_GEM_DOMAIN_CPU) {
7676
qbo->placements[c].mem_type = TTM_PL_SYSTEM;
77-
qbo->placements[c++].flags = TTM_PL_MASK_CACHING | pflag;
77+
qbo->placements[c++].flags = pflag;
7878
}
7979
if (!c) {
8080
qbo->placements[c].mem_type = TTM_PL_SYSTEM;
81-
qbo->placements[c++].flags = TTM_PL_MASK_CACHING;
81+
qbo->placements[c++].flags = 0;
8282
}
8383
qbo->placement.num_placement = c;
8484
qbo->placement.num_busy_placement = c;

‎drivers/gpu/drm/qxl/qxl_ttm.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -56,7 +56,7 @@ static void qxl_evict_flags(struct ttm_buffer_object *bo,
5656
.fpfn = 0,
5757
.lpfn = 0,
5858
.mem_type = TTM_PL_SYSTEM,
59-
.flags = TTM_PL_MASK_CACHING
59+
.flags = 0
6060
};
6161

6262
if (!qxl_ttm_bo_is_qxl_bo(bo)) {

‎drivers/gpu/drm/radeon/radeon_object.c‎

Lines changed: 9 additions & 37 deletions
Original file line numberDiff line numberDiff line change
@@ -113,57 +113,29 @@ void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain)
113113
rbo->placements[c].fpfn =
114114
rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT;
115115
rbo->placements[c].mem_type = TTM_PL_VRAM;
116-
rbo->placements[c++].flags = TTM_PL_FLAG_WC |
117-
TTM_PL_FLAG_UNCACHED;
116+
rbo->placements[c++].flags = 0;
118117
}
119118

120119
rbo->placements[c].fpfn = 0;
121120
rbo->placements[c].mem_type = TTM_PL_VRAM;
122-
rbo->placements[c++].flags = TTM_PL_FLAG_WC |
123-
TTM_PL_FLAG_UNCACHED;
121+
rbo->placements[c++].flags = 0;
124122
}
125123

126124
if (domain & RADEON_GEM_DOMAIN_GTT) {
127-
if (rbo->flags & RADEON_GEM_GTT_UC) {
128-
rbo->placements[c].fpfn = 0;
129-
rbo->placements[c].mem_type = TTM_PL_TT;
130-
rbo->placements[c++].flags = TTM_PL_FLAG_UNCACHED;
131-
132-
} else if ((rbo->flags & RADEON_GEM_GTT_WC) ||
133-
(rbo->rdev->flags & RADEON_IS_AGP)) {
134-
rbo->placements[c].fpfn = 0;
135-
rbo->placements[c].mem_type = TTM_PL_TT;
136-
rbo->placements[c++].flags = TTM_PL_FLAG_WC |
137-
TTM_PL_FLAG_UNCACHED;
138-
} else {
139-
rbo->placements[c].fpfn = 0;
140-
rbo->placements[c].mem_type = TTM_PL_TT;
141-
rbo->placements[c++].flags = TTM_PL_FLAG_CACHED;
142-
}
125+
rbo->placements[c].fpfn = 0;
126+
rbo->placements[c].mem_type = TTM_PL_TT;
127+
rbo->placements[c++].flags = 0;
143128
}
144129

145130
if (domain & RADEON_GEM_DOMAIN_CPU) {
146-
if (rbo->flags & RADEON_GEM_GTT_UC) {
147-
rbo->placements[c].fpfn = 0;
148-
rbo->placements[c].mem_type = TTM_PL_SYSTEM;
149-
rbo->placements[c++].flags = TTM_PL_FLAG_UNCACHED;
150-
151-
} else if ((rbo->flags & RADEON_GEM_GTT_WC) ||
152-
rbo->rdev->flags & RADEON_IS_AGP) {
153-
rbo->placements[c].fpfn = 0;
154-
rbo->placements[c].mem_type = TTM_PL_SYSTEM;
155-
rbo->placements[c++].flags = TTM_PL_FLAG_WC |
156-
TTM_PL_FLAG_UNCACHED;
157-
} else {
158-
rbo->placements[c].fpfn = 0;
159-
rbo->placements[c].mem_type = TTM_PL_SYSTEM;
160-
rbo->placements[c++].flags = TTM_PL_FLAG_CACHED;
161-
}
131+
rbo->placements[c].fpfn = 0;
132+
rbo->placements[c].mem_type = TTM_PL_SYSTEM;
133+
rbo->placements[c++].flags = 0;
162134
}
163135
if (!c) {
164136
rbo->placements[c].fpfn = 0;
165137
rbo->placements[c].mem_type = TTM_PL_SYSTEM;
166-
rbo->placements[c++].flags = TTM_PL_MASK_CACHING;
138+
rbo->placements[c++].flags = 0;
167139
}
168140

169141
rbo->placement.num_placement = c;

‎drivers/gpu/drm/radeon/radeon_ttm.c‎

Lines changed: 4 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -89,7 +89,7 @@ static void radeon_evict_flags(struct ttm_buffer_object *bo,
8989
.fpfn = 0,
9090
.lpfn = 0,
9191
.mem_type = TTM_PL_SYSTEM,
92-
.flags = TTM_PL_MASK_CACHING
92+
.flags = 0
9393
};
9494

9595
struct radeon_bo *rbo;
@@ -225,17 +225,12 @@ static int radeon_move_vram_ram(struct ttm_buffer_object *bo,
225225
placements.fpfn = 0;
226226
placements.lpfn = 0;
227227
placements.mem_type = TTM_PL_TT;
228-
placements.flags = TTM_PL_MASK_CACHING;
228+
placements.flags = 0;
229229
r = ttm_bo_mem_space(bo, &placement, &tmp_mem, ctx);
230230
if (unlikely(r)) {
231231
return r;
232232
}
233233

234-
r = ttm_tt_set_placement_caching(bo->ttm, tmp_mem.placement);
235-
if (unlikely(r)) {
236-
goto out_cleanup;
237-
}
238-
239234
r = ttm_tt_populate(bo->bdev, bo->ttm, ctx);
240235
if (unlikely(r)) {
241236
goto out_cleanup;
@@ -275,7 +270,7 @@ static int radeon_move_ram_vram(struct ttm_buffer_object *bo,
275270
placements.fpfn = 0;
276271
placements.lpfn = 0;
277272
placements.mem_type = TTM_PL_TT;
278-
placements.flags = TTM_PL_MASK_CACHING;
273+
placements.flags = 0;
279274
r = ttm_bo_mem_space(bo, &placement, &tmp_mem, ctx);
280275
if (unlikely(r)) {
281276
return r;
@@ -389,12 +384,7 @@ static int radeon_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_reso
389384
* Alpha: use bus.addr to hold the ioremap() return,
390385
* so we can modify bus.base below.
391386
*/
392-
if (mem->placement & TTM_PL_FLAG_WC)
393-
mem->bus.addr =
394-
ioremap_wc(mem->bus.offset, bus_size);
395-
else
396-
mem->bus.addr =
397-
ioremap(mem->bus.offset, bus_size);
387+
mem->bus.addr = ioremap_wc(mem->bus.offset, bus_size);
398388
if (!mem->bus.addr)
399389
return -ENOMEM;
400390

‎drivers/gpu/drm/ttm/ttm_agp_backend.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -54,7 +54,7 @@ int ttm_agp_bind(struct ttm_tt *ttm, struct ttm_resource *bo_mem)
5454
struct page *dummy_read_page = ttm_bo_glob.dummy_read_page;
5555
struct drm_mm_node *node = bo_mem->mm_node;
5656
struct agp_memory *mem;
57-
int ret, cached = (bo_mem->placement & TTM_PL_FLAG_CACHED);
57+
int ret, cached = ttm->caching == ttm_cached;
5858
unsigned i;
5959

6060
if (agp_be->mem)

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