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agd5fairlied
agd5f
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drm/radeon/kms: minor pm cleanups
- remove non_clock_info struct - track power state misc flags Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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6 files changed

+24
-32
lines changed

6 files changed

+24
-32
lines changed

‎drivers/gpu/drm/radeon/r100.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -137,7 +137,7 @@ void r100_get_power_state(struct radeon_device *rdev,
137137
rdev->pm.power_state[rdev->pm.requested_power_state_index].
138138
clock_info[rdev->pm.requested_clock_mode_index].mclk,
139139
rdev->pm.power_state[rdev->pm.requested_power_state_index].
140-
non_clock_info.pcie_lanes);
140+
pcie_lanes);
141141
}
142142

143143
void r100_set_power_state(struct radeon_device *rdev)

‎drivers/gpu/drm/radeon/r600.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -234,7 +234,7 @@ void r600_get_power_state(struct radeon_device *rdev,
234234
rdev->pm.power_state[rdev->pm.requested_power_state_index].
235235
clock_info[rdev->pm.requested_clock_mode_index].mclk,
236236
rdev->pm.power_state[rdev->pm.requested_power_state_index].
237-
non_clock_info.pcie_lanes);
237+
pcie_lanes);
238238
}
239239

240240
void r600_set_power_state(struct radeon_device *rdev)

‎drivers/gpu/drm/radeon/radeon.h‎

Lines changed: 3 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -654,13 +654,6 @@ struct radeon_voltage {
654654
u32 voltage;
655655
};
656656

657-
struct radeon_pm_non_clock_info {
658-
/* pcie lanes */
659-
int pcie_lanes;
660-
/* standardized non-clock flags */
661-
u32 flags;
662-
};
663-
664657
struct radeon_pm_clock_info {
665658
/* memory clock */
666659
u32 mclk;
@@ -682,11 +675,11 @@ struct radeon_power_state {
682675
/* number of valid clock modes in this power state */
683676
int num_clock_modes;
684677
struct radeon_pm_clock_info *default_clock_mode;
685-
/* non clock info about this state */
686-
struct radeon_pm_non_clock_info non_clock_info;
687-
bool voltage_drop_active;
688678
/* standardized state flags */
689679
u32 flags;
680+
u32 misc; /* vbios specific flags */
681+
u32 misc2; /* vbios specific flags */
682+
int pcie_lanes; /* pcie lanes */
690683
};
691684

692685
/*

‎drivers/gpu/drm/radeon/radeon_atombios.c‎

Lines changed: 14 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1528,7 +1528,7 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
15281528
if ((rdev->pm.power_state[state_index].clock_info[0].mclk == 0) ||
15291529
(rdev->pm.power_state[state_index].clock_info[0].sclk == 0))
15301530
continue;
1531-
rdev->pm.power_state[state_index].non_clock_info.pcie_lanes =
1531+
rdev->pm.power_state[state_index].pcie_lanes =
15321532
power_info->info.asPowerPlayInfo[i].ucNumPciELanes;
15331533
misc = le32_to_cpu(power_info->info.asPowerPlayInfo[i].ulMiscInfo);
15341534
if (misc & ATOM_PM_MISCINFO_VOLTAGE_DROP_SUPPORT) {
@@ -1550,6 +1550,7 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
15501550
power_info->info.asPowerPlayInfo[i].ucVoltageDropIndex;
15511551
}
15521552
rdev->pm.power_state[state_index].flags = RADEON_PM_SINGLE_DISPLAY_ONLY;
1553+
rdev->pm.power_state[state_index].misc = misc;
15531554
/* order matters! */
15541555
if (misc & ATOM_PM_MISCINFO_POWER_SAVING_MODE)
15551556
rdev->pm.power_state[state_index].type =
@@ -1590,7 +1591,7 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
15901591
if ((rdev->pm.power_state[state_index].clock_info[0].mclk == 0) ||
15911592
(rdev->pm.power_state[state_index].clock_info[0].sclk == 0))
15921593
continue;
1593-
rdev->pm.power_state[state_index].non_clock_info.pcie_lanes =
1594+
rdev->pm.power_state[state_index].pcie_lanes =
15941595
power_info->info_2.asPowerPlayInfo[i].ucNumPciELanes;
15951596
misc = le32_to_cpu(power_info->info_2.asPowerPlayInfo[i].ulMiscInfo);
15961597
misc2 = le32_to_cpu(power_info->info_2.asPowerPlayInfo[i].ulMiscInfo2);
@@ -1613,6 +1614,8 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
16131614
power_info->info_2.asPowerPlayInfo[i].ucVoltageDropIndex;
16141615
}
16151616
rdev->pm.power_state[state_index].flags = RADEON_PM_SINGLE_DISPLAY_ONLY;
1617+
rdev->pm.power_state[state_index].misc = misc;
1618+
rdev->pm.power_state[state_index].misc2 = misc2;
16161619
/* order matters! */
16171620
if (misc & ATOM_PM_MISCINFO_POWER_SAVING_MODE)
16181621
rdev->pm.power_state[state_index].type =
@@ -1659,7 +1662,7 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
16591662
if ((rdev->pm.power_state[state_index].clock_info[0].mclk == 0) ||
16601663
(rdev->pm.power_state[state_index].clock_info[0].sclk == 0))
16611664
continue;
1662-
rdev->pm.power_state[state_index].non_clock_info.pcie_lanes =
1665+
rdev->pm.power_state[state_index].pcie_lanes =
16631666
power_info->info_3.asPowerPlayInfo[i].ucNumPciELanes;
16641667
misc = le32_to_cpu(power_info->info_3.asPowerPlayInfo[i].ulMiscInfo);
16651668
misc2 = le32_to_cpu(power_info->info_3.asPowerPlayInfo[i].ulMiscInfo2);
@@ -1688,6 +1691,8 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
16881691
}
16891692
}
16901693
rdev->pm.power_state[state_index].flags = RADEON_PM_SINGLE_DISPLAY_ONLY;
1694+
rdev->pm.power_state[state_index].misc = misc;
1695+
rdev->pm.power_state[state_index].misc2 = misc2;
16911696
/* order matters! */
16921697
if (misc & ATOM_PM_MISCINFO_POWER_SAVING_MODE)
16931698
rdev->pm.power_state[state_index].type =
@@ -1730,6 +1735,8 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
17301735
&rdev->pm.power_state[state_index - 1].clock_info[0];
17311736
rdev->pm.power_state[state_index].flags &=
17321737
~RADEON_PM_SINGLE_DISPLAY_ONLY;
1738+
rdev->pm.power_state[state_index].misc = 0;
1739+
rdev->pm.power_state[state_index].misc2 = 0;
17331740
}
17341741
} else {
17351742
/* add the i2c bus for thermal/fan chip */
@@ -1852,7 +1859,9 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
18521859
if (mode_index) {
18531860
misc = le32_to_cpu(non_clock_info->ulCapsAndSettings);
18541861
misc2 = le16_to_cpu(non_clock_info->usClassification);
1855-
rdev->pm.power_state[state_index].non_clock_info.pcie_lanes =
1862+
rdev->pm.power_state[state_index].misc = misc;
1863+
rdev->pm.power_state[state_index].misc2 = misc2;
1864+
rdev->pm.power_state[state_index].pcie_lanes =
18561865
((misc & ATOM_PPLIB_PCIE_LINK_WIDTH_MASK) >>
18571866
ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT) + 1;
18581867
switch (misc2 & ATOM_PPLIB_CLASSIFICATION_UI_MASK) {
@@ -1902,10 +1911,7 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
19021911
rdev->pm.power_state[state_index].default_clock_mode =
19031912
&rdev->pm.power_state[state_index].clock_info[0];
19041913
rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE;
1905-
if (rdev->asic->get_pcie_lanes)
1906-
rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = radeon_get_pcie_lanes(rdev);
1907-
else
1908-
rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = 16;
1914+
rdev->pm.power_state[state_index].pcie_lanes = 16;
19091915
rdev->pm.default_power_state_index = state_index;
19101916
rdev->pm.power_state[state_index].flags = 0;
19111917
state_index++;

‎drivers/gpu/drm/radeon/radeon_combios.c‎

Lines changed: 4 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -2382,17 +2382,13 @@ void radeon_combios_get_power_modes(struct radeon_device *rdev)
23822382
if ((rdev->pm.power_state[state_index].clock_info[0].mclk == 0) ||
23832383
(rdev->pm.power_state[state_index].clock_info[0].sclk == 0))
23842384
goto default_mode;
2385-
/* skip overclock modes for now */
2386-
if ((rdev->pm.power_state[state_index].clock_info[0].mclk >
2387-
rdev->clock.default_mclk + RADEON_MODE_OVERCLOCK_MARGIN) ||
2388-
(rdev->pm.power_state[state_index].clock_info[0].sclk >
2389-
rdev->clock.default_sclk + RADEON_MODE_OVERCLOCK_MARGIN))
2390-
goto default_mode;
23912385
rdev->pm.power_state[state_index].type =
23922386
POWER_STATE_TYPE_BATTERY;
23932387
misc = RBIOS16(offset + 0x5 + 0x0);
23942388
if (rev > 4)
23952389
misc2 = RBIOS16(offset + 0x5 + 0xe);
2390+
rdev->pm.power_state[state_index].misc = misc;
2391+
rdev->pm.power_state[state_index].misc2 = misc2;
23962392
if (misc & 0x4) {
23972393
rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_GPIO;
23982394
if (misc & 0x8)
@@ -2439,7 +2435,7 @@ void radeon_combios_get_power_modes(struct radeon_device *rdev)
24392435
} else
24402436
rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE;
24412437
if (rev > 6)
2442-
rdev->pm.power_state[state_index].non_clock_info.pcie_lanes =
2438+
rdev->pm.power_state[state_index].pcie_lanes =
24432439
RBIOS8(offset + 0x5 + 0x10);
24442440
rdev->pm.power_state[state_index].flags = RADEON_PM_SINGLE_DISPLAY_ONLY;
24452441
state_index++;
@@ -2459,10 +2455,7 @@ void radeon_combios_get_power_modes(struct radeon_device *rdev)
24592455
rdev->pm.power_state[state_index].clock_info[0].sclk = rdev->clock.default_sclk;
24602456
rdev->pm.power_state[state_index].default_clock_mode = &rdev->pm.power_state[state_index].clock_info[0];
24612457
rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE;
2462-
if (rdev->asic->get_pcie_lanes)
2463-
rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = radeon_get_pcie_lanes(rdev);
2464-
else
2465-
rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = 16;
2458+
rdev->pm.power_state[state_index].pcie_lanes = 16;
24662459
rdev->pm.power_state[state_index].flags = 0;
24672460
rdev->pm.default_power_state_index = state_index;
24682461
rdev->pm.num_power_states = state_index + 1;

‎drivers/gpu/drm/radeon/radeon_pm.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -64,7 +64,7 @@ static void radeon_print_power_mode_info(struct radeon_device *rdev)
6464
pm_state_types[rdev->pm.power_state[i].type],
6565
is_default ? "(default)" : "");
6666
if ((rdev->flags & RADEON_IS_PCIE) && !(rdev->flags & RADEON_IS_IGP))
67-
DRM_INFO("\t%d PCIE Lanes\n", rdev->pm.power_state[i].non_clock_info.pcie_lanes);
67+
DRM_INFO("\t%d PCIE Lanes\n", rdev->pm.power_state[i].pcie_lanes);
6868
if (rdev->pm.power_state[i].flags & RADEON_PM_SINGLE_DISPLAY_ONLY)
6969
DRM_INFO("\tSingle display only\n");
7070
DRM_INFO("\t%d Clock Mode(s)\n", rdev->pm.power_state[i].num_clock_modes);

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