Skip to content

Commit adba838

Browse files
rtlwifi-linuxKalle Valo
authored andcommitted
rtw88: coex: 8821c: correct antenna switch function
This patch fixes a defect that uses incorrect function to access registers. Use 8 and 32 bit access function to access 8 and 32 bit long data respectively. Signed-off-by: Guo-Feng Fan <vincent_fann@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20210202055012.8296-2-pkshih@realtek.com
1 parent 711fa16 commit adba838

File tree

1 file changed

+8
-8
lines changed

1 file changed

+8
-8
lines changed

drivers/net/wireless/realtek/rtw88/rtw8821c.c

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -719,8 +719,8 @@ static void rtw8821c_coex_cfg_ant_switch(struct rtw_dev *rtwdev, u8 ctrl_type,
719719
regval = (!polarity_inverse ? 0x1 : 0x2);
720720
}
721721

722-
rtw_write8_mask(rtwdev, REG_RFE_CTRL8, BIT_MASK_R_RFE_SEL_15,
723-
regval);
722+
rtw_write32_mask(rtwdev, REG_RFE_CTRL8, BIT_MASK_R_RFE_SEL_15,
723+
regval);
724724
break;
725725
case COEX_SWITCH_CTRL_BY_PTA:
726726
rtw_write32_clr(rtwdev, REG_LED_CFG, BIT_DPDT_SEL_EN);
@@ -730,8 +730,8 @@ static void rtw8821c_coex_cfg_ant_switch(struct rtw_dev *rtwdev, u8 ctrl_type,
730730
PTA_CTRL_PIN);
731731

732732
regval = (!polarity_inverse ? 0x2 : 0x1);
733-
rtw_write8_mask(rtwdev, REG_RFE_CTRL8, BIT_MASK_R_RFE_SEL_15,
734-
regval);
733+
rtw_write32_mask(rtwdev, REG_RFE_CTRL8, BIT_MASK_R_RFE_SEL_15,
734+
regval);
735735
break;
736736
case COEX_SWITCH_CTRL_BY_ANTDIV:
737737
rtw_write32_clr(rtwdev, REG_LED_CFG, BIT_DPDT_SEL_EN);
@@ -757,11 +757,11 @@ static void rtw8821c_coex_cfg_ant_switch(struct rtw_dev *rtwdev, u8 ctrl_type,
757757
}
758758

759759
if (ctrl_type == COEX_SWITCH_CTRL_BY_BT) {
760-
rtw_write32_clr(rtwdev, REG_CTRL_TYPE, BIT_CTRL_TYPE1);
761-
rtw_write32_clr(rtwdev, REG_CTRL_TYPE, BIT_CTRL_TYPE2);
760+
rtw_write8_clr(rtwdev, REG_CTRL_TYPE, BIT_CTRL_TYPE1);
761+
rtw_write8_clr(rtwdev, REG_CTRL_TYPE, BIT_CTRL_TYPE2);
762762
} else {
763-
rtw_write32_set(rtwdev, REG_CTRL_TYPE, BIT_CTRL_TYPE1);
764-
rtw_write32_set(rtwdev, REG_CTRL_TYPE, BIT_CTRL_TYPE2);
763+
rtw_write8_set(rtwdev, REG_CTRL_TYPE, BIT_CTRL_TYPE1);
764+
rtw_write8_set(rtwdev, REG_CTRL_TYPE, BIT_CTRL_TYPE2);
765765
}
766766
}
767767

0 commit comments

Comments
 (0)