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erezamellanoxSaeed Mahameed
erezamellanox
authored and
Saeed Mahameed
committed
net/mlx5: LAG, Use port enumerators
Instead of using explicit array indexes, simply use ports enumerators to make the code more readable. Fixes: 7907f23 ("net/mlx5: Implement RoCE LAG feature") Signed-off-by: Erez Alfasi <ereza@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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-57
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3 files changed

+69
-57
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‎drivers/net/ethernet/mellanox/mlx5/core/lag.c‎

Lines changed: 35 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -145,34 +145,35 @@ static void mlx5_infer_tx_affinity_mapping(struct lag_tracker *tracker,
145145
{
146146
*port1 = 1;
147147
*port2 = 2;
148-
if (!tracker->netdev_state[0].tx_enabled ||
149-
!tracker->netdev_state[0].link_up) {
148+
if (!tracker->netdev_state[MLX5_LAG_P1].tx_enabled ||
149+
!tracker->netdev_state[MLX5_LAG_P1].link_up) {
150150
*port1 = 2;
151151
return;
152152
}
153153

154-
if (!tracker->netdev_state[1].tx_enabled ||
155-
!tracker->netdev_state[1].link_up)
154+
if (!tracker->netdev_state[MLX5_LAG_P2].tx_enabled ||
155+
!tracker->netdev_state[MLX5_LAG_P2].link_up)
156156
*port2 = 1;
157157
}
158158

159159
void mlx5_modify_lag(struct mlx5_lag *ldev,
160160
struct lag_tracker *tracker)
161161
{
162-
struct mlx5_core_dev *dev0 = ldev->pf[0].dev;
162+
struct mlx5_core_dev *dev0 = ldev->pf[MLX5_LAG_P1].dev;
163163
u8 v2p_port1, v2p_port2;
164164
int err;
165165

166166
mlx5_infer_tx_affinity_mapping(tracker, &v2p_port1,
167167
&v2p_port2);
168168

169-
if (v2p_port1 != ldev->v2p_map[0] ||
170-
v2p_port2 != ldev->v2p_map[1]) {
171-
ldev->v2p_map[0] = v2p_port1;
172-
ldev->v2p_map[1] = v2p_port2;
169+
if (v2p_port1 != ldev->v2p_map[MLX5_LAG_P1] ||
170+
v2p_port2 != ldev->v2p_map[MLX5_LAG_P2]) {
171+
ldev->v2p_map[MLX5_LAG_P1] = v2p_port1;
172+
ldev->v2p_map[MLX5_LAG_P2] = v2p_port2;
173173

174174
mlx5_core_info(dev0, "modify lag map port 1:%d port 2:%d",
175-
ldev->v2p_map[0], ldev->v2p_map[1]);
175+
ldev->v2p_map[MLX5_LAG_P1],
176+
ldev->v2p_map[MLX5_LAG_P2]);
176177

177178
err = mlx5_cmd_modify_lag(dev0, v2p_port1, v2p_port2);
178179
if (err)
@@ -185,16 +186,17 @@ void mlx5_modify_lag(struct mlx5_lag *ldev,
185186
static int mlx5_create_lag(struct mlx5_lag *ldev,
186187
struct lag_tracker *tracker)
187188
{
188-
struct mlx5_core_dev *dev0 = ldev->pf[0].dev;
189+
struct mlx5_core_dev *dev0 = ldev->pf[MLX5_LAG_P1].dev;
189190
int err;
190191

191-
mlx5_infer_tx_affinity_mapping(tracker, &ldev->v2p_map[0],
192-
&ldev->v2p_map[1]);
192+
mlx5_infer_tx_affinity_mapping(tracker, &ldev->v2p_map[MLX5_LAG_P1],
193+
&ldev->v2p_map[MLX5_LAG_P2]);
193194

194195
mlx5_core_info(dev0, "lag map port 1:%d port 2:%d",
195-
ldev->v2p_map[0], ldev->v2p_map[1]);
196+
ldev->v2p_map[MLX5_LAG_P1], ldev->v2p_map[MLX5_LAG_P2]);
196197

197-
err = mlx5_cmd_create_lag(dev0, ldev->v2p_map[0], ldev->v2p_map[1]);
198+
err = mlx5_cmd_create_lag(dev0, ldev->v2p_map[MLX5_LAG_P1],
199+
ldev->v2p_map[MLX5_LAG_P2]);
198200
if (err)
199201
mlx5_core_err(dev0,
200202
"Failed to create LAG (%d)\n",
@@ -207,7 +209,7 @@ int mlx5_activate_lag(struct mlx5_lag *ldev,
207209
u8 flags)
208210
{
209211
bool roce_lag = !!(flags & MLX5_LAG_FLAG_ROCE);
210-
struct mlx5_core_dev *dev0 = ldev->pf[0].dev;
212+
struct mlx5_core_dev *dev0 = ldev->pf[MLX5_LAG_P1].dev;
211213
int err;
212214

213215
err = mlx5_create_lag(ldev, tracker);
@@ -229,7 +231,7 @@ int mlx5_activate_lag(struct mlx5_lag *ldev,
229231

230232
static int mlx5_deactivate_lag(struct mlx5_lag *ldev)
231233
{
232-
struct mlx5_core_dev *dev0 = ldev->pf[0].dev;
234+
struct mlx5_core_dev *dev0 = ldev->pf[MLX5_LAG_P1].dev;
233235
bool roce_lag = __mlx5_lag_is_roce(ldev);
234236
int err;
235237

@@ -252,14 +254,15 @@ static int mlx5_deactivate_lag(struct mlx5_lag *ldev)
252254

253255
static bool mlx5_lag_check_prereq(struct mlx5_lag *ldev)
254256
{
255-
if (!ldev->pf[0].dev || !ldev->pf[1].dev)
257+
if (!ldev->pf[MLX5_LAG_P1].dev || !ldev->pf[MLX5_LAG_P2].dev)
256258
return false;
257259

258260
#ifdef CONFIG_MLX5_ESWITCH
259-
return mlx5_esw_lag_prereq(ldev->pf[0].dev, ldev->pf[1].dev);
261+
return mlx5_esw_lag_prereq(ldev->pf[MLX5_LAG_P1].dev,
262+
ldev->pf[MLX5_LAG_P2].dev);
260263
#else
261-
return (!mlx5_sriov_is_enabled(ldev->pf[0].dev) &&
262-
!mlx5_sriov_is_enabled(ldev->pf[1].dev));
264+
return (!mlx5_sriov_is_enabled(ldev->pf[MLX5_LAG_P1].dev) &&
265+
!mlx5_sriov_is_enabled(ldev->pf[MLX5_LAG_P2].dev));
263266
#endif
264267
}
265268

@@ -285,8 +288,8 @@ static void mlx5_lag_remove_ib_devices(struct mlx5_lag *ldev)
285288

286289
static void mlx5_do_bond(struct mlx5_lag *ldev)
287290
{
288-
struct mlx5_core_dev *dev0 = ldev->pf[0].dev;
289-
struct mlx5_core_dev *dev1 = ldev->pf[1].dev;
291+
struct mlx5_core_dev *dev0 = ldev->pf[MLX5_LAG_P1].dev;
292+
struct mlx5_core_dev *dev1 = ldev->pf[MLX5_LAG_P2].dev;
290293
struct lag_tracker tracker;
291294
bool do_bond, roce_lag;
292295
int err;
@@ -692,10 +695,11 @@ struct net_device *mlx5_lag_get_roce_netdev(struct mlx5_core_dev *dev)
692695
goto unlock;
693696

694697
if (ldev->tracker.tx_type == NETDEV_LAG_TX_TYPE_ACTIVEBACKUP) {
695-
ndev = ldev->tracker.netdev_state[0].tx_enabled ?
696-
ldev->pf[0].netdev : ldev->pf[1].netdev;
698+
ndev = ldev->tracker.netdev_state[MLX5_LAG_P1].tx_enabled ?
699+
ldev->pf[MLX5_LAG_P1].netdev :
700+
ldev->pf[MLX5_LAG_P2].netdev;
697701
} else {
698-
ndev = ldev->pf[0].netdev;
702+
ndev = ldev->pf[MLX5_LAG_P1].netdev;
699703
}
700704
if (ndev)
701705
dev_hold(ndev);
@@ -717,7 +721,8 @@ bool mlx5_lag_intf_add(struct mlx5_interface *intf, struct mlx5_priv *priv)
717721
return true;
718722

719723
ldev = mlx5_lag_dev_get(dev);
720-
if (!ldev || !__mlx5_lag_is_roce(ldev) || ldev->pf[0].dev == dev)
724+
if (!ldev || !__mlx5_lag_is_roce(ldev) ||
725+
ldev->pf[MLX5_LAG_P1].dev == dev)
721726
return true;
722727

723728
/* If bonded, we do not add an IB device for PF1. */
@@ -746,11 +751,11 @@ int mlx5_lag_query_cong_counters(struct mlx5_core_dev *dev,
746751
ldev = mlx5_lag_dev_get(dev);
747752
if (ldev && __mlx5_lag_is_roce(ldev)) {
748753
num_ports = MLX5_MAX_PORTS;
749-
mdev[0] = ldev->pf[0].dev;
750-
mdev[1] = ldev->pf[1].dev;
754+
mdev[MLX5_LAG_P1] = ldev->pf[MLX5_LAG_P1].dev;
755+
mdev[MLX5_LAG_P2] = ldev->pf[MLX5_LAG_P2].dev;
751756
} else {
752757
num_ports = 1;
753-
mdev[0] = dev;
758+
mdev[MLX5_LAG_P1] = dev;
754759
}
755760

756761
for (i = 0; i < num_ports; ++i) {

‎drivers/net/ethernet/mellanox/mlx5/core/lag.h‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,11 @@
77
#include "mlx5_core.h"
88
#include "lag_mp.h"
99

10+
enum {
11+
MLX5_LAG_P1,
12+
MLX5_LAG_P2,
13+
};
14+
1015
enum {
1116
MLX5_LAG_FLAG_ROCE = 1 << 0,
1217
MLX5_LAG_FLAG_SRIOV = 1 << 1,

‎drivers/net/ethernet/mellanox/mlx5/core/lag_mp.c‎

Lines changed: 29 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -11,10 +11,11 @@
1111

1212
static bool mlx5_lag_multipath_check_prereq(struct mlx5_lag *ldev)
1313
{
14-
if (!ldev->pf[0].dev || !ldev->pf[1].dev)
14+
if (!ldev->pf[MLX5_LAG_P1].dev || !ldev->pf[MLX5_LAG_P2].dev)
1515
return false;
1616

17-
return mlx5_esw_multipath_prereq(ldev->pf[0].dev, ldev->pf[1].dev);
17+
return mlx5_esw_multipath_prereq(ldev->pf[MLX5_LAG_P1].dev,
18+
ldev->pf[MLX5_LAG_P2].dev);
1819
}
1920

2021
static bool __mlx5_lag_is_multipath(struct mlx5_lag *ldev)
@@ -52,36 +53,36 @@ static void mlx5_lag_set_port_affinity(struct mlx5_lag *ldev, int port)
5253

5354
switch (port) {
5455
case 0:
55-
tracker.netdev_state[0].tx_enabled = true;
56-
tracker.netdev_state[1].tx_enabled = true;
57-
tracker.netdev_state[0].link_up = true;
58-
tracker.netdev_state[1].link_up = true;
56+
tracker.netdev_state[MLX5_LAG_P1].tx_enabled = true;
57+
tracker.netdev_state[MLX5_LAG_P2].tx_enabled = true;
58+
tracker.netdev_state[MLX5_LAG_P1].link_up = true;
59+
tracker.netdev_state[MLX5_LAG_P2].link_up = true;
5960
break;
6061
case 1:
61-
tracker.netdev_state[0].tx_enabled = true;
62-
tracker.netdev_state[0].link_up = true;
63-
tracker.netdev_state[1].tx_enabled = false;
64-
tracker.netdev_state[1].link_up = false;
62+
tracker.netdev_state[MLX5_LAG_P1].tx_enabled = true;
63+
tracker.netdev_state[MLX5_LAG_P1].link_up = true;
64+
tracker.netdev_state[MLX5_LAG_P2].tx_enabled = false;
65+
tracker.netdev_state[MLX5_LAG_P2].link_up = false;
6566
break;
6667
case 2:
67-
tracker.netdev_state[0].tx_enabled = false;
68-
tracker.netdev_state[0].link_up = false;
69-
tracker.netdev_state[1].tx_enabled = true;
70-
tracker.netdev_state[1].link_up = true;
68+
tracker.netdev_state[MLX5_LAG_P1].tx_enabled = false;
69+
tracker.netdev_state[MLX5_LAG_P1].link_up = false;
70+
tracker.netdev_state[MLX5_LAG_P2].tx_enabled = true;
71+
tracker.netdev_state[MLX5_LAG_P2].link_up = true;
7172
break;
7273
default:
73-
mlx5_core_warn(ldev->pf[0].dev, "Invalid affinity port %d",
74-
port);
74+
mlx5_core_warn(ldev->pf[MLX5_LAG_P1].dev,
75+
"Invalid affinity port %d", port);
7576
return;
7677
}
7778

78-
if (tracker.netdev_state[0].tx_enabled)
79-
mlx5_notifier_call_chain(ldev->pf[0].dev->priv.events,
79+
if (tracker.netdev_state[MLX5_LAG_P1].tx_enabled)
80+
mlx5_notifier_call_chain(ldev->pf[MLX5_LAG_P1].dev->priv.events,
8081
MLX5_DEV_EVENT_PORT_AFFINITY,
8182
(void *)0);
8283

83-
if (tracker.netdev_state[1].tx_enabled)
84-
mlx5_notifier_call_chain(ldev->pf[1].dev->priv.events,
84+
if (tracker.netdev_state[MLX5_LAG_P2].tx_enabled)
85+
mlx5_notifier_call_chain(ldev->pf[MLX5_LAG_P2].dev->priv.events,
8586
MLX5_DEV_EVENT_PORT_AFFINITY,
8687
(void *)0);
8788

@@ -141,11 +142,12 @@ static void mlx5_lag_fib_route_event(struct mlx5_lag *ldev,
141142
/* Verify next hops are ports of the same hca */
142143
fib_nh0 = fib_info_nh(fi, 0);
143144
fib_nh1 = fib_info_nh(fi, 1);
144-
if (!(fib_nh0->fib_nh_dev == ldev->pf[0].netdev &&
145-
fib_nh1->fib_nh_dev == ldev->pf[1].netdev) &&
146-
!(fib_nh0->fib_nh_dev == ldev->pf[1].netdev &&
147-
fib_nh1->fib_nh_dev == ldev->pf[0].netdev)) {
148-
mlx5_core_warn(ldev->pf[0].dev, "Multipath offload require two ports of the same HCA\n");
145+
if (!(fib_nh0->fib_nh_dev == ldev->pf[MLX5_LAG_P1].netdev &&
146+
fib_nh1->fib_nh_dev == ldev->pf[MLX5_LAG_P2].netdev) &&
147+
!(fib_nh0->fib_nh_dev == ldev->pf[MLX5_LAG_P2].netdev &&
148+
fib_nh1->fib_nh_dev == ldev->pf[MLX5_LAG_P1].netdev)) {
149+
mlx5_core_warn(ldev->pf[MLX5_LAG_P1].dev,
150+
"Multipath offload require two ports of the same HCA\n");
149151
return;
150152
}
151153

@@ -267,8 +269,8 @@ static int mlx5_lag_fib_event(struct notifier_block *nb,
267269
return notifier_from_errno(-EINVAL);
268270
}
269271
fib_dev = fib_info_nh(fen_info->fi, 0)->fib_nh_dev;
270-
if (fib_dev != ldev->pf[0].netdev &&
271-
fib_dev != ldev->pf[1].netdev) {
272+
if (fib_dev != ldev->pf[MLX5_LAG_P1].netdev &&
273+
fib_dev != ldev->pf[MLX5_LAG_P2].netdev) {
272274
return NOTIFY_DONE;
273275
}
274276
fib_work = mlx5_lag_init_fib_work(ldev, event);

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