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denizzzkadenizzzka
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RISC-V: Fiber native switch context implemented
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3 files changed

+227
-1
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3 files changed

+227
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lines changed

‎druntime/Makefile

+1-1
Original file line numberDiff line numberDiff line change
@@ -393,7 +393,7 @@ $(ROOT)/errno_c$(DOTOBJ) : src/core/stdc/errno.c $(DMD)
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@mkdir -p $(dir $@)
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$(DMD) -c $(DFLAGS) -I. -P=-I. $< -of$@
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$(ROOT)/threadasm$(DOTOBJ) : src/core/thread/fiber/switch_context_asm.S
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$(ROOT)/threadasm$(DOTOBJ) : src/core/thread/fiber/switch_context_asm.S src/core/thread/fiber/switch_context_riscv.S
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@mkdir -p $(dir $@)
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$(CC) -c $(CFLAGS) $< -o$@
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‎druntime/src/core/thread/fiber/package.d

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@@ -126,6 +126,16 @@ package
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version = AsmExternal;
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}
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}
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else version (RISCV32)
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{
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version = RISCV_Any;
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version = AsmExternal;
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}
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else version (RISCV64)
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{
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version = RISCV_Any;
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version = AsmExternal;
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}
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else version (SPARC)
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{
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// NOTE: The SPARC ABI specifies only doubleword alignment.
@@ -180,6 +190,13 @@ package
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extern (C) void fiber_switchContext( void** oldp, void* newp ) nothrow @nogc;
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version (AArch64)
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extern (C) void fiber_trampoline() nothrow;
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version (RISCV_Any)
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{
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// External asm stack initialization is used to support different register
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// storage sizes that the D compiler does not know about
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extern (C) void* fiber_initStack(void* stack, void* entry) nothrow @nogc;
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extern (C) void fiber_trampoline() nothrow;
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}
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}
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else
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extern (C) void fiber_switchContext( void** oldp, void* newp ) nothrow @nogc
@@ -363,6 +380,13 @@ package
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jmp RCX;
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}
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}
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else version (RISCV_Any)
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{
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version (StackGrowsDown) {}
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else static assert(false, "RISC-V only supports decrementing stacks");
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pstack = fiber_initStack(pstack, &fiber_trampoline);
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}
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else static if ( __traits( compiles, ucontext_t ) )
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{
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Fiber cfib = Fiber.getThis();

‎druntime/src/core/thread/fiber/switch_context_riscv.S

+202
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,202 @@
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/**
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* Support code for RISC-V fibers.
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*
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* Copyright: Copyright Denis Feklushkin 2025.
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* License: $(HTTP www.boost.org/LICENSE_1_0.txt, Boost License 1.0).
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* Authors: Denis Feklushkin
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*/
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#if defined(__riscv)
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// For save/load a register in memory, regardless of the size of machine register bit size
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#if(__riscv_xlen == 32)
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#define save sw
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#define load lw
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#elif(__riscv_xlen == 64)
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#define save sd
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#define load ld
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#else
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#error Unsupported integer register bit size
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#endif
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// Integer register size, bytes
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reg_s = __riscv_xlen / 8
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#if defined(__riscv_flen)
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#if(__riscv_flen == 32)
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#define fsave fsw
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#define fload flw
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#elif(__riscv_flen == 64)
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#define fsave fsd
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#define fload fld
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#elif(__riscv_flen == 128)
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#define fsave fsq
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#define fload flq
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#else
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#error Unsupported float register bit size
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#endif
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// Floating register size, bytes
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freg_s = __riscv_flen / 8
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#else
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freg_s = 0 // hard float is not supported
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#endif
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ints_storage_size = reg_s * 12 // all callee-saved integer registers (embedded ABI isn't supported for now)
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floats_storage_size = freg_s * 12 // all callee-saved float registers
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/**
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* Parameters:
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* a0 - void* - pointer to a new stack
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* a1 - void* - pointer to the entry point
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*
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* Returns:
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* a0 - void* - modified new stack pointer
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*/
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.text
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.globl fiber_initStack
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.type fiber_initStack, @function
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fiber_initStack:
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// At this point assumed that memory for the stack is already allocated (but not zeroed)
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// adjust stack pointer
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addi a0, a0, -ints_storage_size
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// store entry point start address as saved ra register below stack pointer
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save a1, -reg_s(a0)
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ret
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.text
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.globl fiber_trampoline
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.type fiber_trampoline, @function
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fiber_trampoline:
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.cfi_startproc // necessary for .eh_frame
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// discard ra value - fiber_entryPoint never returns
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.cfi_undefined ra
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// non-returnable jump (i.e., a non-unwinding tail-call) to fiber_entryPoint
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tail fiber_entryPoint
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.cfi_endproc
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/**
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* Parameters:
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* a0 - void** - ptr to old stack pointer
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* a1 - void* - new stack pointer
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*
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* RISCV ABI registers:
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* x0 zero : hardwired to zero
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* x1 ra : return address
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* x2 sp : stack pointer
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* x3 gp : global pointer (variables are ‘relaxed’ and accessed via a relative imm offset from the gp)
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* x4 tp : thread pointer
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* x5-x7 t0-t2 : temporary/scratch registers
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* x8 s0/fp : callee-saved register 0 AKA frame pointer
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* x9 s1 : callee-saved register 1
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* x10-x17 a0-a7 : function arguments
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* x18-x27 s2-s11 : callee-saved registers
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* x28-x31 t3-t6 : temporary/scratch registers
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*
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* (floating registers omitted)
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*/
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.text
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.globl fiber_switchContext
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.type fiber_switchContext, @function
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fiber_switchContext:
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// Reserve space on the stack to store registers
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// Moving stack pointer so hardware stack size checker can make sure
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// that stack boundary are not violated
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addi sp, sp, -(ints_storage_size + floats_storage_size + reg_s /*additional space for ra register*/)
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// Move stack pointer back a little and store ra and floats above of
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// the stack border to avoid GC scan them in the stack frame
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addi sp, sp, reg_s /*excluded ra*/ + floats_storage_size
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// ra stored above of the current stack
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save ra, -(1 * reg_s)(sp)
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#if defined(__riscv_flen)
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// Floats also stored above of the current stack.
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//
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// For the convenience of manual verification counting is shifted so
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// that in most cases register names match the offsets (except the last one).
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//
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// Shift (by ra register size) is added in addition to multiplication due
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// to the fact that the sizes of integer and float registers can differ.
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fsave fs1, -(1 * freg_s + reg_s)(sp)
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fsave fs2, -(2 * freg_s + reg_s)(sp)
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fsave fs3, -(3 * freg_s + reg_s)(sp)
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fsave fs4, -(4 * freg_s + reg_s)(sp)
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fsave fs5, -(5 * freg_s + reg_s)(sp)
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fsave fs6, -(6 * freg_s + reg_s)(sp)
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fsave fs7, -(7 * freg_s + reg_s)(sp)
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fsave fs8, -(8 * freg_s + reg_s)(sp)
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fsave fs9, -(9 * freg_s + reg_s)(sp)
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fsave fs10, -(10 * freg_s + reg_s)(sp)
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fsave fs11, -(11 * freg_s + reg_s)(sp)
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fsave fs0, -(12 * freg_s + reg_s)(sp)
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#endif
141+
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// Integer register data stored on the stack in the usual way
143+
save s0, (0 * reg_s)(sp)
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save s1, (1 * reg_s)(sp)
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save s2, (2 * reg_s)(sp)
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save s3, (3 * reg_s)(sp)
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save s4, (4 * reg_s)(sp)
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save s5, (5 * reg_s)(sp)
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save s6, (6 * reg_s)(sp)
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save s7, (7 * reg_s)(sp)
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save s8, (8 * reg_s)(sp)
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save s9, (9 * reg_s)(sp)
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save s10, (10 * reg_s)(sp)
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save s11, (11 * reg_s)(sp)
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// Save current sp to oldp
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save sp, (a0)
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// Load sp from newp
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addi sp, a1, 0
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// Load ra from above of the stack border
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load ra, -(1 * reg_s)(sp)
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165+
#if defined(__riscv_flen)
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// Loading floats
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fload fs1, -(1 * freg_s + reg_s)(sp)
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fload fs2, -(2 * freg_s + reg_s)(sp)
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fload fs3, -(3 * freg_s + reg_s)(sp)
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fload fs4, -(4 * freg_s + reg_s)(sp)
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fload fs5, -(5 * freg_s + reg_s)(sp)
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fload fs6, -(6 * freg_s + reg_s)(sp)
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fload fs7, -(7 * freg_s + reg_s)(sp)
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fload fs8, -(8 * freg_s + reg_s)(sp)
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fload fs9, -(9 * freg_s + reg_s)(sp)
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fload fs10, -(10 * freg_s + reg_s)(sp)
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fload fs11, -(11 * freg_s + reg_s)(sp)
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fload fs0, -(12 * freg_s + reg_s)(sp)
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#endif
180+
181+
// Load registers from obtained stack
182+
load s0, (0 * reg_s)(sp)
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load s1, (1 * reg_s)(sp)
184+
load s2, (2 * reg_s)(sp)
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load s3, (3 * reg_s)(sp)
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load s4, (4 * reg_s)(sp)
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load s5, (5 * reg_s)(sp)
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load s6, (6 * reg_s)(sp)
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load s7, (7 * reg_s)(sp)
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load s8, (8 * reg_s)(sp)
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load s9, (9 * reg_s)(sp)
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load s10, (10 * reg_s)(sp)
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load s11, (11 * reg_s)(sp)
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// Freeing stack
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// (Floats storage was "freed" before floats was actually stored)
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addi sp, sp, ints_storage_size
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// Return
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jr ra
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#endif

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