Inlined Struct wrapper .ctors are non-zero cost #10540
Labels
area-CodeGen-coreclr
CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
Milestone
Comments
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Method calls themselves are almost zero cost, or at least don't increase at same rate: public static void ViaClass(C c)
{
c.M();
}
public static void ViaStruct3(S1 s1)
{
s1.M();
}
public static void ViaStruct3(S2 s2)
{
s2.M();
}
public static void ViaStruct3(S3 s3)
{
s3.M();
}
public static void ViaStruct4(S4 s4)
{
s4.M();
}
public static void ViaStruct5(S5 s5)
{
s5.M();
}Gives Program.ViaClass(C)
L0000: sub rsp, 0x28
L0004: cmp [rcx], ecx
L0006: call C.M()
L000b: nop
L000c: add rsp, 0x28
L0010: ret
Program.ViaStruct3(S1)
L0000: sub rsp, 0x28
L0004: cmp [rcx], ecx
L0006: call C.M()
L000b: nop
L000c: add rsp, 0x28
L0010: ret
Program.ViaStruct3(S2)
L0000: sub rsp, 0x28
L0004: mov [rsp+0x30], rcx
L0009: mov rcx, [rsp+0x30]
L000e: cmp [rcx], ecx
L0010: call C.M()
L0015: nop
L0016: add rsp, 0x28
L001a: ret
Program.ViaStruct3(S3)
L0000: sub rsp, 0x28
L0004: mov [rsp+0x30], rcx
L0009: mov rcx, [rsp+0x30]
L000e: cmp [rcx], ecx
L0010: call C.M()
L0015: nop
L0016: add rsp, 0x28
L001a: ret
Program.ViaStruct4(S4)
L0000: sub rsp, 0x28
L0004: mov [rsp+0x30], rcx
L0009: mov rcx, [rsp+0x30]
L000e: cmp [rcx], ecx
L0010: call C.M()
L0015: nop
L0016: add rsp, 0x28
L001a: ret
Program.ViaStruct5(S5)
L0000: sub rsp, 0x28
L0004: mov [rsp+0x30], rcx
L0009: mov rcx, [rsp+0x30]
L000e: cmp [rcx], ecx
L0010: call C.M()
L0015: nop
L0016: add rsp, 0x28
L001a: ret |
|
This becomes more problematic as the size of the original struct increases, for example using System;
using System.Runtime.CompilerServices;
public static class Program
{
public static int ViaStruct1(Span<Byte> s)
{
var s1 = new S1(s);
return s1.Length;
}
public static int ViaStruct2(Span<Byte> s)
{
var s2 = new S2(new S1(s));
return s2.Length;
}
public static int ViaStruct3(Span<Byte> s)
{
var s3 = new S3(new S2(new S1(s)));
return s3.Length;
}
public static int ViaStruct4(Span<Byte> s)
{
var s4 = new S4(new S3(new S2(new S1(s))));
return s4.Length;
}
public static int ViaStruct5(Span<Byte> s)
{
var s5 = new S5(new S4(new S3(new S2(new S1(s)))));
return s5.Length;
}
}
public ref struct S1
{
private Span<Byte> _s;
public S1(Span<Byte> s) => _s = s;
public int Length => _s.Length;
}
public ref struct S2
{
private S1 _s;
public S2(S1 s) => _s = s;
public int Length => _s.Length;
}
public ref struct S3
{
private S2 _s;
public S3(S2 s) => _s = s;
public int Length => _s.Length;
}
public ref struct S4
{
private S3 _s;
public S4(S3 s) => _s = s;
public int Length => _s.Length;
}
public ref struct S5
{
private S4 _s;
public S5(S4 s) => _s = s;
public int Length => _s.Length;
}Giving Program.ViaStruct1(System.Span`1<Byte>)
L0000: push rdi
L0001: push rsi
L0002: sub rsp, 0x18
L0006: mov rsi, rcx
L0009: lea rdi, [rsp]
L000d: mov ecx, 0x6
L0012: xor eax, eax
L0014: rep stosd
L0016: mov rcx, rsi
L0019: mov rax, [rcx]
L001c: mov rdx, [rcx+0x8]
L0020: mov ecx, [rcx+0x10]
L0023: lea r8, [rsp]
L0027: mov [r8], rax
L002a: mov [r8+0x8], rdx
L002e: mov [r8+0x10], ecx
L0032: mov eax, [rsp+0x10]
L0036: add rsp, 0x18
L003a: pop rsi
L003b: pop rdi
L003c: ret
Program.ViaStruct2(System.Span`1<Byte>)
L0000: push rdi
L0001: push rsi
L0002: sub rsp, 0x48
L0006: vzeroupper
L0009: mov rsi, rcx
L000c: lea rdi, [rsp]
L0010: mov ecx, 0x12
L0015: xor eax, eax
L0017: rep stosd
L0019: mov rcx, rsi
L001c: xor eax, eax
L001e: lea rdx, [rsp+0x18]
L0023: vxorpd xmm0, xmm0, xmm0
L0028: vmovdqu [rdx], xmm0
L002d: mov [rdx+0x10], rax
L0031: mov rax, [rcx]
L0034: mov rdx, [rcx+0x8]
L0038: mov ecx, [rcx+0x10]
L003b: lea r8, [rsp+0x18]
L0040: mov [r8], rax
L0043: mov [r8+0x8], rdx
L0047: mov [r8+0x10], ecx
L004b: vmovdqu xmm0, [rsp+0x18]
L0052: vmovdqu [rsp], xmm0
L0058: mov rax, [rsp+0x28]
L005d: mov [rsp+0x10], rax
L0062: vmovdqu xmm0, [rsp]
L0068: vmovdqu [rsp+0x30], xmm0
L006f: mov rax, [rsp+0x10]
L0074: mov [rsp+0x40], rax
L0079: mov eax, [rsp+0x40]
L007d: add rsp, 0x48
L0081: pop rsi
L0082: pop rdi
L0083: ret
Program.ViaStruct3(System.Span`1<Byte>)
L0000: push rdi
L0001: push rsi
L0002: sub rsp, 0x68
L0006: vzeroupper
L0009: mov rsi, rcx
L000c: lea rdi, [rsp+0x8]
L0011: mov ecx, 0x18
L0016: xor eax, eax
L0018: rep stosd
L001a: mov rcx, rsi
L001d: xor eax, eax
L001f: lea rdx, [rsp+0x38]
L0024: vxorpd xmm0, xmm0, xmm0
L0029: vmovdqu [rdx], xmm0
L002e: mov [rdx+0x10], rax
L0032: mov rax, [rcx]
L0035: mov rdx, [rcx+0x8]
L0039: mov ecx, [rcx+0x10]
L003c: lea r8, [rsp+0x38]
L0041: mov [r8], rax
L0044: mov [r8+0x8], rdx
L0048: mov [r8+0x10], ecx
L004c: vmovdqu xmm0, [rsp+0x38]
L0053: vmovdqu [rsp+0x8], xmm0
L005a: mov rax, [rsp+0x48]
L005f: mov [rsp+0x18], rax
L0064: vmovdqu xmm0, [rsp+0x8]
L006b: vmovdqu [rsp+0x20], xmm0
L0072: mov rax, [rsp+0x18]
L0077: mov [rsp+0x30], rax
L007c: vmovdqu xmm0, [rsp+0x20]
L0083: vmovdqu [rsp+0x50], xmm0
L008a: mov rax, [rsp+0x30]
L008f: mov [rsp+0x60], rax
L0094: mov eax, [rsp+0x60]
L0098: add rsp, 0x68
L009c: pop rsi
L009d: pop rdi
L009e: ret
Program.ViaStruct4(System.Span`1<Byte>)
L0000: push rdi
L0001: push rsi
L0002: sub rsp, 0x78
L0006: vzeroupper
L0009: mov rsi, rcx
L000c: lea rdi, [rsp]
L0010: mov ecx, 0x1e
L0015: xor eax, eax
L0017: rep stosd
L0019: mov rcx, rsi
L001c: xor eax, eax
L001e: lea rdx, [rsp+0x48]
L0023: vxorpd xmm0, xmm0, xmm0
L0028: vmovdqu [rdx], xmm0
L002d: mov [rdx+0x10], rax
L0031: mov rax, [rcx]
L0034: mov rdx, [rcx+0x8]
L0038: mov ecx, [rcx+0x10]
L003b: lea r8, [rsp+0x48]
L0040: mov [r8], rax
L0043: mov [r8+0x8], rdx
L0047: mov [r8+0x10], ecx
L004b: vmovdqu xmm0, [rsp+0x48]
L0052: vmovdqu [rsp], xmm0
L0058: mov rax, [rsp+0x58]
L005d: mov [rsp+0x10], rax
L0062: vmovdqu xmm0, [rsp]
L0068: vmovdqu [rsp+0x30], xmm0
L006f: mov rax, [rsp+0x10]
L0074: mov [rsp+0x40], rax
L0079: vmovdqu xmm0, [rsp+0x30]
L0080: vmovdqu [rsp+0x18], xmm0
L0087: mov rax, [rsp+0x40]
L008c: mov [rsp+0x28], rax
L0091: vmovdqu xmm0, [rsp+0x18]
L0098: vmovdqu [rsp+0x60], xmm0
L009f: mov rax, [rsp+0x28]
L00a4: mov [rsp+0x70], rax
L00a9: mov eax, [rsp+0x70]
L00ad: add rsp, 0x78
L00b1: pop rsi
L00b2: pop rdi
L00b3: ret
Program.ViaStruct5(System.Span`1<Byte>)
L0000: push rdi
L0001: push rsi
L0002: sub rsp, 0x98
L0009: vzeroupper
L000c: mov rsi, rcx
L000f: lea rdi, [rsp+0x8]
L0014: mov ecx, 0x24
L0019: xor eax, eax
L001b: rep stosd
L001d: mov rcx, rsi
L0020: xor eax, eax
L0022: lea rdx, [rsp+0x68]
L0027: vxorpd xmm0, xmm0, xmm0
L002c: vmovdqu [rdx], xmm0
L0031: mov [rdx+0x10], rax
L0035: mov rax, [rcx]
L0038: mov rdx, [rcx+0x8]
L003c: mov ecx, [rcx+0x10]
L003f: lea r8, [rsp+0x68]
L0044: mov [r8], rax
L0047: mov [r8+0x8], rdx
L004b: mov [r8+0x10], ecx
L004f: vmovdqu xmm0, [rsp+0x68]
L0056: vmovdqu [rsp+0x8], xmm0
L005d: mov rax, [rsp+0x78]
L0062: mov [rsp+0x18], rax
L0067: vmovdqu xmm0, [rsp+0x8]
L006e: vmovdqu [rsp+0x50], xmm0
L0075: mov rax, [rsp+0x18]
L007a: mov [rsp+0x60], rax
L007f: vmovdqu xmm0, [rsp+0x50]
L0086: vmovdqu [rsp+0x38], xmm0
L008d: mov rax, [rsp+0x60]
L0092: mov [rsp+0x48], rax
L0097: vmovdqu xmm0, [rsp+0x38]
L009e: vmovdqu [rsp+0x20], xmm0
L00a5: mov rax, [rsp+0x48]
L00aa: mov [rsp+0x30], rax
L00af: vmovdqu xmm0, [rsp+0x20]
L00b6: vmovdqu [rsp+0x80], xmm0
L00c0: mov rax, [rsp+0x30]
L00c5: mov [rsp+0x90], rax
L00cd: mov eax, [rsp+0x90]
L00d4: add rsp, 0x98
L00db: pop rsi
L00dc: pop rdi
L00dd: retAgain the method call wrapping doesn't increase in complexity public static int ViaStruct(S1 s)
=> s.Length;
public static int ViaStruct(S2 s)
=> s.Length;
public static int ViaStruct(S3 s)
=> s.Length;
public static int ViaStruct(S4 s)
=> s.Length;
public static int ViaStruct(S5 s)
=> s.Length;Giving Program.ViaStruct(S1)
L0000: mov eax, [rcx+0x10]
L0003: ret
Program.ViaStruct(S2)
L0000: mov eax, [rcx+0x10]
L0003: ret
Program.ViaStruct(S3)
L0000: mov eax, [rcx+0x10]
L0003: ret
Program.ViaStruct(S4)
L0000: mov eax, [rcx+0x10]
L0003: ret
Program.ViaStruct(S5)
L0000: mov eax, [rcx+0x10]
L0003: ret |
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@mikedn @AndyAyersMS the extended mov shimmy L001a: mov rcx, rax
L001d: mov rax, rcx
L0020: mov rcx, rax
L0023: mov rax, rcx
L0026: mov rcx, rax
L0029: lea rax, [rsp+0x20]
L002e: mov [rax], rcx
L0031: mov rcx, [rsp+0x20]
L0036: cmp [rcx], ecx
L0038: call C.M() |
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Possibly related: #7279, #9165, #9519, #10296. Last time I looked there were some quirks in how the RA's preferencing worked could lead to this behavior. I tried tweaking this some with dotnet/coreclr#16028 but am not convinced it really helped much. If you have just the right pattern of live ranges -- something like a local with long span between first def and last use (and intermittent liveness) and a bunch of chained temps within -- the RA wants to restore the local to the same reg at each point it becomes live. So you can get a back and forth pattern going, and by layering inlines like you do here, you can extend it to alarming lengths. cc @CarolEidt and @dotnet/jit-contrib |
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Note one of the proposals for UTF8 wraps ReadyOnlySpan (or perhaps ReadOnlyMemory) somewhat like this... |
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Can't get the overall size of the ref struct as all my tools work with a generic param, and ref structs don't like that; but the example I was looking at in dotnet/corefxlab#2366 JsonWriterUtf8 jsonUtf8 = JsonWriter.CreateUtf8(output, prettyPrint);
// Inlines:
// return new JsonWriterUtf8(BufferWriter.Create(new IBufferWriter(bufferWriter)), prettyPrint);
// public IBufferWriter(IBufferWriter<byte> writer)
// IBufferWriter<byte> _writer;
// static BufferWriter<TOutput> Create<TOutput>(TOutput output)
// new BufferWriter<TOutput>(output);
// public ref partial struct BufferWriter<T> where T : IBufferWriter<byte>
// IBufferWriter _output;
// Span<byte> _span;
// int _buffered;
// ReadOnlySpan<byte> NewLine
// new JsonWriterUtf8
// ref struct JsonWriterUtf8
// JsonWriterUtf8<IBufferWriter>
// new JsonWriterUtf8<IBufferWriter>(bufferWriter, prettyPrint);
// ref struct JsonWriterUtf8<JsonWriterUtf8<IBufferWriter>>
// readonly bool _prettyPrint;
// BufferWriter<JsonWriterUtf8<IBufferWriter>> _bufferWriter;
// int _indent;
// bool _firstItem;
json.WriteObjectStart();Becomes // JsonWriterUtf8 json = JsonWriter.CreateUtf8(output, formatted);
mov rcx,rdx
lea rdx,[rsp+88h]
vxorps xmm0,xmm0,xmm0
vmovdqu xmmword ptr [rdx],xmm0
vmovdqu xmmword ptr [rdx+10h],xmm0
vmovdqu xmmword ptr [rdx+20h],xmm0
xor edx,edx
mov dword ptr [rsp+88h],edx
lea rdx,[rsp+90h]
mov qword ptr [rdx],rcx
lea rdx,[rsp+98h]
mov r11,7FFC140F0340h
xor r8d,r8d
mov rax,7FFC140F0340h
cmp dword ptr [rcx],ecx
call qword ptr [rax]
mov rcx,7FFC1435F2C8h
xor edx,edx
call coreclr!GC_VersionInfo+0x25a30
mov rcx,21F58C52C90h
mov rcx,qword ptr [rcx]
test rcx,rcx
jne M01_L00
xor eax,eax
xor edx,edx
jmp M01_L01
M01_L00
lea rax,[rcx+10h]
mov edx,dword ptr [rcx+8]
M01_L01
lea rcx,[rsp+0A8h]
mov qword ptr [rcx],rax
mov dword ptr [rcx+8],edx
vmovdqu xmm0,xmmword ptr [rsp+88h]
vmovdqu xmmword ptr [rsp+0B8h],xmm0
vmovdqu xmm0,xmmword ptr [rsp+98h]
vmovdqu xmmword ptr [rsp+0C8h],xmm0
vmovdqu xmm0,xmmword ptr [rsp+0A8h]
vmovdqu xmmword ptr [rsp+0D8h],xmm0
vmovdqu xmm0,xmmword ptr [rsp+0B8h]
vmovdqu xmmword ptr [rsp+58h],xmm0
vmovdqu xmm0,xmmword ptr [rsp+0C8h]
vmovdqu xmmword ptr [rsp+68h],xmm0
vmovdqu xmm0,xmmword ptr [rsp+0D8h]
vmovdqu xmmword ptr [rsp+78h],xmm0
xor ecx,ecx
lea rax,[rsp+20h]
vxorps xmm0,xmm0,xmm0
vmovdqu xmmword ptr [rax],xmm0
vmovdqu xmmword ptr [rax+10h],xmm0
vmovdqu xmmword ptr [rax+20h],xmm0
mov qword ptr [rax+30h],rcx
vmovdqu xmm0,xmmword ptr [rsp+58h]
vmovdqu xmmword ptr [rsp+28h],xmm0
vmovdqu xmm0,xmmword ptr [rsp+68h]
vmovdqu xmmword ptr [rsp+38h],xmm0
vmovdqu xmm0,xmmword ptr [rsp+78h]
vmovdqu xmmword ptr [rsp+48h],xmm0
movzx ecx,sil
mov byte ptr [rsp+24h],cl
mov dword ptr [rsp+20h],0FFFFFFFFh
mov byte ptr [rsp+25h],1
vmovdqu xmm0,xmmword ptr [rsp+20h]
vmovdqu xmmword ptr [rsp+0E8h],xmm0
vmovdqu xmm0,xmmword ptr [rsp+30h]
vmovdqu xmmword ptr [rsp+0F8h],xmm0
vmovdqu xmm0,xmmword ptr [rsp+40h]
vmovdqu xmmword ptr [rsp+108h],xmm0
mov rcx,qword ptr [rsp+50h]
mov qword ptr [rsp+118h],rcx
vmovdqu xmm0,xmmword ptr [rsp+0E8h]
vmovdqu xmmword ptr [rsp+120h],xmm0
vmovdqu xmm0,xmmword ptr [rsp+0F8h]
vmovdqu xmmword ptr [rsp+130h],xmm0
vmovdqu xmm0,xmmword ptr [rsp+108h]
vmovdqu xmmword ptr [rsp+140h],xmm0
mov rcx,qword ptr [rsp+118h]
mov qword ptr [rsp+150h],rcx
lea rcx,[rsp+120h]
call System.Text.JsonLab.JsonWriterUtf8`1[[System.Text.JsonLab.IBufferWriter, System.Text.JsonLab]].WriteObjectStart()
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Interesting that I see different disassembly from BenchmarkDotNet (both on .Net Core 2.1 and .Net Framework 4.7.2):
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So is less worse in Core 2,1; but still not great as they should all collapse to be the same as the class (when inlined) rather than shuffling the pointer back and forth between the registers and then moving it higher and higher through stack space, before returning it to the original register and invoking call |
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The JIT compilers are different between the two: (.Net Core 2.1 and .Net Framework 4.7.2): |
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Guessing would also effect the sync path in async as that is lots of structs wrapping structs? (though exception handling may complicate things) |
|
JitDump for ViaStruct5 https://gist.github.com/benaadams/ad76003a334f3da6916ac5c8a80d95d1 |
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I suppose an orthogonal question is why it generates: G_M45457_IG01: ; func=00, offs=000000H, size=0013H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG
IN0018: 000000 push rdi
IN0019: 000001 sub rsp, 80
IN001a: 000005 lea rdi, [rsp+28H]
IN001b: 00000A mov ecx, 10
IN001c: 00000F xor rax, rax
IN001d: 000011 rep stosd
G_M45457_IG02: ; offs=000013H, size=0061H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref
IN0001: 000013 mov rcx, 0x7FFC12345508
IN0002: 00001D call CORINFO_HELP_NEWSFAST
IN0003: 000022 mov rcx, rax
IN0004: 000025 mov rax, rcx
IN0005: 000028 mov rcx, rax
IN0006: 00002B mov rax, rcx
IN0007: 00002E mov rcx, rax
IN0008: 000031 lea rax, bword ptr [V05 rsp+40H]
IN0009: 000036 mov gword ptr [rax], rcx
IN000a: 000039 mov rcx, gword ptr [V05 rsp+40H]
IN000b: 00003E mov gword ptr [V09 rsp+30H], rcx
IN000c: 000043 mov rcx, gword ptr [V09 rsp+30H]
IN000d: 000048 lea rax, bword ptr [V06 rsp+38H]
IN000e: 00004D mov gword ptr [rax], rcx
IN000f: 000050 mov rcx, gword ptr [V06 rsp+38H]
IN0010: 000055 mov gword ptr [V10 rsp+28H], rcx
IN0011: 00005A mov rcx, gword ptr [V10 rsp+28H]
IN0012: 00005F lea rax, bword ptr [V00 rsp+48H]
IN0013: 000064 mov gword ptr [rax], rcx
IN0014: 000067 mov rcx, gword ptr [V00 rsp+48H]
IN0015: 00006C cmp dword ptr [rcx], ecx
IN0016: 00006E call C:M():this
IN0017: 000073 nop
G_M45457_IG03: ; offs=000074H, size=0006H, epilog, nogc, emitadd
IN001e: 000074 add rsp, 80
IN001f: 000078 pop rdi
IN0020: 000079 ret Rather than something like push rdi
sub rsp, 0x28
mov rcx, 0x7FFC12345508
call CORINFO_HELP_NEWSFAST
mov rcx, rax
mov rax, rcx
mov rcx, rax
mov rax, rcx
mov rcx, rax
mov rax, rcx
mov rcx, rax
mov rax, rcx
mov rcx, rax
mov rax, rcx
mov rcx, rax
mov rax, rcx
mov rcx, rax
mov rax, rcx
mov rcx, rax
call C:M():this
nop
add rsp, 0x28
pop rdi
ret |
|
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Is it because they are passed byref? |
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"Inlining" via public static void ViaStruct5()
{
var s1 = new S1(new C());
var s5 = Unsafe.As<S1, S5>(ref s1);
s5.M();
}; Assembly listing for method Program:ViaStruct5()
;* V00 loc0 [V00 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op
; V01 loc1 [V01,T02] ( 2, 2 ) struct ( 8) [rsp+0x20] do-not-enreg[SFB] must-init ld-addr-op
; V02 OutArgs [V02 ] ( 1, 1 ) lclBlk (32) [rsp+0x00]
; V03 tmp1 [V03,T00] ( 2, 4 ) ref -> rax class-hnd exact
; V04 tmp2 [V04,T01] ( 2, 2 ) ref -> rax V00._c(offs=0x00) P-INDEP
;
; Lcl frame size = 40
G_M30623_IG01:
4883EC28 sub rsp, 40
33C0 xor rax, rax
4889442420 mov qword ptr [rsp+20H], rax
G_M30623_IG02:
48B908555B0DFC7F0000 mov rcx, 0x7FFC0D5B5508
E81627AE5F call CORINFO_HELP_NEWSFAST
488D4C2420 lea rcx, bword ptr [rsp+20H]
488901 mov gword ptr [rcx], rax
488B4C2420 mov rcx, gword ptr [rsp+20H]
3909 cmp dword ptr [rcx], ecx
E842FEFFFF call C:M():this
90 nop
G_M30623_IG03:
4883C428 add rsp, 40
C3 ret
; Total bytes of code 52, prolog size 11 for method Program:ViaStruct5()Rather than public static void ViaStruct5()
{
var s5 = new S5(new S4(new S3(new S2(new S1(new C())))));
s5.M();
}; Assembly listing for method Program:ViaStruct5()
; V00 loc0 [V00,T05] ( 2, 2 ) struct ( 8) [rsp+0x48] do-not-enreg[SF] must-init ld-addr-op
; V01 OutArgs [V01 ] ( 1, 1 ) lclBlk (32) [rsp+0x00]
; V02 tmp1 [V02,T00] ( 2, 4 ) ref -> rcx class-hnd exact
;* V03 tmp2 [V03 ] ( 0, 0 ) struct ( 8) zero-ref
;* V04 tmp3 [V04 ] ( 0, 0 ) struct ( 8) zero-ref
; V05 tmp4 [V05 ] ( 2, 4 ) struct ( 8) [rsp+0x40] do-not-enreg[XSFB] must-init addr-exposed
; V06 tmp5 [V06 ] ( 2, 4 ) struct ( 8) [rsp+0x38] do-not-enreg[XSF] must-init addr-exposed
;* V07 tmp6 [V07 ] ( 0, 0 ) struct ( 8) zero-ref
;* V08 tmp7 [V08 ] ( 0, 0 ) struct ( 8) zero-ref
; V09 tmp8 [V09 ] ( 2, 4 ) struct ( 8) [rsp+0x30] do-not-enreg[XSF] must-init addr-exposed
; V10 tmp9 [V10 ] ( 2, 4 ) struct ( 8) [rsp+0x28] do-not-enreg[XSF] must-init addr-exposed
; V11 tmp10 [V11,T01] ( 2, 2 ) ref -> rax V03._c(offs=0x00) P-INDEP
; V12 tmp11 [V12,T02] ( 2, 2 ) ref -> rax V04._s(offs=0x00) P-INDEP
; V13 tmp12 [V13,T03] ( 2, 2 ) ref -> rcx V07._c(offs=0x00) P-INDEP
; V14 tmp13 [V14,T04] ( 2, 2 ) ref -> rcx V08._s(offs=0x00) P-INDEP
;
; Lcl frame size = 80
G_M30626_IG01:
57 push rdi
4883EC50 sub rsp, 80
488D7C2428 lea rdi, [rsp+28H]
B90A000000 mov ecx, 10
33C0 xor rax, rax
F3AB rep stosd
G_M30626_IG02:
48B90855590DFC7F0000 mov rcx, 0x7FFC0D595508
E80E27B05F call CORINFO_HELP_NEWSFAST
488BC8 mov rcx, rax
488BC1 mov rax, rcx
488BC8 mov rcx, rax
488BC1 mov rax, rcx
488BC8 mov rcx, rax
488D442440 lea rax, bword ptr [rsp+40H]
488908 mov gword ptr [rax], rcx
488B4C2440 mov rcx, gword ptr [rsp+40H]
48894C2430 mov gword ptr [rsp+30H], rcx
488B4C2430 mov rcx, gword ptr [rsp+30H]
488D442438 lea rax, bword ptr [rsp+38H]
488908 mov gword ptr [rax], rcx
488B4C2438 mov rcx, gword ptr [rsp+38H]
48894C2428 mov gword ptr [rsp+28H], rcx
488B4C2428 mov rcx, gword ptr [rsp+28H]
488D442448 lea rax, bword ptr [rsp+48H]
488908 mov gword ptr [rax], rcx
488B4C2448 mov rcx, gword ptr [rsp+48H]
3909 cmp dword ptr [rcx], ecx
E8FDFDFFFF call C:M():this
90 nop
G_M30626_IG03:
4883C450 add rsp, 80
5F pop rdi
C3 ret
; Total bytes of code 122, prolog size 19 for method Program:ViaStruct5() |
|
Also note struct promotion is not as general as one might hope -- struct of structs generally won't get promoted except in one very special case (struct of struct of primitive). |
|
Excuse my poor drawings... What I was hoping it would do when all the .ctors were inlined and then optimized would be: Requiring However what it seems to do is
Requiring If I've got that right? |
|
Could be -- the jit will be very conservative in places because of aliasing worries. I'll take a look, maybe early next week some time? |
|
That would be great! I think async has the same issue e.g. static async Task<int> Main(string[] args)
{
return await ValueTask1();
}
public static async ValueTask<int> ValueTask1()
{
return await ValueTask2().ConfigureAwait(false);
}
public static ValueTask<int> ValueTask2()
{
return new ValueTask<int>(1);
}Generates IN0009: 00004B lea r9, bword ptr [V16 rbp-58H]
IN000a: 00004F mov gword ptr [r9], rdx ; <-- loading rdx
IN000b: 000052 mov dword ptr [r9+8], ecx
IN000c: 000056 mov word ptr [r9+12], ax
IN000d: 00005B mov byte ptr [r9+14], r8b
G_M13791_IG04: ; offs=00005FH, size=000CH, nogc, emitadd
IN000e: 00005F vmovdqu xmm0, qword ptr [V16 rbp-58H] ; copy
IN000f: 000065 vmovdqu qword ptr [V12 rbp-48H], xmm0
G_M13791_IG05: ; offs=00006BH, size=000CH, nogc, emitadd
IN0010: 00006B vmovdqu xmm0, qword ptr [V12 rbp-48H] ; copy
IN0011: 000071 vmovdqu qword ptr [V05 rbp-38H], xmm0
G_M13791_IG06: ; offs=000077H, size=000CH, nogc, emitadd
IN0012: 000077 vmovdqu xmm0, qword ptr [V05 rbp-38H] ; copy
IN0013: 00007D vmovdqu qword ptr [V18 rbp-78H], xmm0
G_M13791_IG07: ; offs=000083H, size=000CH, nogc, emitadd
IN0014: 000083 vmovdqu xmm0, qword ptr [V18 rbp-78H] ; copy
IN0015: 000089 vmovdqu qword ptr [V17 rbp-68H], xmm0
G_M13791_IG08: ; offs=00008FH, size=000CH, nogc, emitadd
IN0016: 00008F vmovdqu xmm0, qword ptr [V17 rbp-68H] ; copy
IN0017: 000095 vmovdqu qword ptr [V03 rbp-28H], xmm0
G_M13791_IG09: ; offs=00009BH, size=0010H, isz, emitadd
IN0018: 00009B mov rsi, gword ptr [V03 rbp-28H] ; <--- this is rdx ?
IN0019: 00009F test rsi, rsi |
|
Probably unhelpful; but I was manually doing this 4C8D4DA8 lea r9, bword ptr [rbp-58H]
498911 mov gword ptr [r9], rdx
41894908 mov dword ptr [r9+8], ecx
664189410C mov word ptr [r9+12], ax
4588410E mov byte ptr [r9+14], r8b
C4E17A6F45A8 vmovdqu xmm0, qword ptr [rbp-58H]
C4E17A7F45B8 vmovdqu qword ptr [rbp-48H], xmm0
C4E17A6F45B8 vmovdqu xmm0, qword ptr [rbp-48H]
C4E17A7F45C8 vmovdqu qword ptr [rbp-38H], xmm0
C4E17A6F45C8 vmovdqu xmm0, qword ptr [rbp-38H]
C4E17A7F4588 vmovdqu qword ptr [rbp-78H], xmm0
C4E17A6F4588 vmovdqu xmm0, qword ptr [rbp-78H]
C4E17A7F4598 vmovdqu qword ptr [rbp-68H], xmm0
C4E17A6F4598 vmovdqu xmm0, qword ptr [rbp-68H]
C4E17A7F45D8 vmovdqu qword ptr [rbp-28H], xmm0
488B75D8 mov rsi, gword ptr [rbp-28H]
4885F6 test rsi, rsi
7507 jne SHORT G_M2754_IG10
BF01000000 mov edi, 1
EB4E jmp SHORT G_M2754_IG12I'd probably go through these steps - 4C8D4DA8 lea r9, bword ptr [rbp-58H]
+ 4C8D4DA8 lea r9, bword ptr [rbp-48H]
498911 mov gword ptr [r9], rdx
41894908 mov dword ptr [r9+8], ecx
664189410C mov word ptr [r9+12], ax
4588410E mov byte ptr [r9+14], r8b
- C4E17A6F45A8 vmovdqu xmm0, qword ptr [rbp-58H]
- C4E17A7F45B8 vmovdqu qword ptr [rbp-48H], xmm0
C4E17A6F45B8 vmovdqu xmm0, qword ptr [rbp-48H]
C4E17A7F45C8 vmovdqu qword ptr [rbp-38H], xmm0
C4E17A6F45C8 vmovdqu xmm0, qword ptr [rbp-38H]
C4E17A7F4588 vmovdqu qword ptr [rbp-78H], xmm0
C4E17A6F4588 vmovdqu xmm0, qword ptr [rbp-78H]
C4E17A7F4598 vmovdqu qword ptr [rbp-68H], xmm0
C4E17A6F4598 vmovdqu xmm0, qword ptr [rbp-68H]
C4E17A7F45D8 vmovdqu qword ptr [rbp-28H], xmm0
488B75D8 mov rsi, gword ptr [rbp-28H]
4885F6 test rsi, rsi
7507 jne SHORT G_M2754_IG10
BF01000000 mov edi, 1
EB4E jmp SHORT G_M2754_IG12- 4C8D4DA8 lea r9, bword ptr [rbp-48H]
+ 4C8D4DA8 lea r9, bword ptr [rbp-38H]
498911 mov gword ptr [r9], rdx
41894908 mov dword ptr [r9+8], ecx
664189410C mov word ptr [r9+12], ax
4588410E mov byte ptr [r9+14], r8b
- C4E17A6F45B8 vmovdqu xmm0, qword ptr [rbp-48H]
- C4E17A7F45C8 vmovdqu qword ptr [rbp-38H], xmm0
C4E17A6F45C8 vmovdqu xmm0, qword ptr [rbp-38H]
C4E17A7F4588 vmovdqu qword ptr [rbp-78H], xmm0
C4E17A6F4588 vmovdqu xmm0, qword ptr [rbp-78H]
C4E17A7F4598 vmovdqu qword ptr [rbp-68H], xmm0
C4E17A6F4598 vmovdqu xmm0, qword ptr [rbp-68H]
C4E17A7F45D8 vmovdqu qword ptr [rbp-28H], xmm0
488B75D8 mov rsi, gword ptr [rbp-28H]
4885F6 test rsi, rsi
7507 jne SHORT G_M2754_IG10
BF01000000 mov edi, 1
EB4E jmp SHORT G_M2754_IG12- 4C8D4DA8 lea r9, bword ptr [rbp-38H]
+ 4C8D4DA8 lea r9, bword ptr [rbp-78H]
498911 mov gword ptr [r9], rdx
41894908 mov dword ptr [r9+8], ecx
664189410C mov word ptr [r9+12], ax
4588410E mov byte ptr [r9+14], r8b
- C4E17A6F45C8 vmovdqu xmm0, qword ptr [rbp-38H]
- C4E17A7F4588 vmovdqu qword ptr [rbp-78H], xmm0
C4E17A6F4588 vmovdqu xmm0, qword ptr [rbp-78H]
C4E17A7F4598 vmovdqu qword ptr [rbp-68H], xmm0
C4E17A6F4598 vmovdqu xmm0, qword ptr [rbp-68H]
C4E17A7F45D8 vmovdqu qword ptr [rbp-28H], xmm0
488B75D8 mov rsi, gword ptr [rbp-28H]
4885F6 test rsi, rsi
7507 jne SHORT G_M2754_IG10
BF01000000 mov edi, 1
EB4E jmp SHORT G_M2754_IG12- 4C8D4DA8 lea r9, bword ptr [rbp-78H]
+ 4C8D4DA8 lea r9, bword ptr [rbp-68H]
498911 mov gword ptr [r9], rdx
41894908 mov dword ptr [r9+8], ecx
664189410C mov word ptr [r9+12], ax
4588410E mov byte ptr [r9+14], r8b
- C4E17A6F4588 vmovdqu xmm0, qword ptr [rbp-78H]
- C4E17A7F4598 vmovdqu qword ptr [rbp-68H], xmm0
C4E17A6F4598 vmovdqu xmm0, qword ptr [rbp-68H]
C4E17A7F45D8 vmovdqu qword ptr [rbp-28H], xmm0
488B75D8 mov rsi, gword ptr [rbp-28H]
4885F6 test rsi, rsi
7507 jne SHORT G_M2754_IG10
BF01000000 mov edi, 1
EB4E jmp SHORT G_M2754_IG12- 4C8D4DA8 lea r9, bword ptr [rbp-68H]
+ 4C8D4DA8 lea r9, bword ptr [rbp-28H]
498911 mov gword ptr [r9], rdx
41894908 mov dword ptr [r9+8], ecx
664189410C mov word ptr [r9+12], ax
4588410E mov byte ptr [r9+14], r8b
- C4E17A6F4598 vmovdqu xmm0, qword ptr [rbp-68H]
- C4E17A7F45D8 vmovdqu qword ptr [rbp-28H], xmm0
488B75D8 mov rsi, gword ptr [rbp-28H]
4885F6 test rsi, rsi
7507 jne SHORT G_M2754_IG10
BF01000000 mov edi, 1
EB4E jmp SHORT G_M2754_IG12- 4C8D4DA8 lea r9, bword ptr [rbp-28H] ; maybe?
- 498911 mov gword ptr [r9], rdx ; maybe?
- 41894908 mov dword ptr [r9+8], ecx ; maybe?
- 664189410C mov word ptr [r9+12], ax ; maybe?
- 4588410E mov byte ptr [r9+14], r8b ; maybe?
- 488B75D8 mov rsi, gword ptr [rbp-28H]
+ 488B75D8 mov rsi, rdx
4885F6 test rsi, rsi
7507 jne SHORT G_M2754_IG10
BF01000000 mov edi, 1
EB4E jmp SHORT G_M2754_IG12To end up with - 4C8D4DA8 lea r9, bword ptr [rbp-58H]
- 498911 mov gword ptr [r9], rdx
- 41894908 mov dword ptr [r9+8], ecx
- 664189410C mov word ptr [r9+12], ax
- 4588410E mov byte ptr [r9+14], r8b
- C4E17A6F45A8 vmovdqu xmm0, qword ptr [rbp-58H]
- C4E17A7F45B8 vmovdqu qword ptr [rbp-48H], xmm0
- C4E17A6F45B8 vmovdqu xmm0, qword ptr [rbp-48H]
- C4E17A7F45C8 vmovdqu qword ptr [rbp-38H], xmm0
- C4E17A6F45C8 vmovdqu xmm0, qword ptr [rbp-38H]
- C4E17A7F4588 vmovdqu qword ptr [rbp-78H], xmm0
- C4E17A6F4588 vmovdqu xmm0, qword ptr [rbp-78H]
- C4E17A7F4598 vmovdqu qword ptr [rbp-68H], xmm0
- C4E17A6F4598 vmovdqu xmm0, qword ptr [rbp-68H]
- C4E17A7F45D8 vmovdqu qword ptr [rbp-28H], xmm0
- 488B75D8 mov rsi, gword ptr [rbp-28H]
- 4885F6 test rsi, rsi
+ 4885F6 test rdx, rdx
7507 jne SHORT G_M2754_IG10
BF01000000 mov edi, 1
EB4E jmp SHORT G_M2754_IG12Cutting out 184 bytes of copy to and from stack? |
|
May be related https://github.com/dotnet/corefx/issues/30655 |
|
Yes, the first case is a limitation in struct promotion.... given a pointer-sized non-float primitive type x, the jit can promote struct(x) and struct(struct(x)) but not cases with three or more levels of wrapper. The changes here are a rough cut at arbitrary unwrapping... but the diffs aren't as clean as one might hope, as the register shuffling is still there, and for some reason we still have one struct hanging around: ; Assembly listing for method Program:ViaStruct5()
; Emitting BLENDED_CODE for X64 CPU with AVX
; optimized code
; partially interruptible
; Final local variable assignments
;
-; V00 loc0 [V00,T05] ( 2, 2 ) struct ( 8) [rsp+0x48] do-not-enreg[SF] must-init ld-addr-op
+;* V00 loc0 [V00 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op
; V01 OutArgs [V01 ] ( 1, 1 ) lclBlk (32) [rsp+0x00]
; V02 tmp1 [V02,T00] ( 2, 4 ) ref -> rcx class-hnd exact
;* V03 tmp2 [V03 ] ( 0, 0 ) struct ( 8) zero-ref
;* V04 tmp3 [V04 ] ( 0, 0 ) struct ( 8) zero-ref
-; V05 tmp4 [V05 ] ( 2, 4 ) struct ( 8) [rsp+0x40] do-not-enreg[XSFB] must-init addr-exposed
-; V06 tmp5 [V06 ] ( 2, 4 ) struct ( 8) [rsp+0x38] do-not-enreg[XSF] must-init addr-exposed
+;* V05 tmp4 [V05 ] ( 0, 0 ) struct ( 8) zero-ref
+;* V06 tmp5 [V06 ] ( 0, 0 ) struct ( 8) zero-ref
;* V07 tmp6 [V07 ] ( 0, 0 ) struct ( 8) zero-ref
;* V08 tmp7 [V08 ] ( 0, 0 ) struct ( 8) zero-ref
-; V09 tmp8 [V09 ] ( 2, 4 ) struct ( 8) [rsp+0x30] do-not-enreg[XSF] must-init addr-exposed
-; V10 tmp9 [V10 ] ( 2, 4 ) struct ( 8) [rsp+0x28] do-not-enreg[XSF] must-init addr-exposed
-; V11 tmp10 [V11,T01] ( 2, 2 ) ref -> rax V03._c(offs=0x00) P-INDEP
-; V12 tmp11 [V12,T02] ( 2, 2 ) ref -> rax V04._s(offs=0x00) P-INDEP
-; V13 tmp12 [V13,T03] ( 2, 2 ) ref -> rcx V07._c(offs=0x00) P-INDEP
-; V14 tmp13 [V14,T04] ( 2, 2 ) ref -> rcx V08._s(offs=0x00) P-INDEP
-;
-; Lcl frame size = 80
+;* V09 tmp8 [V09 ] ( 0, 0 ) struct ( 8) zero-ref
+;* V10 tmp9 [V10 ] ( 0, 0 ) struct ( 8) zero-ref
+; V11 tmp10 [V11,T01] ( 2, 2 ) ref -> [rsp+0x20] do-not-enreg[F] V00._s(offs=0x00) P-INDEP
+; V12 tmp11 [V12,T02] ( 2, 2 ) ref -> rax V03._c(offs=0x00) P-INDEP
+; V13 tmp12 [V13,T03] ( 2, 2 ) ref -> rax V04._s(offs=0x00) P-INDEP
+; V14 tmp13 [V14,T04] ( 2, 2 ) ref -> rax V05._s(offs=0x00) P-INDEP
+; V15 tmp14 [V15,T05] ( 2, 2 ) ref -> rax V06._s(offs=0x00) P-INDEP
+; V16 tmp15 [V16,T06] ( 2, 2 ) ref -> rcx V07._c(offs=0x00) P-INDEP
+; V17 tmp16 [V17,T07] ( 2, 2 ) ref -> rcx V08._s(offs=0x00) P-INDEP
+; V18 tmp17 [V18,T08] ( 2, 2 ) ref -> rcx V09._s(offs=0x00) P-INDEP
+; V19 tmp18 [V19,T09] ( 2, 2 ) ref -> rcx V10._s(offs=0x00) P-INDEP
+;
+; Lcl frame size = 40
G_M60507_IG01:
- push rdi
- sub rsp, 80
- lea rdi, [rsp+28H]
- mov ecx, 10
- xor rax, rax
- rep stosd
+ sub rsp, 40
G_M60507_IG02:
mov rcx, 0xD1FFAB1E
call CORINFO_HELP_NEWSFAST
@@ -274,40 +264,31 @@ G_M60507_IG02:
mov rcx, rax
mov rax, rcx
mov rcx, rax
- lea rax, bword ptr [rsp+40H]
- mov gword ptr [rax], rcx
- mov rcx, gword ptr [rsp+40H]
- mov gword ptr [rsp+30H], rcx
- mov rcx, gword ptr [rsp+30H]
- lea rax, bword ptr [rsp+38H]
- mov gword ptr [rax], rcx
- mov rcx, gword ptr [rsp+38H]
- mov gword ptr [rsp+28H], rcx
- mov rcx, gword ptr [rsp+28H]
- lea rax, bword ptr [rsp+48H]
- mov gword ptr [rax], rcx
- mov rcx, gword ptr [rsp+48H]
+ mov rax, rcx
+ mov rcx, rax
+ mov rax, rcx
+ mov rcx, rax
+ mov gword ptr [rsp+20H], rcx
+ mov rcx, gword ptr [rsp+20H]
cmp dword ptr [rcx], ecx
call C:M():this
nop
G_M60507_IG03:
- add rsp, 80
- pop rdi
+ add rsp, 40
ret
-; Total bytes of code 122, prolog size 19 for method Program:ViaStruct5()
+; Total bytes of code 69, prolog size 4 for method Program:ViaStruct5()We should be able to further generalize I think... let me play with this some more. |
|
As detailed in https://github.com/dotnet/corefx/issues/30655#issuecomment-400317238, the micro benchmark shows a 10x speed difference between getting a flat struct vs. a one level nested struct, and irrespective if the fields are primitives or not. Any performance enhancements with wrapped structs would help all |
|
Thanks. It is not as easy to promote To generalize here, we probably need to augment the jit promotion descriptors with something more like the field sequence info, so we can have promotion trees, and then work through all the implications.... cc @erozenfeld |
|
Using that change on coreclr (where I didn't expected to see much) I see the following Improvement ; Assembly listing for method AsyncVoidMethodBuilder:Create():struct
;
; V00 RetBuf [V00,T00] ( 5, 5 ) byref -> rsi
; V01 loc0 [V01,T01] ( 5, 4 ) ref -> rdi class-hnd
-; V02 loc1 [V02,T02] ( 3, 3 ) struct (16) [rsp+0x20] do-not-enreg[SFB] must-init ld-addr-op
-; V03 OutArgs [V03 ] ( 1, 1 ) lclBlk (32) [rsp+0x00]
+;* V02 loc1 [V02 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op
+; V03 OutArgs [V03 ] ( 1, 1 ) lclBlk (32) [rsp+0x00]
+; V04 tmp1 [V04,T02] ( 2, 2 ) ref -> rdx V02._synchronizationContext(offs=0x00) P-INDEP
+; V05 tmp2 [V05,T03] ( 2, 2 ) ref -> rbx V02._builder(offs=0x08) P-INDEP
;
-; Lcl frame size = 48
+; Lcl frame size = 32
G_M38150_IG01:
push rdi
push rsi
push rbx
- sub rsp, 48
- xor rax, rax
- mov qword ptr [rsp+20H], rax
- mov qword ptr [rsp+28H], rax
- mov rbx, rcx
+ sub rsp, 32
+ mov rsi, rcx
G_M38150_IG02:
call SynchronizationContext:get_Current():ref
- mov rsi, rax
- test rsi, rsi
+ mov rdi, rax
+ test rdi, rdi
je SHORT G_M38150_IG03
- mov rcx, rsi
- mov rax, qword ptr [rsi]
+ mov rcx, rdi
+ mov rax, qword ptr [rdi]
mov rax, qword ptr [rax+64]
call qword ptr [rax+48]SynchronizationContext:OperationStarted():this
-G_M38150_IG03:
- lea rax, bword ptr [rsp+20H]
-G_M38150_IG04:
- xorps xmm0, xmm0
- movdqu qword ptr [rax], xmm0
-G_M38150_IG05:
- mov gword ptr [rsp+20H], rsi
- mov rdi, rbx
- lea rsi, bword ptr [rsp+20H]
- call CORINFO_HELP_ASSIGN_BYREF
- call CORINFO_HELP_ASSIGN_BYREF
- mov rax, rbx
-G_M38150_IG06:
- add rsp, 48
+ G_M38150_IG03:
+ xor rbx, rbx
+ mov rdx, rdi
+ lea rcx, bword ptr [rsi]
+ call CORINFO_HELP_CHECKED_ASSIGN_REF
+ mov gword ptr [rsi+8], rbx
+ mov rax, rsi
+ G_M38150_IG04:
+ add rsp, 32
pop rbx
pop rsi
pop rdi
ret
-; Total bytes of code 94, prolog size 19 for method AsyncVoidMethodBuilder:Create():struct
+; Total bytes of code 64, prolog size 7 for method AsyncVoidMethodBuilder:Create():structRegression ; Assembly listing for method AsyncValueTaskMethodBuilder:Create():struct
;
; V00 RetBuf [V00,T00] ( 4, 4 ) byref -> rcx
-;* V01 loc0 [V01 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SB] ld-addr-op
+;* V01 loc0 [V01 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op
;# V02 OutArgs [V02 ] ( 1, 1 ) lclBlk ( 0) [rsp+0x00]
+;* V03 tmp1 [V03,T03] ( 0, 0 ) bool -> zero-ref V01._haveResult(offs=0x00) P-INDEP
+; V04 tmp2 [V04,T01] ( 3, 3 ) bool -> rax V01._useBuilder(offs=0x01) P-INDEP
+; V05 tmp3 [V05,T02] ( 2, 2 ) ref -> rdx V01._methodBuilder(offs=0x08) P-INDEP
;
; Lcl frame size = 0
G_M1524_IG01:
nop
G_M1524_IG02:
- xorps xmm0, xmm0
- movdqu qword ptr [rcx], xmm0
+ xor rdx, rdx
+ mov byte ptr [rcx], al
+ mov byte ptr [rcx+1], al
+ mov gword ptr [rcx+8], rdx
mov rax, rcx
G_M1524_IG03:
ret
-; Total bytes of code 16, prolog size 5 for method AsyncValueTaskMethodBuilder:Create():struct
+; Total bytes of code 22, prolog size 5 for method AsyncValueTaskMethodBuilder:Create():structThe However, the |
public async void Foo() { }produces a stub like: [AsyncStateMachine(typeof(<Foo>d__0))]
public void Foo()
{
<Foo>d__0 <Foo>d__ = default(<Foo>d__0);
<Foo>d__.<>t__builder = AsyncVoidMethodBuilder.Create();
<Foo>d__.<>1__state = -1;
AsyncVoidMethodBuilder <>t__builder = <Foo>d__.<>t__builder;
<>t__builder.Start(ref <Foo>d__);
} |
|
Ah... shame. Am not worried about the code gen for |
|
Would it be possible to fold e.g. going from https://gist.github.com/benaadams/ad76003a334f3da6916ac5c8a80d95d1 ***** BB01, stmt 1
( 17, 16) [000007] * STMT void (IL 0x000...0x027)
N005 ( 17, 16) [000004] | /--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST
N003 ( 3, 10) [000003] arg0 in rcx | | \--* CNS_INT(h) long 0x7ffc12345508 method
N007 ( 17, 16) [000006] \--* ASG ref
-N006 ( 1, 1) [000005] \--* LCL_VAR ref V02 tmp1 d:3
-***** BB01, stmt 2
- ( 5, 4) [000064 * STMT void (IL 0x007... ???)
-N001 ( 1, 1) [000011] | /--* LCL_VAR ref V02 tmp1 u:3 (last use)
-N003 ( 5, 4) [000063] \--* ASG ref
N002 ( 3, 2) [000062] \--* LCL_VAR ref V11 tmp10 d:3
***** BB01, stmt 3
( 7, 5) [000078] * STMT void (IL 0x00C... ???)
N001 ( 3, 2) [000182] | /--* LCL_VAR ref V11 tmp10 u:3 (last use)
N003 ( 7, 5) [000183] \--* ASG ref
N002 ( 3, 2) [000181] \--* LCL_VAR ref V13 tmp12 d:3
***** BB01, stmt 4
( 7, 5) [000074] * STMT void (IL 0x00C... ???)
N001 ( 3, 2) [000185] | /--* LCL_VAR ref V13 tmp12 u:3 (last use)
N003 ( 7, 5) [000186] \--* ASG ref
N002 ( 3, 2) [000184] \--* LCL_VAR ref V12 tmp11 d:3
***** BB01, stmt 5
( 7, 5) [000092] * STMT void (IL 0x011... ???)
N001 ( 3, 2) [000188] | /--* LCL_VAR ref V12 tmp11 u:3 (last use)
N003 ( 7, 5) [000189] \--* ASG ref
N002 ( 3, 2) [000187] \--* LCL_VAR ref V14 tmp13 d:3
***** BB01, stmt 6
( 10, 10) [000088] * STMT void (IL 0x011... ???)
N006 ( 3, 2) [000195] | /--* LCL_VAR ref V14 tmp13 u:3 (last use)
N007 ( 10, 10) [000196] \--* ASG ref
N005 ( 6, 7) [000194] \--* IND ref
N003 ( 1, 1) [000192] | /--* CNS_INT long 0 Fseq[_s]
N004 ( 5, 7) [000193] \--* ADD byref
N002 ( 3, 5) [000190] \--* ADDR byref
N001 ( 3, 4) [000191] \--* LCL_FLD struct V05 tmp4 [+0] Fseq[_s] ***** BB01, stmt 1
( 17, 16) [000007] * STMT void (IL 0x000...0x027)
N005 ( 17, 16) [000004] | /--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST
N003 ( 3, 10) [000003] arg0 in rcx | | \--* CNS_INT(h) long 0x7ffc12345508 method
N007 ( 17, 16) [000006] \--* ASG ref
-N002 ( 3, 2) [000062] \--* LCL_VAR ref V11 tmp10 d:3
-
-***** BB01, stmt 3
- ( 7, 5) [000078] * STMT void (IL 0x00C... ???)
-N001 ( 3, 2) [000182] | /--* LCL_VAR ref V11 tmp10 u:3 (last use)
-N003 ( 7, 5) [000183] \--* ASG ref
N002 ( 3, 2) [000181] \--* LCL_VAR ref V13 tmp12 d:3
***** BB01, stmt 4
( 7, 5) [000074] * STMT void (IL 0x00C... ???)
N001 ( 3, 2) [000185] | /--* LCL_VAR ref V13 tmp12 u:3 (last use)
N003 ( 7, 5) [000186] \--* ASG ref
N002 ( 3, 2) [000184] \--* LCL_VAR ref V12 tmp11 d:3
***** BB01, stmt 5
( 7, 5) [000092] * STMT void (IL 0x011... ???)
N001 ( 3, 2) [000188] | /--* LCL_VAR ref V12 tmp11 u:3 (last use)
N003 ( 7, 5) [000189] \--* ASG ref
N002 ( 3, 2) [000187] \--* LCL_VAR ref V14 tmp13 d:3
***** BB01, stmt 6
( 10, 10) [000088] * STMT void (IL 0x011... ???)
N006 ( 3, 2) [000195] | /--* LCL_VAR ref V14 tmp13 u:3 (last use)
N007 ( 10, 10) [000196] \--* ASG ref
N005 ( 6, 7) [000194] \--* IND ref
N003 ( 1, 1) [000192] | /--* CNS_INT long 0 Fseq[_s]
N004 ( 5, 7) [000193] \--* ADD byref
N002 ( 3, 5) [000190] \--* ADDR byref
N001 ( 3, 4) [000191] \--* LCL_FLD struct V05 tmp4 [+0] Fseq[_s] ***** BB01, stmt 1
( 17, 16) [000007] * STMT void (IL 0x000...0x027)
N005 ( 17, 16) [000004] | /--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST
N003 ( 3, 10) [000003] arg0 in rcx | | \--* CNS_INT(h) long 0x7ffc12345508 method
N007 ( 17, 16) [000006] \--* ASG ref
-N002 ( 3, 2) [000181] \--* LCL_VAR ref V13 tmp12 d:3
-
-***** BB01, stmt 4
- ( 7, 5) [000074] * STMT void (IL 0x00C... ???)
-N001 ( 3, 2) [000185] | /--* LCL_VAR ref V13 tmp12 u:3 (last use)
-N003 ( 7, 5) [000186] \--* ASG ref
N002 ( 3, 2) [000184] \--* LCL_VAR ref V12 tmp11 d:3
***** BB01, stmt 5
( 7, 5) [000092] * STMT void (IL 0x011... ???)
N001 ( 3, 2) [000188] | /--* LCL_VAR ref V12 tmp11 u:3 (last use)
N003 ( 7, 5) [000189] \--* ASG ref
N002 ( 3, 2) [000187] \--* LCL_VAR ref V14 tmp13 d:3
***** BB01, stmt 6
( 10, 10) [000088] * STMT void (IL 0x011... ???)
N006 ( 3, 2) [000195] | /--* LCL_VAR ref V14 tmp13 u:3 (last use)
N007 ( 10, 10) [000196] \--* ASG ref
N005 ( 6, 7) [000194] \--* IND ref
N003 ( 1, 1) [000192] | /--* CNS_INT long 0 Fseq[_s]
N004 ( 5, 7) [000193] \--* ADD byref
N002 ( 3, 5) [000190] \--* ADDR byref
N001 ( 3, 4) [000191] \--* LCL_FLD struct V05 tmp4 [+0] Fseq[_s] ***** BB01, stmt 1
( 17, 16) [000007] * STMT void (IL 0x000...0x027)
N005 ( 17, 16) [000004] | /--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST
N003 ( 3, 10) [000003] arg0 in rcx | | \--* CNS_INT(h) long 0x7ffc12345508 method
N007 ( 17, 16) [000006] \--* ASG ref
-N002 ( 3, 2) [000184] \--* LCL_VAR ref V12 tmp11 d:3
-
-***** BB01, stmt 5
- ( 7, 5) [000092] * STMT void (IL 0x011... ???)
-N001 ( 3, 2) [000188] | /--* LCL_VAR ref V12 tmp11 u:3 (last use)
-N003 ( 7, 5) [000189] \--* ASG ref
N002 ( 3, 2) [000187] \--* LCL_VAR ref V14 tmp13 d:3
***** BB01, stmt 6
( 10, 10) [000088] * STMT void (IL 0x011... ???)
N006 ( 3, 2) [000195] | /--* LCL_VAR ref V14 tmp13 u:3 (last use)
N007 ( 10, 10) [000196] \--* ASG ref
N005 ( 6, 7) [000194] \--* IND ref
N003 ( 1, 1) [000192] | /--* CNS_INT long 0 Fseq[_s]
N004 ( 5, 7) [000193] \--* ADD byref
N002 ( 3, 5) [000190] \--* ADDR byref
N001 ( 3, 4) [000191] \--* LCL_FLD struct V05 tmp4 [+0] Fseq[_s] ***** BB01, stmt 1
( 17, 16) [000007] * STMT void (IL 0x000...0x027)
N005 ( 17, 16) [000004] | /--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST
N003 ( 3, 10) [000003] arg0 in rcx | | \--* CNS_INT(h) long 0x7ffc12345508 method
N007 ( 17, 16) [000006] \--* ASG ref
-N002 ( 3, 2) [000187] \--* LCL_VAR ref V14 tmp13 d:3
-
-***** BB01, stmt 6
- ( 10, 10) [000088] * STMT void (IL 0x011... ???)
-N006 ( 3, 2) [000195] | /--* LCL_VAR ref V14 tmp13 u:3 (last use)
-N007 ( 10, 10) [000196] \--* ASG ref
N005 ( 6, 7) [000194] \--* IND ref
N003 ( 1, 1) [000192] | /--* CNS_INT long 0 Fseq[_s]
N004 ( 5, 7) [000193] \--* ADD byref
N002 ( 3, 5) [000190] \--* ADDR byref
N001 ( 3, 4) [000191] \--* LCL_FLD struct V05 tmp4 [+0] Fseq[_s] ***** BB01, stmt 1
( 17, 16) [000007] * STMT void (IL 0x000...0x027)
N005 ( 17, 16) [000004] | /--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST
N003 ( 3, 10) [000003] arg0 in rcx | | \--* CNS_INT(h) long 0x7ffc12345508 method
N007 ( 17, 16) [000006] \--* ASG ref
N005 ( 6, 7) [000194] \--* IND ref
N003 ( 1, 1) [000192] | /--* CNS_INT long 0 Fseq[_s]
N004 ( 5, 7) [000193] \--* ADD byref
N002 ( 3, 5) [000190] \--* ADDR byref
N001 ( 3, 4) [000191] \--* LCL_FLD struct V05 tmp4 [+0] Fseq[_s] |
|
Maybe that's what Copy Propagation should be doing? |
The preferencing in the register allocator should be taking care of some of that, but it's got some issues ... I've got a branch that I'm working on (dotnet/coreclr#19429) that improves it overall, and eliminates many of the copies (your That said, I agree that one would want copy prop to do a better job of this upstream. |
|
Exception handling blocks enregistration but these look more like redundant struct copies. I think we should include aspnet (or at least Kestrel) assemblies in the typical JIT diff. The forward substitution experiment I did a while ago did get rid of some copies like these in some FX assemblies but I have no I idea if that would help Kestrel or not. |
Giving it a go... dotnet/jitutils#195 |
|
Funny, some of my experimental JIT changes combined show a 2700 bytes improvement for Microsoft.AspNetCore.Server.Kestrel.Core. But most of improvements come from better struct copy codegen rather than from eliminating redundant copies. Similar for Microsoft.AspNetCore.Server.Kestrel.Transport.Sockets. Oh well, need to look at the dumps to see what exactly is going on. |
|
Async gets big fast, so this method becomes 2180 bytes of asm private async Task ProcessSends()
{
var output = Output;
while (true)
{
var result = await output.ReadAsync();
if (result.IsCanceled)
{
break;
}
var buffer = result.Buffer;
var end = buffer.End;
var isCompleted = result.IsCompleted;
if (!buffer.IsEmpty)
{
await _sender.SendAsync(buffer);
}
output.AdvanceTo(end);
if (isCompleted)
{
break;
}
}
} |
|
It would be worse if ASP.NET Core used |
|
Looking at
; Assembly listing for method <ReadBufferAsync>d__69:MoveNext():this
call qword ptr [rax+32]Stream:ReadAsync(struct,struct):struct:this
mov rcx, gword ptr [rbp-58H]
mov eax, dword ptr [rbp-50H]
mov edx, dword ptr [rbp-4CH]
movsx rdx, dx
xor r8d, r8d
lea r9, bword ptr [rbp-B8H] ; do-not-enreg[XSB] must-init addr-exposed ld-addr-op "Inline stloc first use temp"
mov gword ptr [r9], rcx
mov dword ptr [r9+8], eax
mov word ptr [r9+12], dx
mov byte ptr [r9+14], r8b
G_M42774_IG33:
movdqu xmm0, qword ptr [rbp-B8H]
movdqu qword ptr [rbp-C8H], xmm0 ; do-not-enreg[SFB] must-init "NewObj constructor temp"
G_M42774_IG34:
movdqu xmm0, qword ptr [rbp-C8H]
movdqu qword ptr [rbp-68H], xmm0 ; do-not-enreg[XSFB] must-init addr-exposed ld-addr-op
G_M42774_IG35:
movdqu xmm0, qword ptr [rbp-68H]
movdqu qword ptr [rbp-D8H], xmm0 ; do-not-enreg[SFB] must-init "NewObj constructor temp"
G_M42774_IG36:
movdqu xmm0, qword ptr [rbp-D8H]
movdqu qword ptr [rbp-78H], xmm0 ; do-not-enreg[XSFB] must-init addr-exposed ld-addr-op
G_M42774_IG37:
mov rsi, gword ptr [rbp-78H] |
|
|
Probably because there are a bunch of struct typed LCL_FLD nodes that the JIT cannot handle well. |
Hmm, because its in the il? await tmpStream.ReadAsync(new Memory<byte>(tmpByteBuffer)).ConfigureAwait(false)Becoming stloc.s, ldloca.s chains So the Jit is doing what its asked to do, in a way? |
|
Well, I don't know where those LCL_FLDs come from, presumably they were present in some IL - FSeq shows a field named |
|
Might not help they are different types; even though they are the exact same sized structs containing the same data? (as they are wrappers over each other) |
|
If I fold public ConfiguredValueTaskAwaiter GetAwaiter() => new ConfiguredValueTaskAwaiter(in _value);to public ConfiguredValueTaskAwaitable<TResult> GetAwaiter() => this;Then one of the call qword ptr [rax+32]Stream:ReadAsync(struct,struct):struct:this
mov rcx, gword ptr [rbp-58H]
mov eax, dword ptr [rbp-50H]
mov edx, dword ptr [rbp-4CH]
movsx rdx, dx
xor r8d, r8d
lea r9, bword ptr [rbp-A8H] ; do-not-enreg[XSB] must-init addr-exposed ld-addr-op "Inline stloc first use temp"
mov gword ptr [r9], rcx
mov dword ptr [r9+8], eax
mov word ptr [r9+12], dx
mov byte ptr [r9+14], r8b
G_M42772_IG32:
movdqu xmm0, qword ptr [rbp-A8H]
movdqu qword ptr [rbp-B8H], xmm0 ; do-not-enreg[SFB] must-init "NewObj constructor temp"
G_M42772_IG33:
movdqu xmm0, qword ptr [rbp-B8H]
movdqu qword ptr [rbp-68H], xmm0 ; do-not-enreg[SB] must-init ld-addr-op
G_M42772_IG34:
movdqu xmm0, qword ptr [rbp-68H] ; do-not-enreg[XSFB] must-init addr-exposed ld-addr-op
movdqu qword ptr [rbp-78H], xmm0
G_M42772_IG35:
mov rsi, gword ptr [rbp-78H]
test rsi, rsiGuessing that's |
|
Here's a derived example with similar results (3 back to back copies): using System;
using System.Runtime.CompilerServices;
using System.Runtime.InteropServices;
[StructLayout(LayoutKind.Auto)]
public readonly struct xValueTask
{
internal readonly object _obj;
internal readonly short _token;
internal readonly bool _continueOnCapturedContext;
[MethodImpl(MethodImplOptions.AggressiveInlining)]
public xValueTask(object o)
{
if (o == null)
{
ThrowHelper();
}
_obj = o;
_continueOnCapturedContext = true;
_token = 0;
}
static void ThrowHelper()
{
throw new Exception();
}
public bool IsCompleted
{
[MethodImpl(MethodImplOptions.AggressiveInlining)]
get
{
object obj = _obj;
if (obj == null)
{
return true;
}
if (obj is string s)
{
return true;
}
return false;
}
}
}
[StructLayout(LayoutKind.Auto)]
public readonly struct xConfiguredValueTaskAwaitable
{
private readonly xValueTask _value;
[MethodImpl(MethodImplOptions.AggressiveInlining)]
internal xConfiguredValueTaskAwaitable(in xValueTask value) => _value = value;
[MethodImpl(MethodImplOptions.AggressiveInlining)]
public xConfiguredValueTaskAwaiter GetAwaiter() => new xConfiguredValueTaskAwaiter(in _value);
}
[StructLayout(LayoutKind.Auto)]
public readonly struct xConfiguredValueTaskAwaiter
{
private readonly xValueTask _value;
[MethodImpl(MethodImplOptions.AggressiveInlining)]
internal xConfiguredValueTaskAwaiter(in xValueTask value) => _value = value;
public bool IsCompleted
{
get => _value.IsCompleted;
}
}
class X
{
public static int Main()
{
xValueTask xvt = new xValueTask("xyz");
xConfiguredValueTaskAwaitable xcvta = new xConfiguredValueTaskAwaitable(in xvt);
return xcvta.GetAwaiter().IsCompleted ? 100 : 0;
}
}we end up with G_M52876_IG04:
C5FA6F442430 vmovdqu xmm0, qword ptr [rsp+30H]
C5FA7F442450 vmovdqu qword ptr [rsp+50H], xmm0
G_M52876_IG05:
C5FA6F442450 vmovdqu xmm0, qword ptr [rsp+50H]
C5FA7F442420 vmovdqu qword ptr [rsp+20H], xmm0
G_M52876_IG06:
C5FA6F442420 vmovdqu xmm0, qword ptr [rsp+20H]
C5FA7F442440 vmovdqu qword ptr [rsp+40H], xmm0 |
|
Pipeline use in Kestrel is this variation on the above + using System.Buffers;
+ [Flags]
+ internal enum ResultFlags : byte
+ {
+ None = 0x0,
+ Canceled = 0x1,
+ Completed = 0x2
+ }
+ public readonly struct ReadResult
+ {
+ internal readonly ReadOnlySequence<byte> _resultBuffer;
+ internal readonly ResultFlags _resultFlags;
+ }
[StructLayout(LayoutKind.Auto)]
public readonly struct xValueTask
{
+ internal readonly ReadResult _result;
...Which has 3 xmm0 shuffles per copy sharplab.io: L005e: vmovdqu xmm0, [rsp+0xe0]
L0067: vmovdqu [rsp+0x50], xmm0
L006d: vmovdqu xmm0, [rsp+0xf0]
L0076: vmovdqu [rsp+0x60], xmm0
L007c: vmovdqu xmm0, [rsp+0x100]
L0085: vmovdqu [rsp+0x70], xmm0
L008b: vmovdqu xmm0, [rsp+0x50]
L0091: vmovdqu [rsp+0xb0], xmm0
L009a: vmovdqu xmm0, [rsp+0x60]
L00a0: vmovdqu [rsp+0xc0], xmm0
L00a9: vmovdqu xmm0, [rsp+0x70]
L00af: vmovdqu [rsp+0xd0], xmm0
L00b8: vmovdqu xmm0, [rsp+0xb0]
L00c1: vmovdqu [rsp+0x20], xmm0
L00c7: vmovdqu xmm0, [rsp+0xc0]
L00d0: vmovdqu [rsp+0x30], xmm0
L00d6: vmovdqu xmm0, [rsp+0xd0]
L00df: vmovdqu [rsp+0x40], xmm0
L00e5: vmovdqu xmm0, [rsp+0x20]
L00eb: vmovdqu [rsp+0x80], xmm0
L00f4: vmovdqu xmm0, [rsp+0x30]
L00fa: vmovdqu [rsp+0x90], xmm0
L0103: vmovdqu xmm0, [rsp+0x40]
L0109: vmovdqu [rsp+0xa0], xmm0 |
|
Guess would be copyprop? Currently outputs this But doesn't then do any copyprop |
|
Adding in the loop exit conditions |
|
And stage before Or |
|
Hmm not sure how to do this. What I'm envisaging is if there is a copy to a (first use); and followed by a (last use) copy Then that intermediate copy can be skipped becoming Or in the Live vars output becomes |
|
Might have something... |
|
dotnet/coreclr@6b3131f identifying the items to change, but not updating the tree correctly as it crashes in the |
|
Have an change that looks like it addresses it; just need to clean it up. It makes the following diff -; V00 loc0 [V00,T00] ( 5, 5 ) struct (48) [rsp+0xE0] do-not-enreg[SFB] must-init ld-addr-op
+; V00 loc0 [V00,T00] ( 5, 5 ) struct (48) [rsp+0x20] do-not-enreg[SFB] must-init ld-addr-op
-; V01 loc1 [V01,T06] ( 2, 2 ) struct (48) [rsp+0xB0] do-not-enreg[SFB] must-init ld-addr-op
+;* V01 loc1 [V01 ] ( 0, 0 ) struct (48) zero-ref do-not-enreg[SFB] ld-addr-op
-; V02 loc2 [V02,T07] ( 2, 2 ) struct (48) [rsp+0x80] do-not-enreg[SFB] must-init ld-addr-op
+;* V02 loc2 [V02 ] ( 0, 0 ) struct (48) zero-ref do-not-enreg[SFB] ld-addr-op
; V03 OutArgs [V03 ] ( 1, 1 ) lclBlk (32) [rsp+0x00] "OutgoingArgSpace"
-; V04 tmp1 [V04,T01] ( 2, 4 ) struct (48) [rsp+0x50] do-not-enreg[SFB] must-init "NewObj constructor temp"
+;* V04 tmp1 [V04 ] ( 0, 0 ) struct (48) zero-ref do-not-enreg[SFB] "NewObj constructor temp"
-; V05 tmp2 [V05,T02] ( 2, 4 ) struct (48) [rsp+0x20] do-not-enreg[SFB] must-init "NewObj constructor temp"
+;* V05 tmp2 [V05 ] ( 0, 0 ) struct (48) zero-ref do-not-enreg[SFB] "NewObj constructor temp"
; V06 tmp3 [V06,T04] ( 4, 2.50) bool -> rdx "Inline return value spill temp"
; V07 tmp4 [V07,T05] ( 3, 2.25) ref -> rax class-hnd "Inline stloc first use temp"
; V08 tmp5 [V08,T08] ( 4, 1.62) ref -> rax class-hnd "spilling QMark2"
; V09 cse0 [V09,T03] ( 3, 3 ) ref -> rax "ValNumCSE"
;
-; Lcl frame size = 272
+; Lcl frame size = 80
G_M11412_IG01:
57 push rdi
- 4881EC10010000 sub rsp, 272
+ 4883EC50 sub rsp, 80
C5F877 vzeroupper
488D7C2420 lea rdi, [rsp+20H]
- B93C000000 mov ecx, 60
+ B90C000000 mov ecx, 12
33C0 xor rax, rax
F3AB rep stosd
G_M11412_IG02:
- 48B8C033BD566E010000 mov rax, 0x16E56BD33C0
+ 48B8C033001016020000 mov rax, 0x216100033C0
488B00 mov rax, gword ptr [rax]
4885C0 test rax, rax
0F844E010000 je G_M11412_IG16
G_M11412_IG03:
- 48898424E0000000 mov gword ptr [rsp+E0H], rax
- C68424EA00000001 mov byte ptr [rsp+EAH], 1
- 66C78424E80000000000 mov word ptr [rsp+E8H], 0
- 488D8424F0000000 lea rax, bword ptr [rsp+F0H]
+ 4889442420 mov gword ptr [rsp+20H], rax
+ C644242A01 mov byte ptr [rsp+2AH], 1
+ 66C74424280000 mov word ptr [rsp+28H], 0
+ 488D442430 lea rax, bword ptr [rsp+30H]
C5F857C0 vxorps xmm0, xmm0
C5FA7F00 vmovdqu qword ptr [rax], xmm0
C5FA7F4010 vmovdqu qword ptr [rax+16], xmm0
-G_M11412_IG04:
- C5FA6F8424E0000000 vmovdqu xmm0, qword ptr [rsp+E0H]
- C5FA7F442450 vmovdqu qword ptr [rsp+50H], xmm0
- C5FA6F8424F0000000 vmovdqu xmm0, qword ptr [rsp+F0H]
- C5FA7F442460 vmovdqu qword ptr [rsp+60H], xmm0
- C5FA6F842400010000 vmovdqu xmm0, qword ptr [rsp+100H]
- C5FA7F442470 vmovdqu qword ptr [rsp+70H], xmm0
-
-G_M11412_IG05:
- C5FA6F442450 vmovdqu xmm0, qword ptr [rsp+50H]
- C5FA7F8424B0000000 vmovdqu qword ptr [rsp+B0H], xmm0
- C5FA6F442460 vmovdqu xmm0, qword ptr [rsp+60H]
- C5FA7F8424C0000000 vmovdqu qword ptr [rsp+C0H], xmm0
- C5FA6F442470 vmovdqu xmm0, qword ptr [rsp+70H]
- C5FA7F8424D0000000 vmovdqu qword ptr [rsp+D0H], xmm0
-
-G_M11412_IG06:
- C5FA6F8424B0000000 vmovdqu xmm0, qword ptr [rsp+B0H]
- C5FA7F442420 vmovdqu qword ptr [rsp+20H], xmm0
- C5FA6F8424C0000000 vmovdqu xmm0, qword ptr [rsp+C0H]
- C5FA7F442430 vmovdqu qword ptr [rsp+30H], xmm0
- C5FA6F8424D0000000 vmovdqu xmm0, qword ptr [rsp+D0H]
- C5FA7F442440 vmovdqu qword ptr [rsp+40H], xmm0
-
-G_M11412_IG07:
- C5FA6F442420 vmovdqu xmm0, qword ptr [rsp+20H]
- C5FA7F842480000000 vmovdqu qword ptr [rsp+80H], xmm0
- C5FA6F442430 vmovdqu xmm0, qword ptr [rsp+30H]
- C5FA7F842490000000 vmovdqu qword ptr [rsp+90H], xmm0
- C5FA6F442440 vmovdqu xmm0, qword ptr [rsp+40H]
- C5FA7F8424A0000000 vmovdqu qword ptr [rsp+A0H], xmm0
G_M11412_IG08:
- 488B842480000000 mov rax, gword ptr [rsp+80H]
+ 488B442420 mov rax, gword ptr [rsp+20H]
4885C0 test rax, rax |
|
This was previously issue 18542 in dotnet/coreclr, and the repro is captured as JIT\Regression\JitBlue\GitHub_18542. |
|
This is much closer now as this chonk sharplab.io: L0051: vxorps xmm0, xmm0, xmm0
L0055: vmovdqu [rax], xmm0
L0059: vmovdqu [rax+0x10], xmm0
L005e: vmovdqu xmm0, [rsp+0xe0]
L0067: vmovdqu [rsp+0x50], xmm0
L006d: vmovdqu xmm0, [rsp+0xf0]
L0076: vmovdqu [rsp+0x60], xmm0
L007c: vmovdqu xmm0, [rsp+0x100]
L0085: vmovdqu [rsp+0x70], xmm0
L008b: vmovdqu xmm0, [rsp+0x50]
L0091: vmovdqu [rsp+0xb0], xmm0
L009a: vmovdqu xmm0, [rsp+0x60]
L00a0: vmovdqu [rsp+0xc0], xmm0
L00a9: vmovdqu xmm0, [rsp+0x70]
L00af: vmovdqu [rsp+0xd0], xmm0
L00b8: vmovdqu xmm0, [rsp+0xb0]
L00c1: vmovdqu [rsp+0x20], xmm0
L00c7: vmovdqu xmm0, [rsp+0xc0]
L00d0: vmovdqu [rsp+0x30], xmm0
L00d6: vmovdqu xmm0, [rsp+0xd0]
L00df: vmovdqu [rsp+0x40], xmm0
L00e5: vmovdqu xmm0, [rsp+0x20]
L00eb: vmovdqu [rsp+0x80], xmm0
L00f4: vmovdqu xmm0, [rsp+0x30]
L00fa: vmovdqu [rsp+0x90], xmm0
L0103: vmovdqu xmm0, [rsp+0x40]
L0109: vmovdqu [rsp+0xa0], xmm0
L0112: mov rax, [rsp+0x80]
L011a: test rax, raxHas trimmed down significantly; which looks to be copying to output stack? vxorps xmm0, xmm0
vmovdqu xmmword ptr [rsp+48H], xmm0
vmovdqu xmmword ptr [rsp+58H], xmm0
G_M7880_IG03:
vmovdqu xmm0, xmmword ptr [rsp+38H]
vmovdqu xmmword ptr [rsp+08H], xmm0
vmovdqu xmm0, xmmword ptr [rsp+48H]
vmovdqu xmmword ptr [rsp+18H], xmm0
vmovdqu xmm0, xmmword ptr [rsp+58H]
vmovdqu xmmword ptr [rsp+28H], xmm0
G_M7880_IG04:
mov rax, gword ptr [rsp+08H]
test rax, raxSo will close |
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(Some now fixed by dotnet/coreclr#19429)
This is problematic for example when adding formatting and/or buffering capabilities over
Span<T>As seen in "Add support for
BufferWriter<T>to the JsonWriter" dotnet/corefxlab#2366When a struct wraps a struct (but has no additional fields) it becomes a non-zero cost abstraction for its constructor (but not method calls) e.g. sharplab.io
Given
Each additional wrapper introduces redundant work in the asm e.g.
category:cq
theme:structs
skill-level:expert
cost:medium
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