Skip to content

Commit 1d3d085

Browse files
committed
Redesign the frame layout for LoongArch64/ARM64/RISCV64 to avoid the
redundant computation of the stackOffsets. After the `lvaAssignVirtualFrameOffsetsToLocals`, there is no need to recompute the LclVarDsc's StackOffset within the `lvaFixVirtualFrameOffsets`.
1 parent f6f9199 commit 1d3d085

11 files changed

+678
-1913
lines changed

src/coreclr/jit/codegen.h

+1-50
Original file line numberDiff line numberDiff line change
@@ -402,27 +402,6 @@ class CodeGen final : public CodeGenInterface
402402

403403
FuncletFrameInfoDsc genFuncletInfo;
404404

405-
#elif defined(TARGET_ARM64)
406-
407-
// A set of information that is used by funclet prolog and epilog generation. It is collected once, before
408-
// funclet prologs and epilogs are generated, and used by all funclet prologs and epilogs, which must all be the
409-
// same.
410-
struct FuncletFrameInfoDsc
411-
{
412-
regMaskTP fiSaveRegs; // Set of callee-saved registers saved in the funclet prolog (includes LR)
413-
int fiFunction_CallerSP_to_FP_delta; // Delta between caller SP and the frame pointer in the parent function
414-
// (negative)
415-
int fiSP_to_FPLR_save_delta; // FP/LR register save offset from SP (positive)
416-
int fiSP_to_PSP_slot_delta; // PSP slot offset from SP (positive)
417-
int fiSP_to_CalleeSave_delta; // First callee-saved register slot offset from SP (positive)
418-
int fiCallerSP_to_PSP_slot_delta; // PSP slot offset from Caller SP (negative)
419-
int fiFrameType; // Funclet frame types are numbered. See genFuncletProlog() for details.
420-
int fiSpDelta1; // Stack pointer delta 1 (negative)
421-
int fiSpDelta2; // Stack pointer delta 2 (negative)
422-
};
423-
424-
FuncletFrameInfoDsc genFuncletInfo;
425-
426405
#elif defined(TARGET_AMD64)
427406

428407
// A set of information that is used by funclet prolog and epilog generation. It is collected once, before
@@ -437,26 +416,7 @@ class CodeGen final : public CodeGenInterface
437416

438417
FuncletFrameInfoDsc genFuncletInfo;
439418

440-
#elif defined(TARGET_LOONGARCH64)
441-
442-
// A set of information that is used by funclet prolog and epilog generation.
443-
// It is collected once, before funclet prologs and epilogs are generated,
444-
// and used by all funclet prologs and epilogs, which must all be the same.
445-
struct FuncletFrameInfoDsc
446-
{
447-
regMaskTP fiSaveRegs; // Set of callee-saved registers saved in the funclet prolog (includes RA)
448-
int fiFunction_CallerSP_to_FP_delta; // Delta between caller SP and the frame pointer in the parent function
449-
// (negative)
450-
int fiSP_to_CalleeSaved_delta; // CalleeSaved register save offset from SP (positive)
451-
int fiCalleeSavedPadding; // CalleeSaved offset padding (positive)
452-
int fiSP_to_PSP_slot_delta; // PSP slot offset from SP (positive)
453-
int fiCallerSP_to_PSP_slot_delta; // PSP slot offset from Caller SP (negative)
454-
int fiSpDelta; // Stack pointer delta (negative)
455-
};
456-
457-
FuncletFrameInfoDsc genFuncletInfo;
458-
459-
#elif defined(TARGET_RISCV64)
419+
#elif defined(TARGET_LOONGARCH64) || defined(TARGET_ARM64) || defined(TARGET_RISCV64)
460420

461421
// A set of information that is used by funclet prolog and epilog generation.
462422
// It is collected once, before funclet prologs and epilogs are generated,
@@ -467,7 +427,6 @@ class CodeGen final : public CodeGenInterface
467427
int fiFunction_CallerSP_to_FP_delta; // Delta between caller SP and the frame pointer in the parent function
468428
// (negative)
469429
int fiSP_to_CalleeSaved_delta; // CalleeSaved register save offset from SP (positive)
470-
int fiCalleeSavedPadding; // CalleeSaved offset padding (positive)
471430
int fiSP_to_PSP_slot_delta; // PSP slot offset from SP (positive)
472431
int fiCallerSP_to_PSP_slot_delta; // PSP slot offset from Caller SP (negative)
473432
int fiSpDelta; // Stack pointer delta (negative)
@@ -658,13 +617,6 @@ class CodeGen final : public CodeGenInterface
658617

659618
#endif // defined(DEBUG)
660619

661-
#ifdef TARGET_ARM64
662-
virtual void SetSaveFpLrWithAllCalleeSavedRegisters(bool value);
663-
virtual bool IsSaveFpLrWithAllCalleeSavedRegisters() const;
664-
bool genSaveFpLrWithAllCalleeSavedRegisters;
665-
bool genForceFuncletFrameType5;
666-
#endif // TARGET_ARM64
667-
668620
//-------------------------------------------------------------------------
669621
//
670622
// End prolog/epilog generation
@@ -1272,7 +1224,6 @@ class CodeGen final : public CodeGenInterface
12721224
void genJmpMethod(GenTree* jmp);
12731225
BasicBlock* genCallFinally(BasicBlock* block);
12741226
#if defined(TARGET_LOONGARCH64) || defined(TARGET_RISCV64)
1275-
// TODO: refactor for LA.
12761227
void genCodeForJumpCompare(GenTreeOpCC* tree);
12771228
#endif
12781229
#if defined(TARGET_ARM64)

0 commit comments

Comments
 (0)