File tree 8 files changed +22
-9
lines changed
aot/ILCompiler.Diagnostics
libraries/System.Reflection.Metadata/src/System/Reflection/PortableExecutable
8 files changed +22
-9
lines changed Original file line number Diff line number Diff line change @@ -58,6 +58,11 @@ public override ComputedInstanceFieldLayout ComputeInstanceLayout(DefType defTyp
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// 16-byte alignment for __m256.
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alignment = new LayoutInt ( 16 ) ;
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}
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+ else if ( defType . Context . Target . Architecture == TargetArchitecture . LoongArch64 )
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+ {
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+ // TODO-LoongArch64: Update alignment to proper value when implement LoongArch64 intrinsic.
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+ alignment = new LayoutInt ( 16 ) ;
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+ }
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else if ( defType . Context . Target . Architecture == TargetArchitecture . RiscV64 )
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{
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// TODO-RISCV64: Update alignment to proper value when we implement RISC-V intrinsic.
@@ -86,6 +91,11 @@ public override ComputedInstanceFieldLayout ComputeInstanceLayout(DefType defTyp
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// 16-byte alignment for __m256.
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alignment = new LayoutInt ( 16 ) ;
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}
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+ else if ( defType . Context . Target . Architecture == TargetArchitecture . LoongArch64 )
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+ {
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+ // TODO-LoongArch64: Update alignment to proper value when implement LoongArch64 intrinsic.
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+ alignment = new LayoutInt ( 16 ) ;
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+ }
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else if ( defType . Context . Target . Architecture == TargetArchitecture . RiscV64 )
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{
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// TODO-RISCV64: Update alignment to proper value when we implement RISC-V intrinsic.
Original file line number Diff line number Diff line change @@ -415,9 +415,10 @@ private CompilationResult CompileMethodInternal(IMethodNode methodCodeNodeNeedin
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if ( codeSize < _code . Length )
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{
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if ( _compilation . TypeSystemContext . Target . Architecture != TargetArchitecture . ARM64
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+ && _compilation . TypeSystemContext . Target . Architecture != TargetArchitecture . LoongArch64
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&& _compilation . TypeSystemContext . Target . Architecture != TargetArchitecture . RiscV64 )
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{
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- // For xarch/arm32/RiscV64, the generated code is sometimes smaller than the memory allocated.
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+ // For xarch/arm32/LoongArch64/ RiscV64, the generated code is sometimes smaller than the memory allocated.
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// In that case, trim the codeBlock to the actual value.
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//
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// For arm64, the allocation request of `hotCodeSize` also includes the roData size
Original file line number Diff line number Diff line change @@ -29,12 +29,6 @@ public static uint GetLoongArch64PassStructInRegisterFlags(TypeDesc typeDesc)
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return ( uint ) StructFloatFieldInfoFlags . STRUCT_NO_FLOAT_FIELD ;
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}
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- //// The SIMD Intrinsic types are meant to be handled specially and should not be passed as struct registers
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- if ( typeDesc . IsIntrinsic )
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- {
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- throw new NotImplementedException ( "For LoongArch64, SIMD would be implemented later" ) ;
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- }
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-
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MetadataType mdType = typeDesc as MetadataType ;
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Debug . Assert ( mdType != null ) ;
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Original file line number Diff line number Diff line change @@ -136,6 +136,7 @@ private static PerfmapTokensForTarget TranslateTargetDetailsToPerfmapConstants(T
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TargetArchitecture . X64 => PerfMapArchitectureToken . X64 ,
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TargetArchitecture . X86 => PerfMapArchitectureToken . X86 ,
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TargetArchitecture . RiscV64 => PerfMapArchitectureToken . RiscV64 ,
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+ TargetArchitecture . LoongArch64 => PerfMapArchitectureToken . LoongArch64 ,
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_ => throw new NotImplementedException ( details . Architecture . ToString ( ) )
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} ;
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Original file line number Diff line number Diff line change @@ -20,6 +20,7 @@ public enum PerfMapArchitectureToken : uint
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X64 = 3 ,
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X86 = 4 ,
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RiscV64 = 5 ,
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+ LoongArch64 = 6 ,
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}
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public enum PerfMapOSToken : uint
Original file line number Diff line number Diff line change @@ -10051,6 +10051,9 @@ void MethodTableBuilder::CheckForSystemTypes()
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// The Procedure Call Standard for ARM 64-bit (with SVE support) defaults to
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// 16-byte alignment for __m256.
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+ pLayout->m_ManagedLargestAlignmentRequirementOfAllMembers = 16;
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+ #elif defined(TARGET_LOONGARCH64)
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+ // TODO-LoongArch64: Update alignment to proper value when implement LoongArch64 intrinsic.
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pLayout->m_ManagedLargestAlignmentRequirementOfAllMembers = 16;
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#elif defined(TARGET_RISCV64)
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// TODO-RISCV64: Update alignment to proper value when we implement RISC-V intrinsic.
@@ -10074,6 +10077,9 @@ void MethodTableBuilder::CheckForSystemTypes()
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pLayout->m_ManagedLargestAlignmentRequirementOfAllMembers = 16;
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+ #elif defined(TARGET_LOONGARCH64)
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+ // TODO-LoongArch64: Update alignment to proper value when implement LoongArch64 intrinsic.
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+ pLayout->m_ManagedLargestAlignmentRequirementOfAllMembers = 16;
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#elif defined(TARGET_RISCV64)
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// TODO-RISCV64: Update alignment to proper value when we implement RISC-V intrinsic.
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// RISC-V Vector Extenstion Intrinsic Document
Original file line number Diff line number Diff line change @@ -90,7 +90,7 @@ public ManagedTextSection(
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/// If set, the module contains instructions that assume a 64 bit instruction set. For example it may depend on an address being 64 bits.
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/// This may be true even if the module contains only IL instructions because of PlatformInvoke and COM interop.
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/// </summary>
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- internal bool Requires64bits => Machine == Machine . Amd64 || Machine == Machine . IA64 || Machine == Machine . Arm64 ;
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+ internal bool Requires64bits => Machine == Machine . Amd64 || Machine == Machine . IA64 || Machine == Machine . Arm64 || Machine == Machine . LoongArch64 ;
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public bool Is32Bit => ! Requires64bits ;
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Original file line number Diff line number Diff line change @@ -105,7 +105,7 @@ public static PEHeaderBuilder CreateLibraryHeader()
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return new PEHeaderBuilder ( imageCharacteristics : Characteristics . ExecutableImage | Characteristics . Dll ) ;
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}
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- internal bool Is32Bit => Machine != Machine . Amd64 && Machine != Machine . IA64 && Machine != Machine . Arm64 && Machine != Machine . RiscV64 ;
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+ internal bool Is32Bit => Machine != Machine . Amd64 && Machine != Machine . IA64 && Machine != Machine . Arm64 && Machine != Machine . LoongArch64 && Machine != Machine . RiscV64 ;
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internal int ComputeSizeOfPEHeaders ( int sectionCount ) =>
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PEBuilder . DosHeaderSize +
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