Fix failures on GNR for AVX10v1

Author: khushal1996

src/coreclr/jit/hwintrinsiccodegenxarch.cpp

@@ -760,6 +760,7 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)
         case InstructionSet_AVX512VBMI_VL:
         case InstructionSet_AVX10v1:
         case InstructionSet_AVX10v1_V256:
+        case InstructionSet_AVX10v1_V512:
         {
             genAvxFamilyIntrinsic(node, instOptions);
             break;

src/coreclr/jit/hwintrinsicxarch.cpp

@@ -3647,6 +3647,7 @@ GenTree* Compiler::impSpecialIntrinsic(NamedIntrinsic        intrinsic,
         case NI_AVX10v1_PermuteVar16x16:
         case NI_AVX10v1_PermuteVar32x8:
         case NI_AVX10v1_PermuteVar4x64:
+        case NI_AVX10v1_V512_PermuteVar64x8:
         {
             simdBaseJitType = getBaseJitTypeOfSIMDType(sig->retTypeSigClass);
 

src/coreclr/jit/lowerxarch.cpp

@@ -10897,6 +10897,7 @@ void Lowering::ContainCheckHWIntrinsic(GenTreeHWIntrinsic* node)
                         case NI_AVX512F_FixupScalar:
                         case NI_AVX512F_VL_Fixup:
                         case NI_AVX10v1_Fixup:
+                        case NI_AVX10v1_FixupScalar:
                         {
                             if (!isContainedImm)
                             {

src/coreclr/jit/lsraxarch.cpp

@@ -2593,6 +2593,7 @@ int LinearScan::BuildHWIntrinsic(GenTreeHWIntrinsic* intrinsicTree, int* pDstCou
             case NI_AVX10v1_PermuteVar4x64x2:
             case NI_AVX10v1_PermuteVar8x32x2:
             case NI_AVX10v1_PermuteVar16x16x2:
+            case NI_AVX10v1_V512_PermuteVar64x8x2:
             {
                 assert(numArgs == 3);
                 assert(isRMW);