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tannergoodingtannergooding
committedJun 10, 2024
Cleanup the instruction set implications for xarch
1 parent 23cd593 commit c87d73c

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6 files changed

+263
-331
lines changed

6 files changed

+263
-331
lines changed
 

‎src/coreclr/inc/corinfoinstructionset.h

+32-52
Original file line numberDiff line numberDiff line change
@@ -584,12 +584,12 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins
584584
resultflags.RemoveInstructionSet(InstructionSet_SSE41);
585585
if (resultflags.HasInstructionSet(InstructionSet_SSE42) && !resultflags.HasInstructionSet(InstructionSet_SSE41))
586586
resultflags.RemoveInstructionSet(InstructionSet_SSE42);
587+
if (resultflags.HasInstructionSet(InstructionSet_POPCNT) && !resultflags.HasInstructionSet(InstructionSet_SSE42))
588+
resultflags.RemoveInstructionSet(InstructionSet_POPCNT);
587589
if (resultflags.HasInstructionSet(InstructionSet_AVX) && !resultflags.HasInstructionSet(InstructionSet_SSE42))
588590
resultflags.RemoveInstructionSet(InstructionSet_AVX);
589591
if (resultflags.HasInstructionSet(InstructionSet_AVX2) && !resultflags.HasInstructionSet(InstructionSet_AVX))
590592
resultflags.RemoveInstructionSet(InstructionSet_AVX2);
591-
if (resultflags.HasInstructionSet(InstructionSet_AES) && !resultflags.HasInstructionSet(InstructionSet_SSE2))
592-
resultflags.RemoveInstructionSet(InstructionSet_AES);
593593
if (resultflags.HasInstructionSet(InstructionSet_BMI1) && !resultflags.HasInstructionSet(InstructionSet_AVX))
594594
resultflags.RemoveInstructionSet(InstructionSet_BMI1);
595595
if (resultflags.HasInstructionSet(InstructionSet_BMI2) && !resultflags.HasInstructionSet(InstructionSet_AVX))
@@ -598,22 +598,8 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins
598598
resultflags.RemoveInstructionSet(InstructionSet_FMA);
599599
if (resultflags.HasInstructionSet(InstructionSet_LZCNT) && !resultflags.HasInstructionSet(InstructionSet_X86Base))
600600
resultflags.RemoveInstructionSet(InstructionSet_LZCNT);
601-
if (resultflags.HasInstructionSet(InstructionSet_PCLMULQDQ) && !resultflags.HasInstructionSet(InstructionSet_SSE2))
602-
resultflags.RemoveInstructionSet(InstructionSet_PCLMULQDQ);
603-
if (resultflags.HasInstructionSet(InstructionSet_POPCNT) && !resultflags.HasInstructionSet(InstructionSet_SSE42))
604-
resultflags.RemoveInstructionSet(InstructionSet_POPCNT);
605-
if (resultflags.HasInstructionSet(InstructionSet_Vector128) && !resultflags.HasInstructionSet(InstructionSet_SSE))
606-
resultflags.RemoveInstructionSet(InstructionSet_Vector128);
607-
if (resultflags.HasInstructionSet(InstructionSet_Vector256) && !resultflags.HasInstructionSet(InstructionSet_AVX))
608-
resultflags.RemoveInstructionSet(InstructionSet_Vector256);
609-
if (resultflags.HasInstructionSet(InstructionSet_Vector512) && !resultflags.HasInstructionSet(InstructionSet_AVX512F))
610-
resultflags.RemoveInstructionSet(InstructionSet_Vector512);
611-
if (resultflags.HasInstructionSet(InstructionSet_AVXVNNI) && !resultflags.HasInstructionSet(InstructionSet_AVX2))
612-
resultflags.RemoveInstructionSet(InstructionSet_AVXVNNI);
613601
if (resultflags.HasInstructionSet(InstructionSet_MOVBE) && !resultflags.HasInstructionSet(InstructionSet_SSE42))
614602
resultflags.RemoveInstructionSet(InstructionSet_MOVBE);
615-
if (resultflags.HasInstructionSet(InstructionSet_X86Serialize) && !resultflags.HasInstructionSet(InstructionSet_X86Base))
616-
resultflags.RemoveInstructionSet(InstructionSet_X86Serialize);
617603
if (resultflags.HasInstructionSet(InstructionSet_EVEX) && !resultflags.HasInstructionSet(InstructionSet_AVX2))
618604
resultflags.RemoveInstructionSet(InstructionSet_EVEX);
619605
if (resultflags.HasInstructionSet(InstructionSet_EVEX) && !resultflags.HasInstructionSet(InstructionSet_FMA))
@@ -646,10 +632,14 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins
646632
resultflags.RemoveInstructionSet(InstructionSet_AVX512VBMI_VL);
647633
if (resultflags.HasInstructionSet(InstructionSet_AVX512VBMI_VL) && !resultflags.HasInstructionSet(InstructionSet_AVX512BW_VL))
648634
resultflags.RemoveInstructionSet(InstructionSet_AVX512VBMI_VL);
649-
if (resultflags.HasInstructionSet(InstructionSet_EVEX) && !resultflags.HasInstructionSet(InstructionSet_AVX2))
650-
resultflags.RemoveInstructionSet(InstructionSet_EVEX);
651-
if (resultflags.HasInstructionSet(InstructionSet_EVEX) && !resultflags.HasInstructionSet(InstructionSet_FMA))
652-
resultflags.RemoveInstructionSet(InstructionSet_EVEX);
635+
if (resultflags.HasInstructionSet(InstructionSet_AES) && !resultflags.HasInstructionSet(InstructionSet_SSE2))
636+
resultflags.RemoveInstructionSet(InstructionSet_AES);
637+
if (resultflags.HasInstructionSet(InstructionSet_PCLMULQDQ) && !resultflags.HasInstructionSet(InstructionSet_SSE2))
638+
resultflags.RemoveInstructionSet(InstructionSet_PCLMULQDQ);
639+
if (resultflags.HasInstructionSet(InstructionSet_AVXVNNI) && !resultflags.HasInstructionSet(InstructionSet_AVX2))
640+
resultflags.RemoveInstructionSet(InstructionSet_AVXVNNI);
641+
if (resultflags.HasInstructionSet(InstructionSet_X86Serialize) && !resultflags.HasInstructionSet(InstructionSet_X86Base))
642+
resultflags.RemoveInstructionSet(InstructionSet_X86Serialize);
653643
if (resultflags.HasInstructionSet(InstructionSet_AVX10v1) && !resultflags.HasInstructionSet(InstructionSet_EVEX))
654644
resultflags.RemoveInstructionSet(InstructionSet_AVX10v1);
655645
if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX10v1))
@@ -674,18 +664,18 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins
674664
resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512);
675665
if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX512VBMI_VL))
676666
resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512);
667+
if (resultflags.HasInstructionSet(InstructionSet_Vector128) && !resultflags.HasInstructionSet(InstructionSet_SSE))
668+
resultflags.RemoveInstructionSet(InstructionSet_Vector128);
669+
if (resultflags.HasInstructionSet(InstructionSet_Vector256) && !resultflags.HasInstructionSet(InstructionSet_AVX))
670+
resultflags.RemoveInstructionSet(InstructionSet_Vector256);
671+
if (resultflags.HasInstructionSet(InstructionSet_Vector512) && !resultflags.HasInstructionSet(InstructionSet_AVX512F))
672+
resultflags.RemoveInstructionSet(InstructionSet_Vector512);
677673
if (resultflags.HasInstructionSet(InstructionSet_VectorT128) && !resultflags.HasInstructionSet(InstructionSet_SSE2))
678674
resultflags.RemoveInstructionSet(InstructionSet_VectorT128);
679675
if (resultflags.HasInstructionSet(InstructionSet_VectorT256) && !resultflags.HasInstructionSet(InstructionSet_AVX2))
680676
resultflags.RemoveInstructionSet(InstructionSet_VectorT256);
681677
if (resultflags.HasInstructionSet(InstructionSet_VectorT512) && !resultflags.HasInstructionSet(InstructionSet_AVX512F))
682678
resultflags.RemoveInstructionSet(InstructionSet_VectorT512);
683-
if (resultflags.HasInstructionSet(InstructionSet_AVX512F) && !resultflags.HasInstructionSet(InstructionSet_AVX512BW_VL))
684-
resultflags.RemoveInstructionSet(InstructionSet_AVX512F);
685-
if (resultflags.HasInstructionSet(InstructionSet_AVX512F) && !resultflags.HasInstructionSet(InstructionSet_AVX512CD_VL))
686-
resultflags.RemoveInstructionSet(InstructionSet_AVX512F);
687-
if (resultflags.HasInstructionSet(InstructionSet_AVX512F) && !resultflags.HasInstructionSet(InstructionSet_AVX512DQ_VL))
688-
resultflags.RemoveInstructionSet(InstructionSet_AVX512F);
689679
#endif // TARGET_AMD64
690680
#ifdef TARGET_X86
691681
if (resultflags.HasInstructionSet(InstructionSet_SSE) && !resultflags.HasInstructionSet(InstructionSet_X86Base))
@@ -700,12 +690,12 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins
700690
resultflags.RemoveInstructionSet(InstructionSet_SSE41);
701691
if (resultflags.HasInstructionSet(InstructionSet_SSE42) && !resultflags.HasInstructionSet(InstructionSet_SSE41))
702692
resultflags.RemoveInstructionSet(InstructionSet_SSE42);
693+
if (resultflags.HasInstructionSet(InstructionSet_POPCNT) && !resultflags.HasInstructionSet(InstructionSet_SSE42))
694+
resultflags.RemoveInstructionSet(InstructionSet_POPCNT);
703695
if (resultflags.HasInstructionSet(InstructionSet_AVX) && !resultflags.HasInstructionSet(InstructionSet_SSE42))
704696
resultflags.RemoveInstructionSet(InstructionSet_AVX);
705697
if (resultflags.HasInstructionSet(InstructionSet_AVX2) && !resultflags.HasInstructionSet(InstructionSet_AVX))
706698
resultflags.RemoveInstructionSet(InstructionSet_AVX2);
707-
if (resultflags.HasInstructionSet(InstructionSet_AES) && !resultflags.HasInstructionSet(InstructionSet_SSE2))
708-
resultflags.RemoveInstructionSet(InstructionSet_AES);
709699
if (resultflags.HasInstructionSet(InstructionSet_BMI1) && !resultflags.HasInstructionSet(InstructionSet_AVX))
710700
resultflags.RemoveInstructionSet(InstructionSet_BMI1);
711701
if (resultflags.HasInstructionSet(InstructionSet_BMI2) && !resultflags.HasInstructionSet(InstructionSet_AVX))
@@ -714,22 +704,8 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins
714704
resultflags.RemoveInstructionSet(InstructionSet_FMA);
715705
if (resultflags.HasInstructionSet(InstructionSet_LZCNT) && !resultflags.HasInstructionSet(InstructionSet_X86Base))
716706
resultflags.RemoveInstructionSet(InstructionSet_LZCNT);
717-
if (resultflags.HasInstructionSet(InstructionSet_PCLMULQDQ) && !resultflags.HasInstructionSet(InstructionSet_SSE2))
718-
resultflags.RemoveInstructionSet(InstructionSet_PCLMULQDQ);
719-
if (resultflags.HasInstructionSet(InstructionSet_POPCNT) && !resultflags.HasInstructionSet(InstructionSet_SSE42))
720-
resultflags.RemoveInstructionSet(InstructionSet_POPCNT);
721-
if (resultflags.HasInstructionSet(InstructionSet_Vector128) && !resultflags.HasInstructionSet(InstructionSet_SSE))
722-
resultflags.RemoveInstructionSet(InstructionSet_Vector128);
723-
if (resultflags.HasInstructionSet(InstructionSet_Vector256) && !resultflags.HasInstructionSet(InstructionSet_AVX))
724-
resultflags.RemoveInstructionSet(InstructionSet_Vector256);
725-
if (resultflags.HasInstructionSet(InstructionSet_Vector512) && !resultflags.HasInstructionSet(InstructionSet_AVX512F))
726-
resultflags.RemoveInstructionSet(InstructionSet_Vector512);
727-
if (resultflags.HasInstructionSet(InstructionSet_AVXVNNI) && !resultflags.HasInstructionSet(InstructionSet_AVX2))
728-
resultflags.RemoveInstructionSet(InstructionSet_AVXVNNI);
729707
if (resultflags.HasInstructionSet(InstructionSet_MOVBE) && !resultflags.HasInstructionSet(InstructionSet_SSE42))
730708
resultflags.RemoveInstructionSet(InstructionSet_MOVBE);
731-
if (resultflags.HasInstructionSet(InstructionSet_X86Serialize) && !resultflags.HasInstructionSet(InstructionSet_X86Base))
732-
resultflags.RemoveInstructionSet(InstructionSet_X86Serialize);
733709
if (resultflags.HasInstructionSet(InstructionSet_EVEX) && !resultflags.HasInstructionSet(InstructionSet_AVX2))
734710
resultflags.RemoveInstructionSet(InstructionSet_EVEX);
735711
if (resultflags.HasInstructionSet(InstructionSet_EVEX) && !resultflags.HasInstructionSet(InstructionSet_FMA))
@@ -762,10 +738,14 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins
762738
resultflags.RemoveInstructionSet(InstructionSet_AVX512VBMI_VL);
763739
if (resultflags.HasInstructionSet(InstructionSet_AVX512VBMI_VL) && !resultflags.HasInstructionSet(InstructionSet_AVX512BW_VL))
764740
resultflags.RemoveInstructionSet(InstructionSet_AVX512VBMI_VL);
765-
if (resultflags.HasInstructionSet(InstructionSet_EVEX) && !resultflags.HasInstructionSet(InstructionSet_AVX2))
766-
resultflags.RemoveInstructionSet(InstructionSet_EVEX);
767-
if (resultflags.HasInstructionSet(InstructionSet_EVEX) && !resultflags.HasInstructionSet(InstructionSet_FMA))
768-
resultflags.RemoveInstructionSet(InstructionSet_EVEX);
741+
if (resultflags.HasInstructionSet(InstructionSet_AES) && !resultflags.HasInstructionSet(InstructionSet_SSE2))
742+
resultflags.RemoveInstructionSet(InstructionSet_AES);
743+
if (resultflags.HasInstructionSet(InstructionSet_PCLMULQDQ) && !resultflags.HasInstructionSet(InstructionSet_SSE2))
744+
resultflags.RemoveInstructionSet(InstructionSet_PCLMULQDQ);
745+
if (resultflags.HasInstructionSet(InstructionSet_AVXVNNI) && !resultflags.HasInstructionSet(InstructionSet_AVX2))
746+
resultflags.RemoveInstructionSet(InstructionSet_AVXVNNI);
747+
if (resultflags.HasInstructionSet(InstructionSet_X86Serialize) && !resultflags.HasInstructionSet(InstructionSet_X86Base))
748+
resultflags.RemoveInstructionSet(InstructionSet_X86Serialize);
769749
if (resultflags.HasInstructionSet(InstructionSet_AVX10v1) && !resultflags.HasInstructionSet(InstructionSet_EVEX))
770750
resultflags.RemoveInstructionSet(InstructionSet_AVX10v1);
771751
if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX10v1))
@@ -790,18 +770,18 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins
790770
resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512);
791771
if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX512VBMI_VL))
792772
resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512);
773+
if (resultflags.HasInstructionSet(InstructionSet_Vector128) && !resultflags.HasInstructionSet(InstructionSet_SSE))
774+
resultflags.RemoveInstructionSet(InstructionSet_Vector128);
775+
if (resultflags.HasInstructionSet(InstructionSet_Vector256) && !resultflags.HasInstructionSet(InstructionSet_AVX))
776+
resultflags.RemoveInstructionSet(InstructionSet_Vector256);
777+
if (resultflags.HasInstructionSet(InstructionSet_Vector512) && !resultflags.HasInstructionSet(InstructionSet_AVX512F))
778+
resultflags.RemoveInstructionSet(InstructionSet_Vector512);
793779
if (resultflags.HasInstructionSet(InstructionSet_VectorT128) && !resultflags.HasInstructionSet(InstructionSet_SSE2))
794780
resultflags.RemoveInstructionSet(InstructionSet_VectorT128);
795781
if (resultflags.HasInstructionSet(InstructionSet_VectorT256) && !resultflags.HasInstructionSet(InstructionSet_AVX2))
796782
resultflags.RemoveInstructionSet(InstructionSet_VectorT256);
797783
if (resultflags.HasInstructionSet(InstructionSet_VectorT512) && !resultflags.HasInstructionSet(InstructionSet_AVX512F))
798784
resultflags.RemoveInstructionSet(InstructionSet_VectorT512);
799-
if (resultflags.HasInstructionSet(InstructionSet_AVX512F) && !resultflags.HasInstructionSet(InstructionSet_AVX512BW_VL))
800-
resultflags.RemoveInstructionSet(InstructionSet_AVX512F);
801-
if (resultflags.HasInstructionSet(InstructionSet_AVX512F) && !resultflags.HasInstructionSet(InstructionSet_AVX512CD_VL))
802-
resultflags.RemoveInstructionSet(InstructionSet_AVX512F);
803-
if (resultflags.HasInstructionSet(InstructionSet_AVX512F) && !resultflags.HasInstructionSet(InstructionSet_AVX512DQ_VL))
804-
resultflags.RemoveInstructionSet(InstructionSet_AVX512F);
805785
#endif // TARGET_X86
806786

807787
} while (!oldflags.Equals(resultflags));

‎src/coreclr/jit/hwintrinsiclistxarch.h

+30-30
Large diffs are not rendered by default.

‎src/coreclr/tools/Common/JitInterface/CorInfoInstructionSet.cs

+60-100
Large diffs are not rendered by default.

‎src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetDesc.txt

+30-23
Original file line numberDiff line numberDiff line change
@@ -101,45 +101,55 @@ vectorinstructionset,X86 ,Vector128
101101
vectorinstructionset,X86 ,Vector256
102102
vectorinstructionset,X86 ,Vector512
103103

104+
; x86-64-v1
105+
104106
implication ,X86 ,SSE ,X86Base
105107
implication ,X86 ,SSE2 ,SSE
108+
109+
; x86-64-v2
110+
106111
implication ,X86 ,SSE3 ,SSE2
107112
implication ,X86 ,SSSE3 ,SSE3
108113
implication ,X86 ,SSE41 ,SSSE3
109114
implication ,X86 ,SSE42 ,SSE41
115+
implication ,X86 ,POPCNT ,SSE42
116+
117+
; x86-64-v3
118+
110119
implication ,X86 ,AVX ,SSE42
111120
implication ,X86 ,AVX2 ,AVX
112-
implication ,X86 ,AES ,SSE2
113121
implication ,X86 ,BMI1 ,AVX
114122
implication ,X86 ,BMI2 ,AVX
115123
implication ,X86 ,FMA ,AVX
116124
implication ,X86 ,LZCNT ,X86Base
117-
implication ,X86 ,PCLMULQDQ ,SSE2
118-
implication ,X86 ,POPCNT ,SSE42
119-
implication ,X86 ,Vector128 ,SSE
120-
implication ,X86 ,Vector256 ,AVX
121-
implication ,X86 ,Vector512 ,AVX512F
122-
implication ,X86 ,AVXVNNI ,AVX2
123125
implication ,X86 ,MOVBE ,SSE42
124-
implication ,X86 ,X86Serialize ,X86Base
126+
127+
; x86-64-v4
128+
125129
implication ,X86 ,EVEX ,AVX2
126130
implication ,X86 ,EVEX ,FMA
127131
implication ,X86 ,AVX512F ,EVEX
128132
implication ,X86 ,AVX512F_VL ,AVX512F
129-
implication ,X86 ,AVX512CD ,AVX512F
130-
implication ,X86 ,AVX512CD_VL ,AVX512CD
131-
implication ,X86 ,AVX512CD_VL ,AVX512F_VL
132133
implication ,X86 ,AVX512BW ,AVX512F
133134
implication ,X86 ,AVX512BW_VL ,AVX512BW
134135
implication ,X86 ,AVX512BW_VL ,AVX512F_VL
136+
implication ,X86 ,AVX512CD ,AVX512F
137+
implication ,X86 ,AVX512CD_VL ,AVX512CD
138+
implication ,X86 ,AVX512CD_VL ,AVX512F_VL
135139
implication ,X86 ,AVX512DQ ,AVX512F
136140
implication ,X86 ,AVX512DQ_VL ,AVX512DQ
137141
implication ,X86 ,AVX512DQ_VL ,AVX512F_VL
138142
implication ,X86 ,AVX512VBMI ,AVX512BW
139143
implication ,X86 ,AVX512VBMI_VL ,AVX512VBMI
140144
implication ,X86 ,AVX512VBMI_VL ,AVX512BW_VL
141-
implication ,X86 ,EVEX ,AVX2
142-
implication ,X86 ,EVEX ,FMA
145+
146+
; Unversioned
147+
148+
implication ,X86 ,AES ,SSE2
149+
implication ,X86 ,PCLMULQDQ ,SSE2
150+
implication ,X86 ,AVXVNNI ,AVX2
151+
implication ,X86 ,X86Serialize ,X86Base
152+
143153
implication ,X86 ,AVX10v1 ,EVEX
144154
implication ,X86 ,AVX10v1_V512 ,AVX10v1
145155
implication ,X86 ,AVX10v1_V512 ,AVX512F
@@ -152,20 +162,17 @@ implication ,X86 ,AVX10v1_V512 ,AVX512DQ
152162
implication ,X86 ,AVX10v1_V512 ,AVX512DQ_VL
153163
implication ,X86 ,AVX10v1_V512 ,AVX512VBMI
154164
implication ,X86 ,AVX10v1_V512 ,AVX512VBMI_VL
165+
166+
; These synthetic ISAs need to appear after the core ISAs
167+
168+
implication ,X86 ,Vector128 ,SSE
169+
implication ,X86 ,Vector256 ,AVX
170+
implication ,X86 ,Vector512 ,AVX512F
171+
155172
implication ,X86 ,VectorT128 ,SSE2
156173
implication ,X86 ,VectorT256 ,AVX2
157174
implication ,X86 ,VectorT512 ,AVX512F
158175

159-
; While the AVX-512 ISAs can be individually lit-up, they really
160-
; need F, BW, CD, DQ, and VL to be fully functional without adding
161-
; significant complexity into the JIT. Additionally, unlike AVX/AVX2
162-
; there was never really any hardware that didn't provide all 5 at
163-
; once, with the notable exception being Knight's Landing which
164-
; provided a similar but not quite the same feature.
165-
implication ,X86 ,AVX512F ,AVX512BW_VL
166-
implication ,X86 ,AVX512F ,AVX512CD_VL
167-
implication ,X86 ,AVX512F ,AVX512DQ_VL
168-
169176
; Definition of X64 instruction sets
170177
definearch ,X64 ,64Bit ,X64, X64
171178

‎src/coreclr/vm/codeman.cpp

+77-76
Original file line numberDiff line numberDiff line change
@@ -1276,6 +1276,8 @@ void EEJitManager::SetCpuInfo()
12761276
CPUCompileFlags.Set(InstructionSet_VectorT512);
12771277
}
12781278

1279+
// x86-64-v1
1280+
12791281
if (CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableHWIntrinsic))
12801282
{
12811283
CPUCompileFlags.Set(InstructionSet_X86Base);
@@ -1291,74 +1293,47 @@ void EEJitManager::SetCpuInfo()
12911293
CPUCompileFlags.Set(InstructionSet_SSE2);
12921294
}
12931295

1294-
if (((cpuFeatures & XArchIntrinsicConstants_Aes) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAES))
1295-
{
1296-
CPUCompileFlags.Set(InstructionSet_AES);
1297-
}
1298-
1299-
if (((cpuFeatures & XArchIntrinsicConstants_Avx) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX))
1300-
{
1301-
CPUCompileFlags.Set(InstructionSet_AVX);
1302-
}
1303-
1304-
if (((cpuFeatures & XArchIntrinsicConstants_Avx2) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX2))
1305-
{
1306-
CPUCompileFlags.Set(InstructionSet_AVX2);
1307-
}
1308-
1309-
if (((cpuFeatures & XArchIntrinsicConstants_Avx512f) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX512F))
1310-
{
1311-
CPUCompileFlags.Set(InstructionSet_AVX512F);
1312-
}
1313-
1314-
if (((cpuFeatures & XArchIntrinsicConstants_Avx512f_vl) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX512F_VL))
1315-
{
1316-
CPUCompileFlags.Set(InstructionSet_AVX512F_VL);
1317-
}
1318-
1319-
if (((cpuFeatures & XArchIntrinsicConstants_Avx512bw) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX512BW))
1320-
{
1321-
CPUCompileFlags.Set(InstructionSet_AVX512BW);
1322-
}
1296+
// x86-64-v2
13231297

1324-
if (((cpuFeatures & XArchIntrinsicConstants_Avx512bw_vl) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX512BW_VL))
1298+
if (((cpuFeatures & XArchIntrinsicConstants_Sse3) != 0) &&
1299+
CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableSSE3) &&
1300+
CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableSSE3_4))
13251301
{
1326-
CPUCompileFlags.Set(InstructionSet_AVX512BW_VL);
1302+
// We need to additionally check that EXTERNAL_EnableSSE3_4 is set, as that
1303+
// is a prexisting config flag that controls the SSE3+ ISAs
1304+
CPUCompileFlags.Set(InstructionSet_SSE3);
13271305
}
13281306

1329-
if (((cpuFeatures & XArchIntrinsicConstants_Avx512cd) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX512CD))
1307+
if (((cpuFeatures & XArchIntrinsicConstants_Ssse3) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableSSSE3))
13301308
{
1331-
CPUCompileFlags.Set(InstructionSet_AVX512CD);
1309+
CPUCompileFlags.Set(InstructionSet_SSSE3);
13321310
}
13331311

1334-
if (((cpuFeatures & XArchIntrinsicConstants_Avx512cd_vl) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX512CD_VL))
1312+
if (((cpuFeatures & XArchIntrinsicConstants_Sse41) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableSSE41))
13351313
{
1336-
CPUCompileFlags.Set(InstructionSet_AVX512CD_VL);
1314+
CPUCompileFlags.Set(InstructionSet_SSE41);
13371315
}
13381316

1339-
if (((cpuFeatures & XArchIntrinsicConstants_Avx512dq) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX512DQ))
1317+
if (((cpuFeatures & XArchIntrinsicConstants_Sse42) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableSSE42))
13401318
{
1341-
CPUCompileFlags.Set(InstructionSet_AVX512DQ);
1319+
CPUCompileFlags.Set(InstructionSet_SSE42);
13421320
}
13431321

1344-
if (((cpuFeatures & XArchIntrinsicConstants_Avx512dq_vl) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX512DQ_VL))
1322+
if (((cpuFeatures & XArchIntrinsicConstants_Popcnt) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnablePOPCNT))
13451323
{
1346-
CPUCompileFlags.Set(InstructionSet_AVX512DQ_VL);
1324+
CPUCompileFlags.Set(InstructionSet_POPCNT);
13471325
}
13481326

1349-
if (((cpuFeatures & XArchIntrinsicConstants_Avx512Vbmi) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX512VBMI))
1350-
{
1351-
CPUCompileFlags.Set(InstructionSet_AVX512VBMI);
1352-
}
1327+
// x86-64-v3
13531328

1354-
if (((cpuFeatures & XArchIntrinsicConstants_Avx512Vbmi_vl) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX512VBMI_VL))
1329+
if (((cpuFeatures & XArchIntrinsicConstants_Avx) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX))
13551330
{
1356-
CPUCompileFlags.Set(InstructionSet_AVX512VBMI_VL);
1331+
CPUCompileFlags.Set(InstructionSet_AVX);
13571332
}
13581333

1359-
if (((cpuFeatures & XArchIntrinsicConstants_AvxVnni) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVXVNNI))
1334+
if (((cpuFeatures & XArchIntrinsicConstants_Avx2) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX2))
13601335
{
1361-
CPUCompileFlags.Set(InstructionSet_AVXVNNI);
1336+
CPUCompileFlags.Set(InstructionSet_AVX2);
13621337
}
13631338

13641339
if (((cpuFeatures & XArchIntrinsicConstants_Bmi1) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableBMI1))
@@ -1381,66 +1356,92 @@ void EEJitManager::SetCpuInfo()
13811356
CPUCompileFlags.Set(InstructionSet_LZCNT);
13821357
}
13831358

1384-
if (((cpuFeatures & XArchIntrinsicConstants_Pclmulqdq) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnablePCLMULQDQ))
1385-
{
1386-
CPUCompileFlags.Set(InstructionSet_PCLMULQDQ);
1387-
}
1388-
13891359
if (((cpuFeatures & XArchIntrinsicConstants_Movbe) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableMOVBE))
13901360
{
13911361
CPUCompileFlags.Set(InstructionSet_MOVBE);
13921362
}
13931363

1394-
if (((cpuFeatures & XArchIntrinsicConstants_Popcnt) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnablePOPCNT))
1364+
// x86-64-v4
1365+
1366+
if ((cpuFeatures & XArchIntrinsicConstants_Evex) != 0)
13951367
{
1396-
CPUCompileFlags.Set(InstructionSet_POPCNT);
1368+
CPUCompileFlags.Set(InstructionSet_EVEX);
13971369
}
13981370

1399-
// We need to additionally check that EXTERNAL_EnableSSE3_4 is set, as that
1400-
// is a prexisting config flag that controls the SSE3+ ISAs
1401-
if (((cpuFeatures & XArchIntrinsicConstants_Sse3) != 0) &&
1402-
CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableSSE3) &&
1403-
CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableSSE3_4))
1371+
if (((cpuFeatures & XArchIntrinsicConstants_Avx512f) != 0) &&
1372+
((cpuFeatures & XArchIntrinsicConstants_Avx512f_vl) != 0)
1373+
((cpuFeatures & XArchIntrinsicConstants_Avx512bw) != 0)
1374+
((cpuFeatures & XArchIntrinsicConstants_Avx512bw_vl) != 0)
1375+
((cpuFeatures & XArchIntrinsicConstants_Avx512cd) != 0)
1376+
((cpuFeatures & XArchIntrinsicConstants_Avx512cd_vl) != 0)
1377+
((cpuFeatures & XArchIntrinsicConstants_Avx512dq) != 0)
1378+
((cpuFeatures & XArchIntrinsicConstants_Avx512dq_vl) != 0))
1379+
{
1380+
// While the AVX-512 ISAs can be individually lit-up, they really
1381+
// need F, BW, CD, DQ, and VL to be fully functional without adding
1382+
// significant complexity into the JIT. Additionally, unlike AVX/AVX2
1383+
// there was never really any hardware that didn't provide all 5 at
1384+
// once, with the notable exception being Knight's Landing which
1385+
// provided a similar but not quite the same feature.
1386+
1387+
if (CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX512F) &&
1388+
CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX512F_VL) &&
1389+
CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX512BW) &&
1390+
CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX512BW_VL) &&
1391+
CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX512CD) &&
1392+
CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX512CD_VL) &&
1393+
CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX512DQ) &&
1394+
CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX512DQ_VL))
1395+
{
1396+
CPUCompileFlags.Set(InstructionSet_AVX512F);
1397+
CPUCompileFlags.Set(InstructionSet_AVX512F_VL);
1398+
CPUCompileFlags.Set(InstructionSet_AVX512BW);
1399+
CPUCompileFlags.Set(InstructionSet_AVX512BW_VL);
1400+
CPUCompileFlags.Set(InstructionSet_AVX512CD);
1401+
CPUCompileFlags.Set(InstructionSet_AVX512CD_VL);
1402+
CPUCompileFlags.Set(InstructionSet_AVX512DQ);
1403+
CPUCompileFlags.Set(InstructionSet_AVX512DQ_VL);
1404+
}
1405+
}
1406+
1407+
if (((cpuFeatures & XArchIntrinsicConstants_Avx512Vbmi) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX512VBMI))
14041408
{
1405-
CPUCompileFlags.Set(InstructionSet_SSE3);
1409+
CPUCompileFlags.Set(InstructionSet_AVX512VBMI);
14061410
}
14071411

1408-
if (((cpuFeatures & XArchIntrinsicConstants_Sse41) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableSSE41))
1412+
if (((cpuFeatures & XArchIntrinsicConstants_Avx512Vbmi_vl) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX512VBMI_VL))
14091413
{
1410-
CPUCompileFlags.Set(InstructionSet_SSE41);
1414+
CPUCompileFlags.Set(InstructionSet_AVX512VBMI_VL);
14111415
}
14121416

1413-
if (((cpuFeatures & XArchIntrinsicConstants_Sse42) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableSSE42))
1417+
// Unversioned
1418+
1419+
if (((cpuFeatures & XArchIntrinsicConstants_Aes) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAES))
14141420
{
1415-
CPUCompileFlags.Set(InstructionSet_SSE42);
1421+
CPUCompileFlags.Set(InstructionSet_AES);
14161422
}
14171423

1418-
if (((cpuFeatures & XArchIntrinsicConstants_Ssse3) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableSSSE3))
1424+
if (((cpuFeatures & XArchIntrinsicConstants_Pclmulqdq) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnablePCLMULQDQ))
14191425
{
1420-
CPUCompileFlags.Set(InstructionSet_SSSE3);
1426+
CPUCompileFlags.Set(InstructionSet_PCLMULQDQ);
14211427
}
14221428

1423-
if (((cpuFeatures & XArchIntrinsicConstants_Serialize) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableX86Serialize))
1429+
if (((cpuFeatures & XArchIntrinsicConstants_AvxVnni) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVXVNNI))
14241430
{
1425-
CPUCompileFlags.Set(InstructionSet_X86Serialize);
1431+
CPUCompileFlags.Set(InstructionSet_AVXVNNI);
14261432
}
14271433

1428-
if (((cpuFeatures & XArchIntrinsicConstants_Evex) != 0) && (CPUCompileFlags.IsSet(InstructionSet_AVX512F) || CPUCompileFlags.IsSet(InstructionSet_AVX10v1)))
1434+
if (((cpuFeatures & XArchIntrinsicConstants_Serialize) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableX86Serialize))
14291435
{
1430-
CPUCompileFlags.Set(InstructionSet_EVEX);
1436+
CPUCompileFlags.Set(InstructionSet_X86Serialize);
14311437
}
14321438

1433-
// As Avx10v1_V512 could imply Avx10v1,
1434-
// then the flag check here can be conducted for only once, and let
1435-
// `EnusreValidInstructionSetSupport` to handle the illegal combination.
1436-
// To ensure `EnusreValidInstructionSetSupport` handle the dependency correctly, the implication
1437-
// defined in InstructionSetDesc.txt should be explicit, no transitive implication should be assumed.
14381439
if (((cpuFeatures & XArchIntrinsicConstants_Avx10v1) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX10v1))
14391440
{
14401441
CPUCompileFlags.Set(InstructionSet_AVX10v1);
14411442
}
14421443

1443-
if (((cpuFeatures & XArchIntrinsicConstants_Avx10v1_V512) != 0))
1444+
if ((cpuFeatures & XArchIntrinsicConstants_Avx10v1_V512) != 0)
14441445
{
14451446
CPUCompileFlags.Set(InstructionSet_AVX10v1_V512);
14461447
}

‎src/native/minipal/cpufeatures.c

+34-50
Original file line numberDiff line numberDiff line change
@@ -199,11 +199,11 @@ int minipal_getcpufeatures(void)
199199
}
200200

201201
const int requiredAvxEcxFlags = (1 << 27) // OSXSAVE
202-
| (1 << 28); // AVX
202+
| (1 << 28); // AVX
203203

204204
if ((cpuidInfo[CPUID_ECX] & requiredAvxEcxFlags) == requiredAvxEcxFlags)
205205
{
206-
if (IsAvxEnabled() && (xmmYmmStateSupport() == 1)) // XGETBV == 11
206+
if (IsAvxEnabled() && (xmmYmmStateSupport() == 1)) // XGETBV == 11
207207
{
208208
result |= XArchIntrinsicConstants_Avx;
209209

@@ -220,54 +220,35 @@ int minipal_getcpufeatures(void)
220220
{
221221
result |= XArchIntrinsicConstants_Avx2;
222222

223-
if (IsAvx512Enabled() && (avx512StateSupport() == 1)) // XGETBV XRC0[7:5] == 111
223+
if (IsAvx512Enabled() && (avx512StateSupport() == 1)) // XGETBV XRC0[7:5] == 111
224224
{
225-
if ((cpuidInfo[CPUID_EBX] & (1 << 16)) != 0) // AVX512F
225+
if (((cpuidInfo[CPUID_EBX] & (1 << 16)) != 0) && // AVX512F
226+
((cpuidInfo[CPUID_EBX] & (1 << 30)) != 0) && // AVX512BW
227+
((cpuidInfo[CPUID_EBX] & (1 << 28)) != 0) && // AVX512CD
228+
((cpuidInfo[CPUID_EBX] & (1 << 17)) != 0) && // AVX512DQ
229+
((cpuidInfo[CPUID_EBX] & (1 << 31)) != 0)) // AVX512VL
226230
{
227-
result |= XArchIntrinsicConstants_Avx512f;
228-
result |= XArchIntrinsicConstants_Evex;
229-
230-
bool isAVX512_VLSupported = false;
231-
if ((cpuidInfo[CPUID_EBX] & (1 << 31)) != 0) // AVX512VL
232-
{
233-
result |= XArchIntrinsicConstants_Avx512f_vl;
234-
isAVX512_VLSupported = true;
235-
}
236-
237-
if ((cpuidInfo[CPUID_EBX] & (1 << 30)) != 0) // AVX512BW
238-
{
239-
result |= XArchIntrinsicConstants_Avx512bw;
240-
if (isAVX512_VLSupported) // AVX512BW_VL
241-
{
242-
result |= XArchIntrinsicConstants_Avx512bw_vl;
243-
}
244-
}
245-
246-
if ((cpuidInfo[CPUID_EBX] & (1 << 28)) != 0) // AVX512CD
247-
{
248-
result |= XArchIntrinsicConstants_Avx512cd;
249-
if (isAVX512_VLSupported) // AVX512CD_VL
250-
{
251-
result |= XArchIntrinsicConstants_Avx512cd_vl;
252-
}
253-
}
231+
// While the AVX-512 ISAs can be individually lit-up, they really
232+
// need F, BW, CD, DQ, and VL to be fully functional without adding
233+
// significant complexity into the JIT. Additionally, unlike AVX/AVX2
234+
// there was never really any hardware that didn't provide all 5 at
235+
// once, with the notable exception being Knight's Landing which
236+
// provided a similar but not quite the same feature.
254237

255-
if ((cpuidInfo[CPUID_EBX] & (1 << 17)) != 0) // AVX512DQ
256-
{
257-
result |= XArchIntrinsicConstants_Avx512dq;
258-
if (isAVX512_VLSupported) // AVX512DQ_VL
259-
{
260-
result |= XArchIntrinsicConstants_Avx512dq_vl;
261-
}
262-
}
238+
result |= XArchIntrinsicConstants_Evex;
239+
result |= XArchIntrinsicConstants_Avx512f;
240+
result |= XArchIntrinsicConstants_Avx512f_vl;
241+
result |= XArchIntrinsicConstants_Avx512bw;
242+
result |= XArchIntrinsicConstants_Avx512bw_vl;
243+
result |= XArchIntrinsicConstants_Avx512cd;
244+
result |= XArchIntrinsicConstants_Avx512cd_vl;
245+
result |= XArchIntrinsicConstants_Avx512dq;
246+
result |= XArchIntrinsicConstants_Avx512dq_vl;
263247

264248
if ((cpuidInfo[CPUID_ECX] & (1 << 1)) != 0) // AVX512VBMI
265249
{
266250
result |= XArchIntrinsicConstants_Avx512Vbmi;
267-
if (isAVX512_VLSupported) // AVX512VBMI_VL
268-
{
269-
result |= XArchIntrinsicConstants_Avx512Vbmi_vl;
270-
}
251+
result |= XArchIntrinsicConstants_Avx512Vbmi_vl;
271252
}
272253
}
273254
}
@@ -282,15 +263,18 @@ int minipal_getcpufeatures(void)
282263
if ((cpuidInfo[CPUID_EDX] & (1 << 19)) != 0) // Avx10
283264
{
284265
__cpuidex(cpuidInfo, 0x00000024, 0x00000000);
285-
if((cpuidInfo[CPUID_EBX] & 0xFF) >= 1) // Avx10v1 - CPUID.(EAX=24H, ECX=00H):EBX[7:0] >= 1
266+
uint8_t avx10Version = (uint8_t)(cpuidInfo[CPUID_EBX] & 0xFF);
267+
268+
if((avx10Version >= 1) &&
269+
((cpuidInfo[CPUID_EBX] & (1 << 16)) != 0) && // Avx10/V128
270+
((cpuidInfo[CPUID_EBX] & (1 << 17)) != 0)) // Avx10/V256
286271
{
287-
if ((cpuidInfo[CPUID_EBX] & (1 << 16)) != 0)
288-
{
289-
result |= XArchIntrinsicConstants_Avx10v1;
290-
result |= XArchIntrinsicConstants_Evex;
291-
}
272+
result |= XArchIntrinsicConstants_Evex;
273+
result |= XArchIntrinsicConstants_Avx10v1;
274+
275+
bool isV512Supported = (cpuidInfo[CPUID_EBX] & (1 << 18)) != 0; // Avx10/V512
292276

293-
if ((cpuidInfo[CPUID_EBX] & (1 << 18)) != 0)
277+
if (isV512Supported)
294278
{
295279
result |= XArchIntrinsicConstants_Avx10v1_V512;
296280
}

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