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Arm64/SVE: Implement ConvertToInt32 and ConvertToUInt32 for double (#103436)
* Added ConverToInt32 and ConvertToUInt32 for float inputs. * Added flags to handle only low predicate registers. * Fix whitespace * Remove special codegen flag * Added new test template for operations with different return types. * Add new test template. * Added api for ConvertToInt32 and ConvertToUInt 32 for double. * all merge conflicts fixed.
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6 files changed

+69
-15
lines changed

6 files changed

+69
-15
lines changed

‎src/coreclr/jit/hwintrinsiclistarm64sve.h

+2-2
Original file line numberDiff line numberDiff line change
@@ -32,8 +32,8 @@ HARDWARE_INTRINSIC(Sve, Compute16BitAddresses,
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HARDWARE_INTRINSIC(Sve, Compute32BitAddresses, -1, 2, true, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_adr, INS_invalid, INS_sve_adr, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_SpecialCodeGen)
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HARDWARE_INTRINSIC(Sve, Compute64BitAddresses, -1, 2, true, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_adr, INS_invalid, INS_sve_adr, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_SpecialCodeGen)
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HARDWARE_INTRINSIC(Sve, ConditionalSelect, -1, 3, true, {INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_ExplicitMaskedOperation|HW_Flag_SupportsContainment)
35-
HARDWARE_INTRINSIC(Sve, ConvertToInt32, -1, -1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_fcvtzs, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_BaseTypeFromFirstArg|HW_Flag_EmbeddedMaskedOperation|HW_Flag_LowMaskedOperation)
36-
HARDWARE_INTRINSIC(Sve, ConvertToUInt32, -1, -1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_fcvtzu, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_BaseTypeFromFirstArg|HW_Flag_EmbeddedMaskedOperation|HW_Flag_LowMaskedOperation)
35+
HARDWARE_INTRINSIC(Sve, ConvertToInt32, -1, -1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_fcvtzs, INS_sve_fcvtzs}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_BaseTypeFromFirstArg|HW_Flag_EmbeddedMaskedOperation|HW_Flag_LowMaskedOperation)
36+
HARDWARE_INTRINSIC(Sve, ConvertToUInt32, -1, -1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_fcvtzu, INS_sve_fcvtzu}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_BaseTypeFromFirstArg|HW_Flag_EmbeddedMaskedOperation|HW_Flag_LowMaskedOperation)
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HARDWARE_INTRINSIC(Sve, Count16BitElements, 0, 1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_cnth, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_Scalable|HW_Flag_HasEnumOperand|HW_Flag_SpecialCodeGen|HW_Flag_NoFloatingPointUsed)
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HARDWARE_INTRINSIC(Sve, Count32BitElements, 0, 1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_cntw, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_Scalable|HW_Flag_HasEnumOperand|HW_Flag_SpecialCodeGen|HW_Flag_NoFloatingPointUsed)
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HARDWARE_INTRINSIC(Sve, Count64BitElements, 0, 1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_cntd, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_Scalable|HW_Flag_HasEnumOperand|HW_Flag_SpecialCodeGen|HW_Flag_NoFloatingPointUsed)

‎src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve.PlatformNotSupported.cs

+18
Original file line numberDiff line numberDiff line change
@@ -850,6 +850,15 @@ internal Arm64() { }
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/// ConvertToInt32 : Floating-point convert
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853+
/// <summary>
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/// svint32_t svcvt_s32[_f64]_m(svint32_t inactive, svbool_t pg, svfloat64_t op)
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/// FCVTZS Ztied.S, Pg/M, Zop.D
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/// svint32_t svcvt_s32[_f64]_x(svbool_t pg, svfloat64_t op)
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/// FCVTZS Ztied.S, Pg/M, Ztied.D
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/// svint32_t svcvt_s32[_f64]_z(svbool_t pg, svfloat64_t op)
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/// </summary>
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public static unsafe Vector<int> ConvertToInt32(Vector<double> value) { throw new PlatformNotSupportedException(); }
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/// <summary>
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/// svint32_t svcvt_s32[_f32]_m(svint32_t inactive, svbool_t pg, svfloat32_t op)
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/// FCVTZS Ztied.S, Pg/M, Zop.S
@@ -862,6 +871,15 @@ internal Arm64() { }
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/// ConvertToUInt32 : Floating-point convert
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874+
/// <summary>
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/// svuint32_t svcvt_u32[_f64]_m(svuint32_t inactive, svbool_t pg, svfloat64_t op)
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/// FCVTZU Ztied.S, Pg/M, Zop.D
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/// svuint32_t svcvt_u32[_f64]_x(svbool_t pg, svfloat64_t op)
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/// FCVTZU Ztied.S, Pg/M, Ztied.D
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/// svuint32_t svcvt_u32[_f64]_z(svbool_t pg, svfloat64_t op)
880+
/// </summary>
881+
public static unsafe Vector<uint> ConvertToUInt32(Vector<double> value) { throw new PlatformNotSupportedException(); }
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865883
/// <summary>
866884
/// svuint32_t svcvt_u32[_f32]_m(svuint32_t inactive, svbool_t pg, svfloat32_t op)
867885
/// FCVTZU Ztied.S, Pg/M, Zop.S

‎src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve.cs

+18
Original file line numberDiff line numberDiff line change
@@ -907,6 +907,15 @@ internal Arm64() { }
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/// ConvertToInt32 : Floating-point convert
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910+
/// <summary>
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/// svint32_t svcvt_s32[_f64]_m(svint32_t inactive, svbool_t pg, svfloat64_t op)
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/// FCVTZS Ztied.S, Pg/M, Zop.D
913+
/// svint32_t svcvt_s32[_f64]_x(svbool_t pg, svfloat64_t op)
914+
/// FCVTZS Ztied.S, Pg/M, Ztied.D
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/// svint32_t svcvt_s32[_f64]_z(svbool_t pg, svfloat64_t op)
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/// </summary>
917+
public static unsafe Vector<int> ConvertToInt32(Vector<double> value) => ConvertToInt32(value);
918+
910919
/// <summary>
911920
/// svint32_t svcvt_s32[_f32]_m(svint32_t inactive, svbool_t pg, svfloat32_t op)
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/// FCVTZS Ztied.S, Pg/M, Zop.S
@@ -919,6 +928,15 @@ internal Arm64() { }
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/// ConvertToUInt32 : Floating-point convert
921930

931+
/// <summary>
932+
/// svuint32_t svcvt_u32[_f64]_m(svuint32_t inactive, svbool_t pg, svfloat64_t op)
933+
/// FCVTZU Ztied.S, Pg/M, Zop.D
934+
/// svuint32_t svcvt_u32[_f64]_x(svbool_t pg, svfloat64_t op)
935+
/// FCVTZU Ztied.S, Pg/M, Ztied.D
936+
/// svuint32_t svcvt_u32[_f64]_z(svbool_t pg, svfloat64_t op)
937+
/// </summary>
938+
public static unsafe Vector<uint> ConvertToUInt32(Vector<double> value) => ConvertToUInt32(value);
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922940
/// <summary>
923941
/// svuint32_t svcvt_u32[_f32]_m(svuint32_t inactive, svbool_t pg, svfloat32_t op)
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/// FCVTZU Ztied.S, Pg/M, Zop.S

‎src/libraries/System.Runtime.Intrinsics/ref/System.Runtime.Intrinsics.cs

+2
Original file line numberDiff line numberDiff line change
@@ -4315,7 +4315,9 @@ internal Arm64() { }
43154315
public static System.Numerics.Vector<float> ConditionalSelect(System.Numerics.Vector<float> mask, System.Numerics.Vector<float> left, System.Numerics.Vector<float> right) { throw null; }
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public static System.Numerics.Vector<double> ConditionalSelect(System.Numerics.Vector<double> mask, System.Numerics.Vector<double> left, System.Numerics.Vector<double> right) { throw null; }
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4318+
public static System.Numerics.Vector<int> ConvertToInt32(System.Numerics.Vector<double> value) { throw null; }
43184319
public static System.Numerics.Vector<int> ConvertToInt32(System.Numerics.Vector<float> value) { throw null; }
4320+
public static System.Numerics.Vector<uint> ConvertToUInt32(System.Numerics.Vector<double> value) { throw null; }
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public static System.Numerics.Vector<uint> ConvertToUInt32(System.Numerics.Vector<float> value) { throw null; }
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public static ulong Count16BitElements([ConstantExpected] SveMaskPattern pattern = SveMaskPattern.All) { throw null; }

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