Use AddRegNumInMask() and AddRegNum()

kunalspathak · kunalspathak · commit ed203f3ef164 · 2024-05-29T06:33:23.000-07:00
diff --git a/src/coreclr/jit/lsra.cpp b/src/coreclr/jit/lsra.cpp
@@ -293,7 +293,7 @@ void LinearScan::updateNextFixedRef(RegRecord* regRecord, RefPosition* nextRefPo
     }
     else
     {
-        fixedRegs |= genRegMask(regRecord->regNum);
+        fixedRegs.AddRegNumInMask(regRecord->regNum);
     }
 
     nextFixedRef[regRecord->regNum] = nextLocation;
@@ -4081,7 +4081,7 @@ void LinearScan::spillGCRefs(RefPosition* killRefPosition)
 {
     // For each physical register that can hold a GC type,
     // if it is occupied by an interval of a GC type, spill that interval.
-    regMaskTP candidateRegs = killRefPosition->registerAssignment;
+    SingleTypeRegSet candidateRegs = killRefPosition->registerAssignment;
     INDEBUG(bool killedRegs = false);
     while (candidateRegs != RBM_NONE)
     {
@@ -4576,7 +4576,7 @@ void LinearScan::processBlockStartLocations(BasicBlock* currentBlock)
                 assert(targetReg != REG_STK);
                 assert(interval->assignedReg != nullptr && interval->assignedReg->regNum == targetReg &&
                        interval->assignedReg->assignedInterval == interval);
-                liveRegs |= getRegMask(targetReg, interval->registerType);
+                liveRegs.AddRegNum(targetReg, interval->registerType);
                 continue;
             }
         }
@@ -4606,7 +4606,7 @@ void LinearScan::processBlockStartLocations(BasicBlock* currentBlock)
                 // likely to match other assignments this way.
                 targetReg          = interval->physReg;
                 interval->isActive = true;
-                liveRegs |= getRegMask(targetReg, interval->registerType);
+                liveRegs.AddRegNum(targetReg, interval->registerType);
                 INDEBUG(inactiveRegs |= genRegMask(targetReg));
                 setVarReg(inVarToRegMap, varIndex, targetReg);
             }
@@ -4618,7 +4618,7 @@ void LinearScan::processBlockStartLocations(BasicBlock* currentBlock)
         if (targetReg != REG_STK)
         {
             RegRecord* targetRegRecord = getRegisterRecord(targetReg);
-            liveRegs |= getRegMask(targetReg, interval->registerType);
+            liveRegs.AddRegNum(targetReg, interval->registerType);
             if (!allocationPassComplete)
             {
                 updateNextIntervalRef(targetReg, interval);
@@ -5371,7 +5371,7 @@ void LinearScan::allocateRegistersMinimal()
                 else
                 {
                     INDEBUG(dumpLsraAllocationEvent(LSRA_EVENT_NEEDS_NEW_REG, nullptr, assignedRegister));
-                    regsToFree |= getRegMask(assignedRegister, currentInterval->registerType);
+                    regsToFree.AddRegNum(assignedRegister, currentInterval->registerType);
                     // We want a new register, but we don't want this to be considered a spill.
                     assignedRegister = REG_NA;
                     if (physRegRecord->assignedInterval == currentInterval)
@@ -5657,7 +5657,7 @@ void LinearScan::allocateRegisters()
                 updateNextIntervalRef(reg, interval);
                 updateSpillCost(reg, interval);
                 setRegInUse(reg, interval->registerType);
-                INDEBUG(registersToDump |= getRegMask(reg, interval->registerType));
+                INDEBUG(registersToDump.AddRegNum(reg, interval->registerType));
             }
         }
         else
@@ -6075,7 +6075,7 @@ void LinearScan::allocateRegisters()
                                 updateSpillCost(assignedRegister, currentInterval);
                             }
 
-                            regsToFree |= getRegMask(assignedRegister, currentInterval->registerType);
+                            regsToFree.AddRegNum(assignedRegister, currentInterval->registerType);
                         }
                         INDEBUG(dumpLsraAllocationEvent(LSRA_EVENT_NO_REG_ALLOCATED, nullptr, assignedRegister));
                         currentRefPosition.registerAssignment = RBM_NONE;
@@ -6520,7 +6520,7 @@ void LinearScan::allocateRegisters()
                 else
                 {
                     INDEBUG(dumpLsraAllocationEvent(LSRA_EVENT_NEEDS_NEW_REG, nullptr, assignedRegister));
-                    regsToFree |= getRegMask(assignedRegister, currentInterval->registerType);
+                    regsToFree.AddRegNum(assignedRegister, currentInterval->registerType);
                     // We want a new register, but we don't want this to be considered a spill.
                     assignedRegister = REG_NA;
                     if (physRegRecord->assignedInterval == currentInterval)
@@ -9008,8 +9008,7 @@ void LinearScan::handleOutgoingCriticalEdges(BasicBlock* block)
         regNumber fromReg = getVarReg(outVarToRegMap, liveOutVarIndex);
         if (fromReg != REG_STK)
         {
-            regMaskTP fromRegMask = genRegMask(fromReg, getIntervalForLocalVar(liveOutVarIndex)->registerType);
-            liveOutRegs |= fromRegMask;
+            liveOutRegs.AddRegNumInMask(fromReg ARM_ARG(getIntervalForLocalVar(liveOutVarIndex)->registerType));
         }
     }
 
@@ -9217,7 +9216,7 @@ void LinearScan::handleOutgoingCriticalEdges(BasicBlock* block)
             VarSetOps::AddElemD(compiler, diffResolutionSet, outResolutionSetVarIndex);
             if (fromReg != REG_STK)
             {
-                diffReadRegs |= genRegMask(fromReg, getIntervalForLocalVar(outResolutionSetVarIndex)->registerType);
+                diffReadRegs.AddRegNumInMask(fromReg ARM_ARG(getIntervalForLocalVar(outResolutionSetVarIndex)->registerType));
             }
         }
         else if (sameToReg != fromReg)
@@ -9226,7 +9225,7 @@ void LinearScan::handleOutgoingCriticalEdges(BasicBlock* block)
             setVarReg(sameVarToRegMap, outResolutionSetVarIndex, sameToReg);
             if (sameToReg != REG_STK)
             {
-                sameWriteRegs |= genRegMask(sameToReg, getIntervalForLocalVar(outResolutionSetVarIndex)->registerType);
+                sameWriteRegs.AddRegNumInMask(sameToReg ARM_ARG(getIntervalForLocalVar(outResolutionSetVarIndex)->registerType));
             }
         }
     }
@@ -11088,7 +11087,7 @@ void LinearScan::dumpLsraAllocationEvent(LsraDumpEvent event,
     }
     if ((interval != nullptr) && (reg != REG_NA) && (reg != REG_STK))
     {
-        registersToDump |= getRegMask(reg, interval->registerType);
+        registersToDump.AddRegNum(reg, interval->registerType);
         dumpRegRecordTitleIfNeeded();
     }
 
diff --git a/src/coreclr/jit/lsra.h b/src/coreclr/jit/lsra.h
@@ -1833,8 +1833,7 @@ class LinearScan : public LinearScanInterface
     }
     void makeRegAvailable(regNumber reg, var_types regType)
     {
-        regMaskTP regMask = getRegMask(reg, regType);
-        makeRegsAvailable(regMask);
+        m_AvailableRegs.AddRegNum(reg, regType);
     }
 
     void clearAllNextIntervalRef();
@@ -1858,7 +1857,7 @@ class LinearScan : public LinearScanInterface
     }
     void setConstantReg(regNumber reg, var_types regType)
     {
-        m_RegistersWithConstants |= getRegMask(reg, regType);
+        m_RegistersWithConstants.AddRegNum(reg, regType);
     }
     bool isRegConstant(regNumber reg, var_types regType)
     {
@@ -1910,7 +1909,7 @@ class LinearScan : public LinearScanInterface
     }
     void setRegBusyUntilKill(regNumber reg, var_types regType)
     {
-        regsBusyUntilKill |= getRegMask(reg, regType);
+        regsBusyUntilKill.AddRegNum(reg, regType);
     }
     void clearRegBusyUntilKill(regNumber reg)
     {
diff --git a/src/coreclr/jit/lsrabuild.cpp b/src/coreclr/jit/lsrabuild.cpp
@@ -2543,7 +2543,8 @@ void LinearScan::buildIntervals()
             killed = RBM_EDI | RBM_ECX | RBM_EAX;
 #else
             // Poisoning uses REG_SCRATCH for small vars and memset helper for big vars.
-            killed = genRegMask(REG_SCRATCH) | compiler->compHelperCallKillSet(CORINFO_HELP_NATIVE_MEMSET);
+            killed = compiler->compHelperCallKillSet(CORINFO_HELP_NATIVE_MEMSET);
+            killed.AddRegNumInMask(REG_SCRATCH);
 #endif
             addKillForRegs(killed, currentLoc + 1);
             currentLoc += 2;
@@ -2887,7 +2888,7 @@ void LinearScan::buildInitialParamDef(const LclVarDsc* varDsc, regNumber paramRe
         assert(paramReg < REG_COUNT);
         mask = genSingleTypeRegMask(paramReg);
         assignPhysReg(paramReg, interval);
-        INDEBUG(registersToDump |= getRegMask(paramReg, interval->registerType));
+        INDEBUG(registersToDump.AddRegNum(paramReg, interval->registerType));
     }
     RefPosition* pos = newRefPosition(interval, MinLocation, RefTypeParamDef, nullptr, mask);
     pos->setRegOptional(true);

Original file line number	Diff line number	Diff line change
`@@ -293,7 +293,7 @@ void LinearScan::updateNextFixedRef(RegRecord* regRecord, RefPosition* nextRefPo`
`293`	`293`	`}`
`294`	`294`	`else`
`295`	`295`	`{`
`296`		`- fixedRegs \|= genRegMask(regRecord->regNum);`
	`296`	`+ fixedRegs.AddRegNumInMask(regRecord->regNum);`
`297`	`297`	`}`
`298`	`298`
`299`	`299`	`nextFixedRef[regRecord->regNum] = nextLocation;`
`@@ -4081,7 +4081,7 @@ void LinearScan::spillGCRefs(RefPosition* killRefPosition)`
`4081`	`4081`	`{`
`4082`	`4082`	`// For each physical register that can hold a GC type,`
`4083`	`4083`	`// if it is occupied by an interval of a GC type, spill that interval.`
`4084`		`- regMaskTP candidateRegs = killRefPosition->registerAssignment;`
	`4084`	`+ SingleTypeRegSet candidateRegs = killRefPosition->registerAssignment;`
`4085`	`4085`	`INDEBUG(bool killedRegs = false);`
`4086`	`4086`	`while (candidateRegs != RBM_NONE)`
`4087`	`4087`	`{`
`@@ -4576,7 +4576,7 @@ void LinearScan::processBlockStartLocations(BasicBlock* currentBlock)`
`4576`	`4576`	`assert(targetReg != REG_STK);`
`4577`	`4577`	`assert(interval->assignedReg != nullptr && interval->assignedReg->regNum == targetReg &&`
`4578`	`4578`	`interval->assignedReg->assignedInterval == interval);`
`4579`		`- liveRegs \|= getRegMask(targetReg, interval->registerType);`
	`4579`	`+ liveRegs.AddRegNum(targetReg, interval->registerType);`
`4580`	`4580`	`continue;`
`4581`	`4581`	`}`
`4582`	`4582`	`}`
`@@ -4606,7 +4606,7 @@ void LinearScan::processBlockStartLocations(BasicBlock* currentBlock)`
`4606`	`4606`	`// likely to match other assignments this way.`
`4607`	`4607`	`targetReg = interval->physReg;`
`4608`	`4608`	`interval->isActive = true;`
`4609`		`- liveRegs \|= getRegMask(targetReg, interval->registerType);`
	`4609`	`+ liveRegs.AddRegNum(targetReg, interval->registerType);`
`4610`	`4610`	`INDEBUG(inactiveRegs \|= genRegMask(targetReg));`
`4611`	`4611`	`setVarReg(inVarToRegMap, varIndex, targetReg);`
`4612`	`4612`	`}`
`@@ -4618,7 +4618,7 @@ void LinearScan::processBlockStartLocations(BasicBlock* currentBlock)`
`4618`	`4618`	`if (targetReg != REG_STK)`
`4619`	`4619`	`{`
`4620`	`4620`	`RegRecord* targetRegRecord = getRegisterRecord(targetReg);`
`4621`		`- liveRegs \|= getRegMask(targetReg, interval->registerType);`
	`4621`	`+ liveRegs.AddRegNum(targetReg, interval->registerType);`
`4622`	`4622`	`if (!allocationPassComplete)`
`4623`	`4623`	`{`
`4624`	`4624`	`updateNextIntervalRef(targetReg, interval);`
`@@ -5371,7 +5371,7 @@ void LinearScan::allocateRegistersMinimal()`
`5371`	`5371`	`else`
`5372`	`5372`	`{`
`5373`	`5373`	`INDEBUG(dumpLsraAllocationEvent(LSRA_EVENT_NEEDS_NEW_REG, nullptr, assignedRegister));`
`5374`		`- regsToFree \|= getRegMask(assignedRegister, currentInterval->registerType);`
	`5374`	`+ regsToFree.AddRegNum(assignedRegister, currentInterval->registerType);`
`5375`	`5375`	`// We want a new register, but we don't want this to be considered a spill.`
`5376`	`5376`	`assignedRegister = REG_NA;`
`5377`	`5377`	`if (physRegRecord->assignedInterval == currentInterval)`
`@@ -5657,7 +5657,7 @@ void LinearScan::allocateRegisters()`
`5657`	`5657`	`updateNextIntervalRef(reg, interval);`
`5658`	`5658`	`updateSpillCost(reg, interval);`
`5659`	`5659`	`setRegInUse(reg, interval->registerType);`
`5660`		`- INDEBUG(registersToDump \|= getRegMask(reg, interval->registerType));`
	`5660`	`+ INDEBUG(registersToDump.AddRegNum(reg, interval->registerType));`
`5661`	`5661`	`}`
`5662`	`5662`	`}`
`5663`	`5663`	`else`
`@@ -6075,7 +6075,7 @@ void LinearScan::allocateRegisters()`
`6075`	`6075`	`updateSpillCost(assignedRegister, currentInterval);`
`6076`	`6076`	`}`
`6077`	`6077`
`6078`		`- regsToFree \|= getRegMask(assignedRegister, currentInterval->registerType);`
	`6078`	`+ regsToFree.AddRegNum(assignedRegister, currentInterval->registerType);`
`6079`	`6079`	`}`
`6080`	`6080`	`INDEBUG(dumpLsraAllocationEvent(LSRA_EVENT_NO_REG_ALLOCATED, nullptr, assignedRegister));`
`6081`	`6081`	`currentRefPosition.registerAssignment = RBM_NONE;`
`@@ -6520,7 +6520,7 @@ void LinearScan::allocateRegisters()`
`6520`	`6520`	`else`
`6521`	`6521`	`{`
`6522`	`6522`	`INDEBUG(dumpLsraAllocationEvent(LSRA_EVENT_NEEDS_NEW_REG, nullptr, assignedRegister));`
`6523`		`- regsToFree \|= getRegMask(assignedRegister, currentInterval->registerType);`
	`6523`	`+ regsToFree.AddRegNum(assignedRegister, currentInterval->registerType);`
`6524`	`6524`	`// We want a new register, but we don't want this to be considered a spill.`
`6525`	`6525`	`assignedRegister = REG_NA;`
`6526`	`6526`	`if (physRegRecord->assignedInterval == currentInterval)`
`@@ -9008,8 +9008,7 @@ void LinearScan::handleOutgoingCriticalEdges(BasicBlock* block)`
`9008`	`9008`	`regNumber fromReg = getVarReg(outVarToRegMap, liveOutVarIndex);`
`9009`	`9009`	`if (fromReg != REG_STK)`
`9010`	`9010`	`{`
`9011`		`- regMaskTP fromRegMask = genRegMask(fromReg, getIntervalForLocalVar(liveOutVarIndex)->registerType);`
`9012`		`- liveOutRegs \|= fromRegMask;`
	`9011`	`+ liveOutRegs.AddRegNumInMask(fromReg ARM_ARG(getIntervalForLocalVar(liveOutVarIndex)->registerType));`
`9013`	`9012`	`}`
`9014`	`9013`	`}`
`9015`	`9014`
`@@ -9217,7 +9216,7 @@ void LinearScan::handleOutgoingCriticalEdges(BasicBlock* block)`
`9217`	`9216`	`VarSetOps::AddElemD(compiler, diffResolutionSet, outResolutionSetVarIndex);`
`9218`	`9217`	`if (fromReg != REG_STK)`
`9219`	`9218`	`{`
`9220`		`- diffReadRegs \|= genRegMask(fromReg, getIntervalForLocalVar(outResolutionSetVarIndex)->registerType);`
	`9219`	`+ diffReadRegs.AddRegNumInMask(fromReg ARM_ARG(getIntervalForLocalVar(outResolutionSetVarIndex)->registerType));`
`9221`	`9220`	`}`
`9222`	`9221`	`}`
`9223`	`9222`	`else if (sameToReg != fromReg)`
`@@ -9226,7 +9225,7 @@ void LinearScan::handleOutgoingCriticalEdges(BasicBlock* block)`
`9226`	`9225`	`setVarReg(sameVarToRegMap, outResolutionSetVarIndex, sameToReg);`
`9227`	`9226`	`if (sameToReg != REG_STK)`
`9228`	`9227`	`{`
`9229`		`- sameWriteRegs \|= genRegMask(sameToReg, getIntervalForLocalVar(outResolutionSetVarIndex)->registerType);`
	`9228`	`+ sameWriteRegs.AddRegNumInMask(sameToReg ARM_ARG(getIntervalForLocalVar(outResolutionSetVarIndex)->registerType));`
`9230`	`9229`	`}`
`9231`	`9230`	`}`
`9232`	`9231`	`}`
`@@ -11088,7 +11087,7 @@ void LinearScan::dumpLsraAllocationEvent(LsraDumpEvent event,`
`11088`	`11087`	`}`
`11089`	`11088`	`if ((interval != nullptr) && (reg != REG_NA) && (reg != REG_STK))`
`11090`	`11089`	`{`
`11091`		`- registersToDump \|= getRegMask(reg, interval->registerType);`
	`11090`	`+ registersToDump.AddRegNum(reg, interval->registerType);`
`11092`	`11091`	`dumpRegRecordTitleIfNeeded();`
`11093`	`11092`	`}`
`11094`	`11093`
Original file line number	Diff line number	Diff line change
`@@ -1833,8 +1833,7 @@ class LinearScan : public LinearScanInterface`
`1833`	`1833`	`}`
`1834`	`1834`	`void makeRegAvailable(regNumber reg, var_types regType)`
`1835`	`1835`	`{`
`1836`		`- regMaskTP regMask = getRegMask(reg, regType);`
`1837`		`- makeRegsAvailable(regMask);`
	`1836`	`+ m_AvailableRegs.AddRegNum(reg, regType);`
`1838`	`1837`	`}`
`1839`	`1838`
`1840`	`1839`	`void clearAllNextIntervalRef();`
`@@ -1858,7 +1857,7 @@ class LinearScan : public LinearScanInterface`
`1858`	`1857`	`}`
`1859`	`1858`	`void setConstantReg(regNumber reg, var_types regType)`
`1860`	`1859`	`{`
`1861`		`- m_RegistersWithConstants \|= getRegMask(reg, regType);`
	`1860`	`+ m_RegistersWithConstants.AddRegNum(reg, regType);`
`1862`	`1861`	`}`
`1863`	`1862`	`bool isRegConstant(regNumber reg, var_types regType)`
`1864`	`1863`	`{`
`@@ -1910,7 +1909,7 @@ class LinearScan : public LinearScanInterface`
`1910`	`1909`	`}`
`1911`	`1910`	`void setRegBusyUntilKill(regNumber reg, var_types regType)`
`1912`	`1911`	`{`
`1913`		`- regsBusyUntilKill \|= getRegMask(reg, regType);`
	`1912`	`+ regsBusyUntilKill.AddRegNum(reg, regType);`
`1914`	`1913`	`}`
`1915`	`1914`	`void clearRegBusyUntilKill(regNumber reg)`
`1916`	`1915`	`{`