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Arm64/Sve: Ld/St info should be added for SVE instructions #105512
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area-CodeGen-coreclr
CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
arm-sve
Work related to arm64 SVE/SVE2 support
in-pr
There is an active PR which will close this issue when it is merged
Priority:3
Work that is nice to have
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@a74nh @SwapnilGaikwad @dotnet/arm64-contrib |
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Tagging subscribers to this area: @JulieLeeMSFT, @jakobbotsch |
priority:3 for RC1 snap : I don't think this breaks anything, so is ok if it gets missed. |
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Labels
area-CodeGen-coreclr
CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
arm-sve
Work related to arm64 SVE/SVE2 support
in-pr
There is an active PR which will close this issue when it is merged
Priority:3
Work that is nice to have
Currently
LD
,ST
and other information is not tagged with sve instructions and they should be tagged appropriately, so methods likeemitInsIsStore()
, etc. should work. This was intentionally not done at the beginning and we wanted to do this when we complete the API implementation of all of them. See #105478The text was updated successfully, but these errors were encountered: