ARM64 - Investigate why a mov is inserted

[TIHan]

This PR had a few diffs that looked like this:

R2RTest.CompileSerpCommand+<FilterAssembliesNoSimpleNameDuplicates>d__32:MoveNext():bool:this

-            cmp     w0, #0
+            tbz     w0, #31, G_M20047_IG08
+						;; size=92 bbWeight=2 PerfScore 60.00
+G_M20047_IG06:        ; bbWeight=0.50, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref
             mov     x0, x19
             ; gcrRegs +[x0]
-            bge     G_M20047_IG08
-						;; size=100 bbWeight=2 PerfScore 62.00
-G_M20047_IG06:        ; bbWeight=0.50, gcrefRegs=300001 {x0 x20 x21}, byrefRegs=0000 {}, byref
-            ; gcrRegs -[x19]

It is curious that mov x0, x19 was inserted between the cmp and bge before. But now that we transform those two instructions into a single tbz, the mov is inserted after a branching operation instead of before - which may cause a perf regression.

Might be worthwhile to investigate why the mov was inserted in the first place. There were not many of these cases as a result of the PR, so it's probably a non-issue in general.

[ghost]

Tagging subscribers to this area: @JulieLeeMSFT, @jakobbotsch, @kunalspathak
See info in area-owners.md if you want to be subscribed.

Issue Details

---

This PR had a few diffs that looked like this:

R2RTest.CompileSerpCommand+<FilterAssembliesNoSimpleNameDuplicates>d__32:MoveNext():bool:this

-            cmp     w0, #0
+            tbz     w0, #31, G_M20047_IG08
+						;; size=92 bbWeight=2 PerfScore 60.00
+G_M20047_IG06:        ; bbWeight=0.50, gcrefRegs=380000 {x19 x20 x21}, byrefRegs=0000 {}, byref
             mov     x0, x19
             ; gcrRegs +[x0]
-            bge     G_M20047_IG08
-						;; size=100 bbWeight=2 PerfScore 62.00
-G_M20047_IG06:        ; bbWeight=0.50, gcrefRegs=300001 {x0 x20 x21}, byrefRegs=0000 {}, byref
-            ; gcrRegs -[x19]

It is curious that mov x0, x19 was inserted between the cmp and bge before. But now that we transform those two instructions into a single tbz, the mov is inserted after a branching operation instead of before - which may cause a perf regression.

Might be worthwhile to investigate why the mov was inserted in the first place. There are not many of these cases so it's probably a non-issue in general.

Author:	TIHan
Assignees:	-
Labels:	arch-arm64, tenet-performance, area-CodeGen-coreclr
Milestone:	-

[kunalspathak]

Did you check the jitdump?

[jakobbotsch]

It looks like a resolution move, that should be the only way we can get a mov in between a flags def and use. It was moved to the beginning of the next block because it interferes with w0 that is used by the JCMP node.

[TIHan]

Did you check the jitdump?

I didn't get a jitdump of this - I guess that's part of the investigation :)

It looks like a resolution move, that should be the only way we can get a mov in between a flags def and use. It was moved to the beginning of the next block because it interferes with w0 that is used by the JCMP node.

It does look that way.

[kunalspathak]

It does look that way.

Should this be closed or are you planning to investigate this more?

[TIHan]

Should this be closed or are you planning to investigate this more

I could investigate more but it's not a priority.