Skip to content

Latest commit

 

History

History
34 lines (28 loc) · 4.65 KB

schedule.md

File metadata and controls

34 lines (28 loc) · 4.65 KB

Stars Badge Forks Badge Pull Requests Badge Issues Badge GitHub contributors Visitors

Weekly Schedule

Week Topic
1 Chapter 1: Fundamentals of Quantitative Design and Analysis[Slide]
Classes of Computers, Defining Computer Architecture, Trends in Technology, Trends in Power and Energy in Integrated Circuits, Trends in Cost, Dependability
2 Benchmark
Desktop Benchmarks, Server Benchmarks, Putting It All Together: Performance, Price and Power
3 Chapter 2: Memory Hierarchy Design
Basics of Memory Hierarchy, Memory Technology and Optimizations, Reducing Power Consumption in SDRAMs
4 Reducing Power Consumption in SDRAMs
5 Chapter 3: Instruction-Level Parallelism and Its Exploitation
Data Dependences, Name Dependences, Data Hazards, Branch-Target Buffers, Integrated Instruction Fetch Units, Speculation Support: Register Renaming Versus Reorder Buffers, The Challenge of More Issues Per Clock
6 Instruction-Level Parallelism and Its Exploitation
Speculating Through Multiple Branches, Speculation and The Challenge of Energy Efficiency, Performance of A53 Pipeline, The Intel Core i7, Performance of i7
7 Chapter 4: Data-Level Parallelism in Vector, SIMD, and GPU Architecture
Vector Architecture, SIMD Instruction Set Extensions for Multimedia, Graphics Processing Units, NVIDIA GPU Computational Structures, NVIDIA GPU Instruction Set Architecture, NVIDIA GPU Memory Structure
8 Mid-Semester Break
9 Chapter 5: Thread-Level Parallelism
Multiprocessor Architecture, Centralized Shared Memory Architecture, Performance of Symmetric Shared-Memory Multiprocessors
10 Thread-Level Parallelism - Multi-core Processor
Multicore-Based Processor on Multiprogrammed Workload
11 Chapter 6: Warehouse-Scale Computers to Exploit Request-Level and Data-Level Parallelism
Warehouse-Scale Computer Programming Models and Workload, Warehouse-Scale Computer Architecture, Warehouse-Scale Computer Memory Hierarchy, Warehouse-Scale Computer Efficiency and Cost, Cloud Computing, Amazon Web Services
12 Warehouse-Scale Computers Putting It All Together
Google Warehouse-Scale Computer
13 Chapter 7: Domain-Specific Architecture
Google Tensor Processing Unit, An Inference Data Center Accelerator
14 Microsoft Catapult and Intel Crest
Microsoft Catapult, A Flexible Data Center Accelerator, Intel Crest, A Data Center Accelerator for Training
15 Pixel Visual Core
Pixel Visual Core, A Personal Mobile Device Image Processing Unit, Pixel Visual Core Software, Pixel Visual Core Architecture Philosophy

Contribution 🛠️

Please create an Issue for any improvements, suggestions or errors in the content.

Visitors