add interlock input, PG output

[filipswit]

• add interlock input, PG output

Originally posted by @gkasprow in #1

Do you mean to tie PGOOD from DCDC to ESP32, or something different?

[gkasprow]

interlock input means MCX connector routed to ESP32; moreover logic HIGH (default, 1k pullup) disables the HV DC/DC converter (AND function with HV_EN)
PG output (MCX, LVTTL) means all powers including HV are enabled

[gkasprow]

We need logic high because some users don't need that input and simply plug short to the interlock connector. Moreover,moreover it's industrial standard