Merge fdd1dd4 into bc97ac1

asyn/Makefile

@@ -12,8 +12,9 @@ include $(TOP)/configure/CONFIG
 
 ASYN = $(TOP)/asyn
 #USR_CFLAGS += -DDEBUG
-USR_CFLAGS += -DUSE_TYPED_RSET -DUSE_TYPED_DSET -DUSE_TYPED_DRVET
+USR_CFLAGS += -DUSE_TYPED_RSET -DUSE_TYPED_DSET -DUSE_TYPED_DRVET 
 USR_CPPFLAGS += -DUSE_TYPED_RSET -DUSE_TYPED_DSET -DUSE_TYPED_DRVET
+USR_CXXFLAGS += -DUSE_TYPED_RSET -DUSE_TYPED_DSET -DUSE_TYPED_DRVET --std=c++11 
 
 USR_INCLUDES_cygwin32 += -I/usr/include/tirpc
 
@@ -149,18 +150,18 @@ ifneq ($(EPICS_LIBCOM_ONLY),YES)
     INSTALL_DBDS += $(INSTALL_DBD)/devEpics.dbd
   endif
   SRC_DIRS += $(ASYN)/devEpics
-  devEpics_DBD += devAsynOctet.dbd
-  devEpics_DBD += devAsynInt32.dbd
-  devEpics_DBD += devAsynInt8Array.dbd
-  devEpics_DBD += devAsynInt16Array.dbd
-  devEpics_DBD += devAsynInt32Array.dbd
-  devEpics_DBD += devAsynInt32TimeSeries.dbd
-  devEpics_DBD += devAsynUInt32Digital.dbd
-  devEpics_DBD += devAsynFloat64.dbd
-  devEpics_DBD += devAsynFloat32Array.dbd
-  devEpics_DBD += devAsynFloat64Array.dbd
-  devEpics_DBD += devAsynFloat64TimeSeries.dbd
-  devEpics_DBD += devAsynRecord.dbd
+  devEpics_DBD += $(INSTALL_DBD)/devAsynOctet.dbd
+  devEpics_DBD += $(INSTALL_DBD)/devAsynInt32.dbd
+  devEpics_DBD += $(INSTALL_DBD)/devAsynInt8Array.dbd
+  devEpics_DBD += $(INSTALL_DBD)/devAsynInt16Array.dbd
+  devEpics_DBD += $(INSTALL_DBD)/devAsynInt32Array.dbd
+  devEpics_DBD += $(INSTALL_DBD)/devAsynInt32TimeSeries.dbd
+  devEpics_DBD += $(INSTALL_DBD)/devAsynUInt32Digital.dbd
+  devEpics_DBD += $(INSTALL_DBD)/devAsynFloat64.dbd
+  devEpics_DBD += $(INSTALL_DBD)/devAsynFloat32Array.dbd
+  devEpics_DBD += $(INSTALL_DBD)/devAsynFloat64Array.dbd
+  devEpics_DBD += $(INSTALL_DBD)/devAsynFloat64TimeSeries.dbd
+  devEpics_DBD += $(INSTALL_DBD)/devAsynRecord.dbd
   DB  += asynInt32TimeSeries.db
   DB  += asynFloat64TimeSeries.db
   INC += asynEpicsUtils.h
@@ -190,7 +191,7 @@ ifneq ($(EPICS_LIBCOM_ONLY),YES)
   # 3.15 and above support lsi, lso and printf records
   ifdef BASE_3_15
     USR_CFLAGS += -DHAVE_LSREC
-    devEpics_DBD += devAsynOctetLs.dbd
+    devEpics_DBD += $(INSTALL_DBD)/devAsynOctetLs.dbd
   endif
 
   # do we have EPICS calc module (scalcout etc.)
@@ -204,20 +205,20 @@ ifneq ($(EPICS_LIBCOM_ONLY),YES)
   ifdef HAVE_DEVINT64
     USR_CFLAGS += -DHAVE_DEVINT64
     USR_CXXFLAGS += -DHAVE_DEVINT64
-    devEpics_DBD += devAsynInt64.dbd
-    devEpics_DBD += devAsynInt64Array.dbd
-    devEpics_DBD += devAsynInt64TimeSeries.dbd
+    devEpics_DBD += $(INSTALL_DBD)/devAsynInt64.dbd
+    devEpics_DBD += $(INSTALL_DBD)/devAsynInt64Array.dbd
+    devEpics_DBD += $(INSTALL_DBD)/devAsynInt64TimeSeries.dbd
     asyn_SRCS += devAsynInt64Array.c
     asyn_SRCS += devAsynInt64TimeSeries.c
   endif
-  devEpics_DBD += devAsynInt64Misc.dbd
+  devEpics_DBD += $(INSTALL_DBD)/devAsynInt64Misc.dbd
   asyn_SRCS += devAsynInt64.c
 
   DBD += $(devEpics_DBD)
 
   SRC_DIRS += $(ASYN)/asynRecord
   DBDINC += asynRecord
-  DBD += devAsynRecord.dbd
+  DBD += $(INSTALL_DBD)/devAsynRecord.dbd
   asyn_SRCS += asynRecord.c
   asyn_SRCS += drvAsyn.c
   DB += asynRecord.db
@@ -261,6 +262,18 @@ ifeq ($(DRV_USBTMC),YES)
   DBD += drvAsynUSBTMC.dbd
 endif
 
+
+ifeq ($(DRV_HISLIP),YES)
+  USR_CXXFLAGS += -fpermissive
+  SRC_DIRS += $(ASYN)/drvAsynHiSLIP
+  SRC_DIRS += $(ASYN)/drvAsynHiSLIP/cPyHiSLIP
+  asyn_SRCS += drvAsynHiSLIP.cpp
+  asyn_SRCS += HiSLIPMessage.cpp
+  DBD += drvAsynHiSLIP.dbd
+  INC += drvAsynHiSLIP.h
+  INC += HiSLIPMessage.h
+endif
+
 ifeq ($(DRV_FTDI),YES)
   SRC_DIRS += $(ASYN)/drvAsynFTDI
   asyn_SRCS += ftdiDriver.cpp drvAsynFTDIPort.cpp

asyn/devGpib/devGpib.dbd

@@ -1 +1 @@
-device(ai,GPIB_IO,devGpib,"GPIB init/report")
+device(ai, GPIB_IO, devGpib,"GPIB init/report")

asyn/drvAsynHiSLIP/Makefile

@@ -0,0 +1,12 @@
+#!make
+
+.phony: markdown
+.SUFFIXES : .rst .md .txt
+
+.rst.md:
+	/usr/local/bin/pandoc -f rst  -t markdown -o $@  $<
+
+.rst.txt:
+	/usr/local/bin/pandoc -f rst  -t plain -o $@  $<
+
+markdown: README.md README.txt

asyn/drvAsynHiSLIP/README.md

@@ -0,0 +1,90 @@
+EPICS ASYN support for HiSLIP device
+====================================
+
+What is this?
+-------------
+
+This module provides EPICS asyn Octet driver for HiSLIP protocol.
+
+It should work with Stream Device library as sameway as USBTMC and
+VXI11. SRQ is supported also throgh asyn octet driver.
+
+HiSLIP protocol is implemented in cPyHiSLIP/HiSLIPMessage.{cpp,h} files.
+These files does not have direct dependency on EPICS, and can be used
+with any other programs. As an example, cPyHiSLIP/cPyHiSLIP.{pxd,pyx}
+and setup.py are provided to build python modules for HiSLIP device.
+
+This moduled is based on the specification descibed in:
+
+> IVI-6.1: IVI High-Speed LAN Instument Protocol (Rev. 1.1, Feb.24,
+> 2011)[^1]
+
+How to use
+----------
+
+### For EPICS
+
+It is assumed that this module will be used togather with the Stream
+Deivce. You may need to adjust configure/RELEASE adn
+configure/CONFIG\_SITE files for your environment. In some Linux
+systems, you need to turn on TIRPC switch to true in
+configure/CONFIG\_SITE.
+
+To add this drvAsynHiSLIP support into StreamApp. After building a
+libasyn library with drvAsynHiSLIP, you must add the following line to
+the Makefile in the StreamApp directory:
+
+> streamApp\_DBD += drvAsynHiSLIP.dbd
+
+In the iocsh start up command, you neeed to configure asyn port for
+HiSLIP device. The \"HiSLIPConfigure\" command, like \"vxi11Configure\"
+for VXI-11 devices is provided.:
+
+> \# HiSLIPConfigure \"port name\", \"host address\",
+> max\_message\_size, \"priority\" HiSLIPConfigure
+> \"L0\",\"172.28.68.228\", 1048560, 0 \# Keysight DSOX1204A
+
+A port name can be any ID string if you just uses Stream driver.
+However, if you may want to use SRQ with this suppor, you better to
+stick with devGPIB/asyn port name convention, i.e. \"L\<n\>\".
+
+### As Python module
+
+At first, you need to build and install Python module based on this
+library. To do so, go to the cPyHiSLIP directory under
+asyn/drvAsynHiSLIP directory, then issue:
+
+> python3 -m pip build clean install
+
+You must have pip module and Cython tool installed. You might need to
+give appropriate priviledge to install the module in the proper
+location.
+
+Build Issues
+------------
+
+> HiSLIP portocol is implemented in HiSPLIPMessage.{cpp,h}. cPyHiSLIP
+> provides python module to access HiSLIP devices. It uses cython to
+> wrap c/c++ librarlies. It can be used without any componets from
+> EPICS. drvAsynHiSLIP provide asyOctet interface to access device.
+> SRQ(IO Intr) is implemented also as asynOcted driver. So, only SI
+> record can be used with SRQ.
+
+Acknowledgements
+----------------
+
+This is based on USB TMC support by Eric Norum \<<wenorum@lbl.gov>\>.
+And also PyHiSLIP modules by Levshinovskiy
+Mikhail(<https://github.com/llemish/PyHiSLIP>) is used as a reference
+for the implementation.
+
+LXI Ports, Protocols, and Services
+
+<https://www.lxistandard.org/About/LXI-Protocols.aspx>
+
+LXI\_HiSLIP\_Extended\_Function\_Test\_Procedures\_v1\_01.pdf
+
+[^1]: The latest version IVI-6.1 Rev.2.0 was publised in Feb.23, 2020.
+    New features, \"Encrypted connections\" and \"Client and server
+    authentication\" are not supported by this version of drAsynHiSLIP
+    library.

asyn/drvAsynHiSLIP/README.rst

@@ -0,0 +1,90 @@
+===============================================================================
+EPICS ASYN support for HiSLIP device
+===============================================================================
+
+What is this?
+==================
+This module provides EPICS asyn Octet driver for HiSLIP protocol.
+
+It should work with Stream Device library as sameway as USBTMC and VXI11.
+SRQ is supported also throgh asyn octet driver.
+
+
+HiSLIP protocol is implemented in cPyHiSLIP/HiSLIPMessage.{cpp,h} files.
+These files does not have direct dependency on EPICS, and can be used with any other
+programs. As an example, cPyHiSLIP/cPyHiSLIP.{pxd,pyx} and setup.py are provided to
+build python modules for HiSLIP device. 
+
+This moduled is based on the specification descibed in:
+
+  IVI-6.1: IVI High-Speed LAN Instument Protocol (Rev. 1.1, Feb.24, 2011)[#]_
+
+
+.. [#] The latest version  IVI-6.1 Rev.2.0 was publised in Feb.23, 2020. New features, "Encrypted connections" and "Client and server authentication" are not supported by this version of drAsynHiSLIP library.
+
+
+How to use
+=============
+
+For EPICS
+--------------
+
+
+
+It is assumed that this module will be used togather with the Stream Deivce.
+You may need to adjust  configure/RELEASE adn configure/CONFIG_SITE files
+for your environment. In some Linux systems, you need to turn on TIRPC switch to true
+in configure/CONFIG_SITE.
+
+To add this drvAsynHiSLIP support into StreamApp. After building a libasyn library
+with drvAsynHiSLIP, you must add the following
+line to the Makefile in the StreamApp directory:
+
+  streamApp_DBD += drvAsynHiSLIP.dbd
+
+In the iocsh start up command, you neeed to configure asyn port
+for HiSLIP device. The "HiSLIPConfigure" command, like "vxi11Configure" for
+VXI-11 devices is provided.:
+
+  # HiSLIPConfigure "port name", "host address", max_message_size, "priority"
+  HiSLIPConfigure "L0","172.28.68.228", 1048560, 0 # Keysight DSOX1204A
+
+A port name can be any ID string if you just uses Stream driver.
+However, if you may want to use SRQ with this suppor, you better to
+stick with devGPIB/asyn port name convention, i.e. "L<n>".
+
+
+As Python module
+----------------------
+At first, you need to build and install Python module based on this library.
+To do so, go to the cPyHiSLIP directory under asyn/drvAsynHiSLIP directory, then
+issue:
+
+  python3 -m pip build clean install
+
+You must have pip module and Cython tool installed. You might need to give
+appropriate priviledge to install the module in the proper location.
+
+
+
+
+Build Issues
+============
+  HiSLIP portocol is implemented in HiSPLIPMessage.{cpp,h}.
+  cPyHiSLIP provides python module to access HiSLIP devices. It uses cython to wrap c/c++ librarlies.
+  It can be used without any componets from EPICS.
+  drvAsynHiSLIP provide asyOctet interface to access device. SRQ(IO Intr) is implemented also as asynOcted driver. So, only SI record can be used with SRQ.
+
+Acknowledgements
+================
+This is based on USB TMC support by Eric Norum <wenorum@lbl.gov>.
+And also PyHiSLIP modules by Levshinovskiy Mikhail(https://github.com/llemish/PyHiSLIP) is used
+as a reference for the implementation.
+
+
+LXI Ports, Protocols, and Services
+
+https://www.lxistandard.org/About/LXI-Protocols.aspx
+
+
+LXI_HiSLIP_Extended_Function_Test_Procedures_v1_01.pdf

asyn/drvAsynHiSLIP/README.txt

@@ -0,0 +1,83 @@
+EPICS ASYN support for HiSLIP device
+
+What is this?
+
+This module provides EPICS asyn Octet driver for HiSLIP protocol.
+
+It should work with Stream Device library as sameway as USBTMC and
+VXI11. SRQ is supported also throgh asyn octet driver.
+
+HiSLIP protocol is implemented in cPyHiSLIP/HiSLIPMessage.{cpp,h} files.
+These files does not have direct dependency on EPICS, and can be used
+with any other programs. As an example, cPyHiSLIP/cPyHiSLIP.{pxd,pyx}
+and setup.py are provided to build python modules for HiSLIP device.
+
+This moduled is based on the specification descibed in:
+
+  IVI-6.1: IVI High-Speed LAN Instument Protocol (Rev. 1.1, Feb.24,
+  2011)[1]
+
+How to use
+
+For EPICS
+
+It is assumed that this module will be used togather with the Stream
+Deivce. You may need to adjust configure/RELEASE adn
+configure/CONFIG_SITE files for your environment. In some Linux systems,
+you need to turn on TIRPC switch to true in configure/CONFIG_SITE.
+
+To add this drvAsynHiSLIP support into StreamApp. After building a
+libasyn library with drvAsynHiSLIP, you must add the following line to
+the Makefile in the StreamApp directory:
+
+  streamApp_DBD += drvAsynHiSLIP.dbd
+
+In the iocsh start up command, you neeed to configure asyn port for
+HiSLIP device. The "HiSLIPConfigure" command, like "vxi11Configure" for
+VXI-11 devices is provided.:
+
+  # HiSLIPConfigure "port name", "host address", max_message_size,
+  "priority" HiSLIPConfigure "L0","172.28.68.228", 1048560, 0 # Keysight
+  DSOX1204A
+
+A port name can be any ID string if you just uses Stream driver.
+However, if you may want to use SRQ with this suppor, you better to
+stick with devGPIB/asyn port name convention, i.e. "L<n>".
+
+As Python module
+
+At first, you need to build and install Python module based on this
+library. To do so, go to the cPyHiSLIP directory under
+asyn/drvAsynHiSLIP directory, then issue:
+
+  python3 -m pip build clean install
+
+You must have pip module and Cython tool installed. You might need to
+give appropriate priviledge to install the module in the proper
+location.
+
+Build Issues
+
+  HiSLIP portocol is implemented in HiSPLIPMessage.{cpp,h}. cPyHiSLIP
+  provides python module to access HiSLIP devices. It uses cython to
+  wrap c/c++ librarlies. It can be used without any componets from
+  EPICS. drvAsynHiSLIP provide asyOctet interface to access device.
+  SRQ(IO Intr) is implemented also as asynOcted driver. So, only SI
+  record can be used with SRQ.
+
+Acknowledgements
+
+This is based on USB TMC support by Eric Norum <wenorum@lbl.gov>. And
+also PyHiSLIP modules by Levshinovskiy
+Mikhail(https://github.com/llemish/PyHiSLIP) is used as a reference for
+the implementation.
+
+LXI Ports, Protocols, and Services
+
+https://www.lxistandard.org/About/LXI-Protocols.aspx
+
+LXI_HiSLIP_Extended_Function_Test_Procedures_v1_01.pdf
+
+[1] The latest version IVI-6.1 Rev.2.0 was publised in Feb.23, 2020. New
+features, "Encrypted connections" and "Client and server authentication"
+are not supported by this version of drAsynHiSLIP library.

asyn/drvAsynHiSLIP/cPyHiSLIP/.gitignore

@@ -0,0 +1,21 @@
+/build/
+/dist/
+/cfg/
+/bin/
+/lib/
+/db/
+/dbd/
+/html/
+/include/
+/templates/
+/configure/*.local
+*_2.*
+*_3.*
+*~
+O.*
+*.swp
+*_BAK.adl
+/QtC-*
+cdCommands
+envPaths
+dllPath.bat