Skip to content

Commit dc08418

Browse files
igrrigrr
committed
Provide init data for register_chipv6_phy
1 parent 6f05da4 commit dc08418

File tree

3 files changed

+251
-15
lines changed

3 files changed

+251
-15
lines changed

‎cores/esp8266/core_esp8266_main.cpp

+1-14
Original file line numberDiff line numberDiff line change
@@ -114,26 +114,13 @@ static void do_global_ctors(void) {
114114
}
115115

116116
void init_done() {
117+
system_set_os_print(1);
117118
do_global_ctors();
118119
esp_schedule();
119120
}
120121

121-
extern "C" int __get_rf_mode() __attribute__((weak));
122-
extern "C" int __get_rf_mode()
123-
{
124-
return 0; // default mode
125-
}
126-
127-
extern "C" {
128-
void user_rf_pre_init() {
129-
system_phy_set_rfoption(__get_rf_mode());
130-
}
131-
}
132-
133122
extern "C" {
134123
void user_init(void) {
135-
uart_div_modify(0, UART_CLK_FREQ / (74480));
136-
137124
system_rtc_mem_read(0, &resetInfo, sizeof(struct rst_info));
138125
struct rst_info info = { 0 };
139126
system_rtc_mem_write(0, &info, sizeof(struct rst_info));

‎cores/esp8266/core_esp8266_phy.c

+248
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,248 @@
1+
/*
2+
phy.c - ESP8266 PHY initialization data
3+
4+
Copyright (c) 2015 Ivan Grokhotkov. All rights reserved.
5+
This file is part of the esp8266 core for Arduino environment.
6+
7+
This library is free software; you can redistribute it and/or
8+
modify it under the terms of the GNU Lesser General Public
9+
License as published by the Free Software Foundation; either
10+
version 2.1 of the License, or (at your option) any later version.
11+
12+
This library is distributed in the hope that it will be useful,
13+
but WITHOUT ANY WARRANTY; without even the implied warranty of
14+
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15+
Lesser General Public License for more details.
16+
17+
You should have received a copy of the GNU Lesser General Public
18+
License along with this library; if not, write to the Free Software
19+
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20+
*/
21+
22+
23+
#include <stdint.h>
24+
#include <stddef.h>
25+
#include <stdbool.h>
26+
27+
static uint8_t phy_init_data[128] =
28+
{
29+
[0] = 5, // Reserved, do not change
30+
[1] = 0, // Reserved, do not change
31+
[2] = 4, // Reserved, do not change
32+
[3] = 2, // Reserved, do not change
33+
[4] = 5, // Reserved, do not change
34+
[5] = 5, // Reserved, do not change
35+
[6] = 5, // Reserved, do not change
36+
[7] = 2, // Reserved, do not change
37+
[8] = 5, // Reserved, do not change
38+
[9] = 0, // Reserved, do not change
39+
[10] = 4, // Reserved, do not change
40+
[11] = 5, // Reserved, do not change
41+
[12] = 5, // Reserved, do not change
42+
[13] = 4, // Reserved, do not change
43+
[14] = 5, // Reserved, do not change
44+
[15] = 5, // Reserved, do not change
45+
[16] = 4, // Reserved, do not change
46+
[17] = -2, // Reserved, do not change
47+
[18] = -3, // Reserved, do not change
48+
[19] = -1, // Reserved, do not change
49+
[20] = -16, // Reserved, do not change
50+
[21] = -16, // Reserved, do not change
51+
[22] = -16, // Reserved, do not change
52+
[23] = -32, // Reserved, do not change
53+
[24] = -32, // Reserved, do not change
54+
[25] = -32, // Reserved, do not change
55+
56+
[26] = 225, // spur_freq_cfg, spur_freq=spur_freq_cfg/spur_freq_cfg_div
57+
[27] = 10, // spur_freq_cfg_div
58+
// each bit for 1 channel, 1 to select the spur_freq if in band, else 40
59+
[28] = 0, // spur_freq_en_h
60+
[29] = 0, // spur_freq_en_l
61+
62+
[30] = 0xf8, // Reserved, do not change
63+
[31] = 0, // Reserved, do not change
64+
[32] = 0xf8, // Reserved, do not change
65+
[33] = 0xf8, // Reserved, do not change
66+
67+
[34] = 82, // target_power_qdb_0, 82 means target power is 82/4=20.5dbm
68+
[35] = 78, // target_power_qdb_1, 78 means target power is 78/4=19.5dbm
69+
[36] = 74, // target_power_qdb_2, 74 means target power is 74/4=18.5dbm
70+
[37] = 68, // target_power_qdb_3, 68 means target power is 68/4=17dbm
71+
[38] = 64, // target_power_qdb_4, 64 means target power is 64/4=16dbm
72+
[39] = 56, // target_power_qdb_5, 56 means target power is 56/4=14dbm
73+
74+
[40] = 0, // target_power_index_mcs0
75+
[41] = 0, // target_power_index_mcs1
76+
[42] = 1, // target_power_index_mcs2
77+
[43] = 1, // target_power_index_mcs3
78+
[44] = 2, // target_power_index_mcs4
79+
[45] = 3, // target_power_index_mcs5
80+
[46] = 4, // target_power_index_mcs6
81+
[47] = 5, // target_power_index_mcs7
82+
83+
// crystal_26m_en
84+
// 0: 40MHz
85+
// 1: 26MHz
86+
// 2: 24MHz
87+
[48] = 1,
88+
89+
90+
91+
// sdio_configure
92+
// 0: Auto by pin strapping
93+
// 1: SDIO dataoutput is at negative edges (SDIO V1.1)
94+
// 2: SDIO dataoutput is at positive edges (SDIO V2.0)
95+
[50] = 0,
96+
97+
// bt_configure
98+
// 0: None,no bluetooth
99+
// 1: GPIO0 -> WLAN_ACTIVE/ANT_SEL_WIFI
100+
// MTMS -> BT_ACTIVE
101+
// MTCK -> BT_PRIORITY
102+
// U0RXD -> ANT_SEL_BT
103+
// 2: None, have bluetooth
104+
// 3: GPIO0 -> WLAN_ACTIVE/ANT_SEL_WIFI
105+
// MTMS -> BT_PRIORITY
106+
// MTCK -> BT_ACTIVE
107+
// U0RXD -> ANT_SEL_BT
108+
[51] = 0,
109+
110+
// bt_protocol
111+
// 0: WiFi-BT are not enabled. Antenna is for WiFi
112+
// 1: WiFi-BT are not enabled. Antenna is for BT
113+
// 2: WiFi-BT 2-wire are enabled, (only use BT_ACTIVE), independent ant
114+
// 3: WiFi-BT 3-wire are enabled, (when BT_ACTIVE = 0, BT_PRIORITY must be 0), independent ant
115+
// 4: WiFi-BT 2-wire are enabled, (only use BT_ACTIVE), share ant
116+
// 5: WiFi-BT 3-wire are enabled, (when BT_ACTIVE = 0, BT_PRIORITY must be 0), share ant
117+
[52] = 0,
118+
119+
// dual_ant_configure
120+
// 0: None
121+
// 1: dual_ant (antenna diversity for WiFi-only): GPIO0 + U0RXD
122+
// 2: T/R switch for External PA/LNA: GPIO0 is high and U0RXD is low during Tx
123+
// 3: T/R switch for External PA/LNA: GPIO0 is low and U0RXD is high during Tx
124+
[53] = 0,
125+
126+
[54] = 2, // Reserved, do not change
127+
128+
// share_xtal
129+
// This option is to share crystal clock for BT
130+
// The state of Crystal during sleeping
131+
// 0: Off
132+
// 1: Forcely On
133+
// 2: Automatically On according to XPD_DCDC
134+
// 3: Automatically On according to GPIO2
135+
[55] = 0,
136+
137+
[64] = 225, // spur_freq_cfg_2, spur_freq_2=spur_freq_cfg_2/spur_freq_cfg_div_2
138+
[65] = 10, // spur_freq_cfg_div_2
139+
[66] = 0, // spur_freq_en_h_2
140+
[67] = 0, // spur_freq_en_l_2
141+
[68] = 0, // spur_freq_cfg_msb
142+
[69] = 0, // spur_freq_cfg_2_msb
143+
[70] = 0, // spur_freq_cfg_3_low
144+
[71] = 0, // spur_freq_cfg_3_high
145+
[72] = 0, // spur_freq_cfg_4_low
146+
[73] = 0, // spur_freq_cfg_4_high
147+
148+
[74] = 1, // Reserved, do not change
149+
[75] = 0x93, // Reserved, do not change
150+
[76] = 0x43, // Reserved, do not change
151+
[77] = 0x00, // Reserved, do not change
152+
153+
// low_power_en
154+
// 0: disable low power mode
155+
// 1: enable low power mode
156+
[93] = 0,
157+
158+
// lp_rf_stg10
159+
// the attenuation of RF gain stage 0 and 1,
160+
// 0xf: 0db,
161+
// 0xe: -2.5db,
162+
// 0xd: -6db,
163+
// 0x9: -8.5db,
164+
// 0xc: -11.5db,
165+
// 0x8: -14db,
166+
// 0x4: -17.5,
167+
// 0x0: -23
168+
[94] = 0x0f,
169+
170+
171+
// lp_bb_att_ext
172+
// the attenuation of BB gain,
173+
// 0: 0db,
174+
// 1: -0.25db,
175+
// 2: -0.5db,
176+
// 3: -0.75db,
177+
// 4: -1db,
178+
// 5: -1.25db,
179+
// 6: -1.5db,
180+
// 7: -1.75db,
181+
// 8: -2db
182+
// max valve is 24(-6db)
183+
[95] = 0,
184+
185+
// pwr_ind_11b_en
186+
// 0: 11b power is same as mcs0 and 6m
187+
// 1: enable 11b power different with ofdm
188+
[96] = 0,
189+
190+
// pwr_ind_11b_0
191+
// 1m, 2m power index [0~5]
192+
[97] = 0,
193+
194+
// pwr_ind_11b_1
195+
// 5.5m, 11m power index [0~5]
196+
[98] = 0,
197+
198+
// vdd33_const
199+
// the voltage of PA_VDD
200+
// x=0xff: it can measure VDD33,
201+
// 18<=x<=36: use input voltage,
202+
// the value is voltage*10, 33 is 3.3V, 30 is 3.0V,
203+
// x<18 or x>36: default voltage is 3.3V
204+
[107] = 33,
205+
206+
// disable RF calibration for certain number of times
207+
[108] = 0,
208+
209+
// freq_correct_en
210+
// bit[0]:0->do not correct frequency offset, 1->correct frequency offset.
211+
// bit[1]:0->bbpll is 168M, it can correct + and - frequency offset, 1->bbpll is 160M, it only can correct + frequency offset
212+
// bit[2]:0->auto measure frequency offset and correct it, 1->use 113 byte force_freq_offset to correct frequency offset.
213+
// 0: do not correct frequency offset.
214+
// 1: auto measure frequency offset and correct it, bbpll is 168M, it can correct + and - frequency offset.
215+
// 3: auto measure frequency offset and correct it, bbpll is 160M, it only can correct + frequency offset.
216+
// 5: use 113 byte force_freq_offset to correct frequency offset, bbpll is 168M, it can correct + and - frequency offset.
217+
// 7: use 113 byte force_freq_offset to correct frequency offset, bbpll is 160M , it only can correct + frequency offset.
218+
[112] = 0,
219+
220+
// force_freq_offset
221+
// signed, unit is 8kHz
222+
[113] = 0,
223+
};
224+
225+
extern int __real_register_chipv6_phy(uint8_t* init_data);
226+
extern int __wrap_register_chipv6_phy(uint8_t* unused) {
227+
return __real_register_chipv6_phy(phy_init_data);
228+
}
229+
230+
231+
void user_rf_pre_init() {
232+
// *((volatile uint32_t*) 0x60000710) = 0;
233+
234+
volatile uint32_t* rtc_reg = (volatile uint32_t*) 0x60001000;
235+
rtc_reg[30] = 0;
236+
237+
system_set_os_print(0);
238+
}
239+
240+
extern int __get_rf_mode() __attribute__((weak));
241+
extern int __get_rf_mode()
242+
{
243+
return 0; // default mode
244+
}
245+
246+
247+
248+

‎platform.txt

+2-1
Original file line numberDiff line numberDiff line change
@@ -21,7 +21,8 @@ compiler.c.flags=-c -Os -g -Wpointer-arith -Wno-implicit-function-declaration -W
2121
compiler.S.cmd=xtensa-lx106-elf-gcc
2222
compiler.S.flags=-c -g -x assembler-with-cpp -MMD
2323

24-
compiler.c.elf.flags=-g -Os -nostdlib -Wl,--no-check-sections -u call_user_start -Wl,-static "-L{compiler.sdk.path}/lib" "-L{compiler.sdk.path}/ld" "-T{build.flash_ld}" -Wl,-wrap,system_restart_local
24+
compiler.c.elf.flags=-g -Os -nostdlib -Wl,--no-check-sections -u call_user_start -Wl,-static "-L{compiler.sdk.path}/lib" "-L{compiler.sdk.path}/ld" "-T{build.flash_ld}" -Wl,-wrap,system_restart_local -Wl,-wrap,register_chipv6_phy
25+
2526
compiler.c.elf.cmd=xtensa-lx106-elf-gcc
2627
compiler.c.elf.libs=-lm -lgcc -lhal -lphy -lnet80211 -llwip -lwpa -lmain -lpp -lsmartconfig
2728

0 commit comments

Comments
 (0)