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Remove FLASH cache mentioning for bits 3 and 4 of dport0 3FF00024 register.
Document high 32K of IRAM region and corresponding 0x3ff00024 control bits
add internal i2c controller
add MTDO == GPIO15 note
There's 64K IRAM in the region 0x40100000 - 0x40110000, updated spec.
Tested with JTAG debugger that there is 64K IRAM, not 32K + 0x308. Tested that regions above it are not writable.
Update memory map for RTC and OTA IRAM from sven337 over IRC.
Add FLASH mapping to memory details
Add esp-open-sdk link
Drop 'mkdir ESP8266_SDK' step from the SDK setup: the 'mv esp_iot_sdk_v0.9.3 ESP8266_SDK' is meant to rename, not to move into the existing directory. Suggested by @tylercrumpton and others.
Add boot mode
Updated Drivers (markdown)
Updated Home (markdown)
Fix 32/64 dependencies mismatch as suggested by limpkin on IRC
add mv at/* . to AT demo steps
Mirror AT example archives and update AT example build steps for SDK 0.9.3
Fix SDK URLs on github
Add patch for 0.9.3 SDK
Create SDK mirror and direct SDK download there. 0.9.3-patch1 is gone, couldn't find it on the espressif site. If you have it please push it to repo and update the wiki or mail it to me if you don't have access.
Add note about UART divisor.
add SPI controller registers
Add 3FF00014h from looking at IoT_Demo/ssl/app/espconn_ssl.c
Fix iram1 size
Update SPI Flash area info.
Document SPI mapping hardware properties.
Added Conditions for use coloum and GPIO16
Added the GPIO coloum
Checked in ota_bootloader_stage1.c
Updated Boot Process (markdown)
Add OTA bootloader decompilation ref, from TheSeven on IRC