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Feature/esp32h2 support (#8373)
* Initial support for ESP32H2 * Additional changes for ESP32H2 * Update libs for ESP32H2
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‎.github/scripts/on-push.sh

+2
Original file line numberDiff line numberDiff line change
@@ -69,6 +69,7 @@ if [ "$BUILD_PIO" -eq 0 ]; then
6969
FQBN_ESP32S3="espressif:esp32:esp32s3:PSRAM=opi,USBMode=default,PartitionScheme=huge_app"
7070
FQBN_ESP32C3="espressif:esp32:esp32c3:PartitionScheme=huge_app"
7171
FQBN_ESP32C6="espressif:esp32:esp32c6:PartitionScheme=huge_app"
72+
FQBN_ESP32H2="espressif:esp32:esp32h2:PartitionScheme=huge_app"
7273

7374
SKETCHES_ESP32="\
7475
$ARDUINO_ESP32_PATH/libraries/WiFiClientSecure/examples/WiFiClientSecure/WiFiClientSecure.ino\
@@ -87,6 +88,7 @@ if [ "$BUILD_PIO" -eq 0 ]; then
8788
build "esp32s2" $FQBN_ESP32S2 $CHUNK_INDEX $CHUNKS_CNT $SKETCHES_ESP32XX
8889
build "esp32c3" $FQBN_ESP32C3 $CHUNK_INDEX $CHUNKS_CNT $SKETCHES_ESP32XX
8990
build "esp32c6" $FQBN_ESP32C6 $CHUNK_INDEX $CHUNKS_CNT $SKETCHES_ESP32XX
91+
build "esp32h2" $FQBN_ESP32H2 $CHUNK_INDEX $CHUNKS_CNT $SKETCHES_ESP32XX
9092
build "esp32" $FQBN_ESP32 $CHUNK_INDEX $CHUNKS_CNT $SKETCHES_ESP32
9193
else
9294
source ${SCRIPTS_DIR}/install-platformio-esp32.sh

‎.github/scripts/sketch_utils.sh

+4
Original file line numberDiff line numberDiff line change
@@ -75,6 +75,7 @@ function build_sketch(){ # build_sketch <ide_path> <user_path> <path-to-ino> [ex
7575
esp32s3_opts="PSRAM=opi,USBMode=default,PartitionScheme=huge_app"
7676
esp32c3_opts="PartitionScheme=huge_app"
7777
esp32c6_opts="PartitionScheme=huge_app"
78+
esp32h2_opts="PartitionScheme=huge_app"
7879

7980
# Select the common part of the FQBN based on the target. The rest will be
8081
# appended depending on the passed options.
@@ -95,6 +96,9 @@ function build_sketch(){ # build_sketch <ide_path> <user_path> <path-to-ino> [ex
9596
"esp32c6")
9697
fqbn="espressif:esp32:esp32c6:${options:-$esp32c6_opts}"
9798
;;
99+
"esp32h2")
100+
fqbn="espressif:esp32:esp32h2:${options:-$esp32h2_opts}"
101+
;;
98102
esac
99103

100104
# Make it look like a JSON array.

‎.github/workflows/hil.yml

+2-2
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,7 @@ jobs:
4747
runs-on: ubuntu-latest
4848
strategy:
4949
matrix:
50-
chip: ['esp32', 'esp32s2', 'esp32s3', 'esp32c3', 'esp32c6']
50+
chip: ['esp32', 'esp32s2', 'esp32s3', 'esp32c3', 'esp32c6', 'esp32h2']
5151
chunks: ${{fromJson(needs.gen_chunks.outputs.chunks)}}
5252
steps:
5353
- name: Checkout Repository
@@ -76,7 +76,7 @@ jobs:
7676
strategy:
7777
fail-fast: false
7878
matrix:
79-
chip: ['esp32', 'esp32s2', 'esp32s3', 'esp32c3', 'esp32c6']
79+
chip: ['esp32', 'esp32s2', 'esp32s3', 'esp32c3', 'esp32c6', 'esp32h2']
8080
chunks: ${{fromJson(needs.gen_chunks.outputs.chunks)}}
8181
container:
8282
image: python:3.10.1-bullseye

‎.github/workflows/lib.yml

+3
Original file line numberDiff line numberDiff line change
@@ -37,6 +37,7 @@ jobs:
3737
- esp32c3
3838
- esp32s3
3939
- esp32c6
40+
- esp32h2
4041

4142
include:
4243
- target: esp32
@@ -49,6 +50,8 @@ jobs:
4950
fqbn: espressif:esp32:esp32s3
5051
- target: esp32c6
5152
fqbn: espressif:esp32:esp32c6
53+
- target: esp32h2
54+
fqbn: espressif:esp32:esp32h2
5255

5356

5457
steps:

‎boards.txt

+157
Original file line numberDiff line numberDiff line change
@@ -29,6 +29,163 @@ menu.LORAWAN_PREAMBLE_LENGTH=LoRaWan Preamble Length
2929
### DO NOT PUT BOARDS ABOVE THE OFFICIAL ESPRESSIF BOARDS! ###
3030
##############################################################
3131

32+
esp32h2.name=ESP32H2 Dev Module
33+
esp32h2.vid.0=0x303a
34+
esp32h2.pid.0=0x1001
35+
36+
esp32h2.bootloader.tool=esptool_py
37+
esp32h2.bootloader.tool.default=esptool_py
38+
39+
esp32h2.upload.tool=esptool_py
40+
esp32h2.upload.tool.default=esptool_py
41+
esp32h2.upload.tool.network=esp_ota
42+
43+
esp32h2.upload.maximum_size=1310720
44+
esp32h2.upload.maximum_data_size=327680
45+
esp32h2.upload.flags=
46+
esp32h2.upload.extra_flags=
47+
esp32h2.upload.use_1200bps_touch=false
48+
esp32h2.upload.wait_for_upload_port=false
49+
50+
esp32h2.serial.disableDTR=false
51+
esp32h2.serial.disableRTS=false
52+
53+
esp32h2.build.tarch=riscv32
54+
esp32h2.build.target=esp
55+
esp32h2.build.mcu=esp32h2
56+
esp32h2.build.core=esp32
57+
esp32h2.build.variant=esp32h2
58+
esp32h2.build.board=ESP32H2_DEV
59+
esp32h2.build.bootloader_addr=0x0
60+
61+
esp32h2.build.cdc_on_boot=0
62+
esp32h2.build.f_cpu=96000000L
63+
esp32h2.build.flash_size=4MB
64+
esp32h2.build.flash_freq=64m
65+
esp32h2.build.img_freq=48m
66+
esp32h2.build.flash_mode=qio
67+
esp32h2.build.boot=qio
68+
esp32h2.build.partitions=default
69+
esp32h2.build.defines=
70+
71+
## IDE 2.0 Seems to not update the value
72+
esp32h2.menu.JTAGAdapter.default=Disabled
73+
esp32h2.menu.JTAGAdapter.default.build.copy_jtag_files=0
74+
esp32h2.menu.JTAGAdapter.builtin=Integrated USB JTAG
75+
esp32h2.menu.JTAGAdapter.builtin.build.openocdscript=esp32h2-builtin.cfg
76+
esp32h2.menu.JTAGAdapter.builtin.build.copy_jtag_files=1
77+
esp32h2.menu.JTAGAdapter.external=FTDI Adapter
78+
esp32h2.menu.JTAGAdapter.external.build.openocdscript=esp32h2-ftdi.cfg
79+
esp32h2.menu.JTAGAdapter.external.build.copy_jtag_files=1
80+
esp32h2.menu.JTAGAdapter.bridge=ESP USB Bridge
81+
esp32h2.menu.JTAGAdapter.bridge.build.openocdscript=esp32h2-bridge.cfg
82+
esp32h2.menu.JTAGAdapter.bridge.build.copy_jtag_files=1
83+
84+
esp32h2.menu.CDCOnBoot.default=Disabled
85+
esp32h2.menu.CDCOnBoot.default.build.cdc_on_boot=0
86+
esp32h2.menu.CDCOnBoot.cdc=Enabled
87+
esp32h2.menu.CDCOnBoot.cdc.build.cdc_on_boot=1
88+
89+
esp32h2.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS)
90+
esp32h2.menu.PartitionScheme.default.build.partitions=default
91+
esp32h2.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS)
92+
esp32h2.menu.PartitionScheme.defaultffat.build.partitions=default_ffat
93+
esp32h2.menu.PartitionScheme.default_8MB=8M with spiffs (3MB APP/1.5MB SPIFFS)
94+
esp32h2.menu.PartitionScheme.default_8MB.build.partitions=default_8MB
95+
esp32h2.menu.PartitionScheme.default_8MB.upload.maximum_size=3342336
96+
esp32h2.menu.PartitionScheme.minimal=Minimal (1.3MB APP/700KB SPIFFS)
97+
esp32h2.menu.PartitionScheme.minimal.build.partitions=minimal
98+
esp32h2.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS)
99+
esp32h2.menu.PartitionScheme.no_ota.build.partitions=no_ota
100+
esp32h2.menu.PartitionScheme.no_ota.upload.maximum_size=2097152
101+
esp32h2.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS)
102+
esp32h2.menu.PartitionScheme.noota_3g.build.partitions=noota_3g
103+
esp32h2.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576
104+
esp32h2.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS)
105+
esp32h2.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat
106+
esp32h2.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152
107+
esp32h2.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS)
108+
esp32h2.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat
109+
esp32h2.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576
110+
esp32h2.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS)
111+
esp32h2.menu.PartitionScheme.huge_app.build.partitions=huge_app
112+
esp32h2.menu.PartitionScheme.huge_app.upload.maximum_size=3145728
113+
esp32h2.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS)
114+
esp32h2.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
115+
esp32h2.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
116+
esp32h2.menu.PartitionScheme.fatflash=16M Flash (2MB APP/12.5MB FATFS)
117+
esp32h2.menu.PartitionScheme.fatflash.build.partitions=ffat
118+
esp32h2.menu.PartitionScheme.fatflash.upload.maximum_size=2097152
119+
esp32h2.menu.PartitionScheme.app3M_fat9M_16MB=16M Flash (3MB APP/9.9MB FATFS)
120+
esp32h2.menu.PartitionScheme.app3M_fat9M_16MB.build.partitions=app3M_fat9M_16MB
121+
esp32h2.menu.PartitionScheme.app3M_fat9M_16MB.upload.maximum_size=3145728
122+
esp32h2.menu.PartitionScheme.rainmaker=RainMaker
123+
esp32h2.menu.PartitionScheme.rainmaker.build.partitions=rainmaker
124+
esp32h2.menu.PartitionScheme.rainmaker.upload.maximum_size=3145728
125+
126+
esp32h2.menu.FlashMode.qio=QIO
127+
esp32h2.menu.FlashMode.qio.build.flash_mode=dio
128+
esp32h2.menu.FlashMode.qio.build.boot=qio
129+
esp32h2.menu.FlashMode.dio=DIO
130+
esp32h2.menu.FlashMode.dio.build.flash_mode=dio
131+
esp32h2.menu.FlashMode.dio.build.boot=dio
132+
133+
esp32h2.menu.FlashFreq.64=64MHz
134+
esp32h2.menu.FlashFreq.64.build.flash_freq=64m
135+
esp32h2.menu.FlashFreq.64.build.img_freq=48m
136+
#esp32h2.menu.FlashFreq.32=32MHz
137+
#esp32h2.menu.FlashFreq.32.build.flash_freq=32m
138+
#esp32h2.menu.FlashFreq.32.build.img_freq=24m
139+
esp32h2.menu.FlashFreq.16=16MHz
140+
esp32h2.menu.FlashFreq.16.build.flash_freq=16m
141+
esp32h2.menu.FlashFreq.16.build.img_freq=12m
142+
143+
esp32h2.menu.FlashSize.4M=4MB (32Mb)
144+
esp32h2.menu.FlashSize.4M.build.flash_size=4MB
145+
esp32h2.menu.FlashSize.8M=8MB (64Mb)
146+
esp32h2.menu.FlashSize.8M.build.flash_size=8MB
147+
esp32h2.menu.FlashSize.8M.build.partitions=default_8MB
148+
esp32h2.menu.FlashSize.2M=2MB (16Mb)
149+
esp32h2.menu.FlashSize.2M.build.flash_size=2MB
150+
esp32h2.menu.FlashSize.2M.build.partitions=minimal
151+
esp32h2.menu.FlashSize.16M=16MB (128Mb)
152+
esp32h2.menu.FlashSize.16M.build.flash_size=16MB
153+
154+
esp32h2.menu.UploadSpeed.921600=921600
155+
esp32h2.menu.UploadSpeed.921600.upload.speed=921600
156+
esp32h2.menu.UploadSpeed.115200=115200
157+
esp32h2.menu.UploadSpeed.115200.upload.speed=115200
158+
esp32h2.menu.UploadSpeed.256000.windows=256000
159+
esp32h2.menu.UploadSpeed.256000.upload.speed=256000
160+
esp32h2.menu.UploadSpeed.230400.windows.upload.speed=256000
161+
esp32h2.menu.UploadSpeed.230400=230400
162+
esp32h2.menu.UploadSpeed.230400.upload.speed=230400
163+
esp32h2.menu.UploadSpeed.460800.linux=460800
164+
esp32h2.menu.UploadSpeed.460800.macosx=460800
165+
esp32h2.menu.UploadSpeed.460800.upload.speed=460800
166+
esp32h2.menu.UploadSpeed.512000.windows=512000
167+
esp32h2.menu.UploadSpeed.512000.upload.speed=512000
168+
169+
esp32h2.menu.DebugLevel.none=None
170+
esp32h2.menu.DebugLevel.none.build.code_debug=0
171+
esp32h2.menu.DebugLevel.error=Error
172+
esp32h2.menu.DebugLevel.error.build.code_debug=1
173+
esp32h2.menu.DebugLevel.warn=Warn
174+
esp32h2.menu.DebugLevel.warn.build.code_debug=2
175+
esp32h2.menu.DebugLevel.info=Info
176+
esp32h2.menu.DebugLevel.info.build.code_debug=3
177+
esp32h2.menu.DebugLevel.debug=Debug
178+
esp32h2.menu.DebugLevel.debug.build.code_debug=4
179+
esp32h2.menu.DebugLevel.verbose=Verbose
180+
esp32h2.menu.DebugLevel.verbose.build.code_debug=5
181+
182+
esp32h2.menu.EraseFlash.none=Disabled
183+
esp32h2.menu.EraseFlash.none.upload.erase_cmd=
184+
esp32h2.menu.EraseFlash.all=Enabled
185+
esp32h2.menu.EraseFlash.all.upload.erase_cmd=-e
186+
187+
##############################################################
188+
32189
esp32c6.name=ESP32C6 Dev Module
33190
esp32c6.vid.0=0x303a
34191
esp32c6.pid.0=0x1001

‎cores/esp32/Esp.cpp

+7
Original file line numberDiff line numberDiff line change
@@ -54,6 +54,9 @@ extern "C" {
5454
#elif CONFIG_IDF_TARGET_ESP32C6
5555
#include "esp32c6/rom/spi_flash.h"
5656
#define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32c6 is located at 0x0000
57+
#elif CONFIG_IDF_TARGET_ESP32H2
58+
#include "esp32h2/rom/spi_flash.h"
59+
#define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32h2 is located at 0x0000
5760
#else
5861
#error Target CONFIG_IDF_TARGET is not supported
5962
#endif
@@ -363,8 +366,12 @@ FlashMode_t EspClass::getFlashChipMode(void)
363366
#if CONFIG_IDF_TARGET_ESP32S2
364367
uint32_t spi_ctrl = REG_READ(PERIPHS_SPI_FLASH_CTRL);
365368
#else
369+
#if CONFIG_IDF_TARGET_ESP32H2
370+
uint32_t spi_ctrl = REG_READ(DR_REG_SPI0_BASE + 0x8);
371+
#else
366372
uint32_t spi_ctrl = REG_READ(SPI_CTRL_REG(0));
367373
#endif
374+
#endif
368375
/* Not all of the following constants are already defined in older versions of spi_reg.h, so do it manually for now*/
369376
if (spi_ctrl & BIT(24)) { //SPI_FREAD_QIO
370377
return (FM_QIO);

‎cores/esp32/HardwareSerial.cpp

+9-1
Original file line numberDiff line numberDiff line change
@@ -30,6 +30,8 @@
3030
#define SOC_RX0 20
3131
#elif CONFIG_IDF_TARGET_ESP32C6
3232
#define SOC_RX0 17
33+
#elif CONFIG_IDF_TARGET_ESP32H2
34+
#define SOC_RX0 23
3335
#endif
3436
#endif
3537

@@ -42,6 +44,8 @@
4244
#define SOC_TX0 21
4345
#elif CONFIG_IDF_TARGET_ESP32C6
4446
#define SOC_TX0 16
47+
#elif CONFIG_IDF_TARGET_ESP32H2
48+
#define SOC_TX0 24
4549
#endif
4650
#endif
4751

@@ -61,6 +65,8 @@ void serialEvent(void) {}
6165
#define RX1 15
6266
#elif CONFIG_IDF_TARGET_ESP32C6
6367
#define RX1 5
68+
#elif CONFIG_IDF_TARGET_ESP32H2
69+
#define RX1 0
6470
#endif
6571
#endif
6672

@@ -73,8 +79,10 @@ void serialEvent(void) {}
7379
#define TX1 19
7480
#elif CONFIG_IDF_TARGET_ESP32S3
7581
#define TX1 16
76-
#elif CONFIG_IDF_TARGET_ESP32C6
82+
#elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
7783
#define TX1 4
84+
#elif CONFIG_IDF_TARGET_ESP32H2
85+
#define TX1 1
7886
#endif
7987
#endif
8088

‎cores/esp32/esp32-hal-adc.c

+2-2
Original file line numberDiff line numberDiff line change
@@ -91,7 +91,7 @@ esp_err_t __analogChannelConfig(adc_bitwidth_t width, adc_attenuation_t atten, i
9191
log_e("adc_cali_create_scheme_curve_fitting failed with error: %d", err);
9292
return err;
9393
}
94-
#elif !defined(CONFIG_IDF_TARGET_ESP32C6) //ADC_CALI_SCHEME_LINE_FITTING_SUPPORTED
94+
#elif !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) //ADC_CALI_SCHEME_LINE_FITTING_SUPPORTED
9595
log_d("Deleting ADC_UNIT_%d line cali handle",adc_unit);
9696
err = adc_cali_delete_scheme_line_fitting(adc_cali_handle[adc_unit]);
9797
if(err != ESP_OK){
@@ -278,7 +278,7 @@ uint32_t __analogReadMilliVolts(uint8_t pin){
278278
.bitwidth = __analogWidth,
279279
};
280280
err = adc_cali_create_scheme_curve_fitting(&cali_config, &adc_cali_handle[adc_unit]);
281-
#elif !defined(CONFIG_IDF_TARGET_ESP32C6) //ADC_CALI_SCHEME_LINE_FITTING_SUPPORTED
281+
#elif !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) //ADC_CALI_SCHEME_LINE_FITTING_SUPPORTED
282282
adc_cali_line_fitting_config_t cali_config = {
283283
.unit_id = adc_unit,
284284
.bitwidth = __analogWidth,

‎cores/esp32/esp32-hal-cpu.c

+10-4
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@
1919
#include "esp_attr.h"
2020
#include "esp_log.h"
2121
#include "soc/rtc.h"
22-
#ifndef CONFIG_IDF_TARGET_ESP32C6
22+
#if !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
2323
#include "soc/rtc_cntl_reg.h"
2424
#include "soc/apb_ctrl_reg.h"
2525
#endif
@@ -42,6 +42,8 @@
4242
#include "esp32c3/rom/rtc.h"
4343
#elif CONFIG_IDF_TARGET_ESP32C6
4444
#include "esp32c6/rom/rtc.h"
45+
#elif CONFIG_IDF_TARGET_ESP32H2
46+
#include "esp32h2/rom/rtc.h"
4547
#else
4648
#error Target CONFIG_IDF_TARGET is not supported
4749
#endif
@@ -151,7 +153,7 @@ bool removeApbChangeCallback(void * arg, apb_change_cb_t cb){
151153
}
152154

153155
static uint32_t calculateApb(rtc_cpu_freq_config_t * conf){
154-
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3
156+
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2
155157
return APB_CLK_FREQ;
156158
#else
157159
if(conf->freq_mhz >= 80){
@@ -167,7 +169,9 @@ bool setCpuFrequencyMhz(uint32_t cpu_freq_mhz){
167169
rtc_cpu_freq_config_t conf, cconf;
168170
uint32_t capb, apb;
169171
//Get XTAL Frequency and calculate min CPU MHz
172+
#ifndef CONFIG_IDF_TARGET_ESP32H2
170173
rtc_xtal_freq_t xtal = rtc_clk_xtal_freq_get();
174+
#endif
171175
#if CONFIG_IDF_TARGET_ESP32
172176
if(xtal > RTC_XTAL_FREQ_AUTO){
173177
if(xtal < RTC_XTAL_FREQ_40M) {
@@ -181,6 +185,7 @@ bool setCpuFrequencyMhz(uint32_t cpu_freq_mhz){
181185
}
182186
}
183187
#endif
188+
#ifndef CONFIG_IDF_TARGET_ESP32H2
184189
if(cpu_freq_mhz > xtal && cpu_freq_mhz != 240 && cpu_freq_mhz != 160 && cpu_freq_mhz != 80){
185190
if(xtal >= RTC_XTAL_FREQ_40M){
186191
log_e("Bad frequency: %u MHz! Options are: 240, 160, 80, %u, %u and %u MHz", cpu_freq_mhz, xtal, xtal/2, xtal/4);
@@ -189,6 +194,7 @@ bool setCpuFrequencyMhz(uint32_t cpu_freq_mhz){
189194
}
190195
return false;
191196
}
197+
#endif
192198
#if CONFIG_IDF_TARGET_ESP32
193199
//check if cpu supports the frequency
194200
if(cpu_freq_mhz == 240){
@@ -222,7 +228,7 @@ bool setCpuFrequencyMhz(uint32_t cpu_freq_mhz){
222228
}
223229
//Make the frequency change
224230
rtc_clk_cpu_freq_set_config_fast(&conf);
225-
#ifndef CONFIG_IDF_TARGET_ESP32C6
231+
#if !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
226232
if(capb != apb){
227233
//Update REF_TICK (uncomment if REF_TICK is different than 1MHz)
228234
//if(conf.freq_mhz < 80){
@@ -235,7 +241,7 @@ bool setCpuFrequencyMhz(uint32_t cpu_freq_mhz){
235241
}
236242
#endif
237243
//Update FreeRTOS Tick Divisor
238-
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6
244+
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
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240246
#elif CONFIG_IDF_TARGET_ESP32S3
241247

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