test: Add m7a to cpu template pipeline

Add m7a to the cpu template pipeline and add msr baselines for the
variant.

Signed-off-by: Jack Thomson <jackabt@amazon.com>

Author: JackThomson2

.buildkite/pipeline_cpu_template.py

@@ -26,7 +26,13 @@ class BkStep(str, Enum):
             "tools/devtool -y test --no-build -- -m nonci -n4 --dist worksteal integration_tests/functional/test_cpu_features_x86_64.py -k 'test_cpu_rdmsr' "
         ],
         BkStep.LABEL: "📖 rdmsr",
-        "instances": ["c5n.metal", "m5n.metal", "m6a.metal", "m6i.metal"],
+        "instances": [
+            "c5n.metal",
+            "m5n.metal",
+            "m6i.metal",
+            "m6a.metal",
+            "m7a.metal-48xl",
+        ],
     },
     "fingerprint": {
         BkStep.COMMAND: [
@@ -59,7 +65,13 @@ class BkStep(str, Enum):
             "c5n.metal": ["m5n.metal", "m6i.metal"],
             "m6i.metal": ["m5n.metal", "c5n.metal"],
         },
-        "instances": ["c5n.metal", "m5n.metal", "m6i.metal", "m6a.metal"],
+        "instances": [
+            "c5n.metal",
+            "m5n.metal",
+            "m6i.metal",
+            "m6a.metal",
+            "m7a.metal-48xl",
+        ],
     },
 }
 

tests/data/msr/msr_list_T2A_AMD_GENOA_5.10host_5.10guest.csv

@@ -0,0 +1,298 @@
+MSR_ADDR,VALUE
+0,0x0
+0x1,0x0
+0x10,0x86e8ca1e
+0x11,0x24a1008
+0x12,0x24a2001
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+0x8b,0x1000065
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+0x176,0xffffffff81a01510
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+0x198,0x400000003e8
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