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config.in
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if [ "$MT7621_FPGA_BOARD" = "y" -o "$MT7621_ASIC_BOARD" = "y" ]; then
string 'Cross Compiler Path' CONFIG_CROSS_COMPILER_PATH /opt/mips-2012.03/bin/
elif [ "$RT2880_FPGA_BOARD" = "y" -o "$RT2880_ASIC_BOARD" = "y" -o
"$RT3052_FPGA_BOARD" = "y" -o "$RT3052_ASIC_BOARD" = "y" -o
"$RT3352_FPGA_BOARD" = "y" -o "$RT3352_ASIC_BOARD" = "y" -o
"$RT3883_FPGA_BOARD" = "y" -o "$RT3883_ASIC_BOARD" = "y" -o
"$RT5350_FPGA_BOARD" = "y" -o "$RT5350_ASIC_BOARD" = "y" -o
"$RT6855A_FPGA_BOARD" = "y" -o "$RT6855A_ASIC_BOARD" = "y" -o
"$MT7620_FPGA_BOARD" = "y" -o "$MT7620_ASIC_BOARD" = "y" -o
"$MT7628_FPGA_BOARD" = "y" -o "$MT7628_ASIC_BOARD" = "y" ]; then
string 'Cross Compiler Path' CONFIG_CROSS_COMPILER_PATH /opt/buildroot-gcc342/bin
fi
comment ""
mainmenu_name 'Uboot Configuration'
define_bool ASIC_BOARD y
if [ "$FPGA_BOARD" = "y" ]; then
choice 'Chip ID' "RT2880 RT2880_FPGA_BOARD \
RT3052 RT3052_FPGA_BOARD \
RT3352 RT3352_FPGA_BOARD \
RT3883 RT3883_FPGA_BOARD \
RT5350 RT5350_FPGA_BOARD \
RT6855A RT6855A_FPGA_BOARD \
MT7620 MT7620_FPGA_BOARD \
MT7621 MT7621_FPGA_BOARD \
MT7628 MT7628_FPGA_BOARD
"
else
choice 'Chip ID' " MT7620 MT7620_ASIC_BOARD \
MT7621 MT7621_ASIC_BOARD \
MT7628 MT7628_ASIC_BOARD
"
fi
#########################################################################################3
# RT2880
#########################################################################################3
if [ "$RT2880_FPGA_BOARD" = "y" -o "$RT2880_ASIC_BOARD" = "y" ]; then
define_bool RT2880_MP y
#-----------------------
# RT2880 GMAC
#-----------------------
choice 'GMAC connected to ' "100Switch MAC_TO_100SW_MODE \
100Phy MAC_TO_100PHY_MODE \
GigaSW MAC_TO_VITESSE_MODE \
GigaPhy MAC_TO_GIGAPHY_MODE
" 100Switch
if [ "$MAC_TO_VITESSE_MODE" = "y" ]; then
define_bool GPIOx_RESET_MODE y
fi
if [ "$MAC_TO_100PHY_MODE" = "y" ]; then
hex "10/100 PHY address for Auto Polling" MAC_TO_GIGAPHY_MODE_ADDR 0x1f
fi
if [ "$MAC_TO_GIGAPHY_MODE" = "y" ]; then
hex "GigaPHY address for Auto Polling" MAC_TO_GIGAPHY_MODE_ADDR 0x1f
fi
#-----------------------
# RT2880 FLASH
#-----------------------
define_bool ON_BOARD_NOR_FLASH_COMPONENT y
choice 'Flash Size' "4M ON_BOARD_4M_FLASH_COMPONENT \
8M ON_BOARD_8M_FLASH_COMPONENT \
16M ON_BOARD_16M_FLASH_COMPONENT
" 4M
#-----------------------
# RT2880 DRAM
#-----------------------
define_bool ON_BOARD_SDR y
choice 'DRAM Component' "64Mb ON_BOARD_64M_DRAM_COMPONENT \
128Mb ON_BOARD_128M_DRAM_COMPONENT \
256Mb ON_BOARD_256M_DRAM_COMPONENT \
512Mb ON_BOARD_512M_DRAM_COMPONENT
" 128Mb
choice 'DRAM Bus' "16bits ON_BOARD_16BIT_DRAM_BUS \
32bits ON_BOARD_32BIT_DRAM_BUS
" 32bits
#-----------------------
# RT2880 Option
#-----------------------
comment ""
choice 'Ram/Rom version' "RAM UBOOT_RAM \
ROM UBOOT_ROM
" ROM
bool "Dual Image" DUAL_IMAGE_SUPPORT
bool "Partition LAN/WAN" LAN_WAN_PARTITION
if [ "$LAN_WAN_PARTITION" = "y" ]; then
choice 'LAN/WAN Board Layout' "W/LLLL RALINK_DEMO_BOARD_PVLAN \
LLLL/W RALINK_EV_BOARD_PVLAN
" W/LLLL
fi
if [ "$UBOOT_RAM" = "y" ]; then
define_hex TEXT_BASE 0x8A200000
else
define_hex TEXT_BASE 0xBFC00000
fi
fi
#########################################################################################3
# RT3052
#########################################################################################3
if [ "$RT3052_FPGA_BOARD" = "y" -o "$RT3052_ASIC_BOARD" = "y" ]; then
define_bool RT3052_MP2 y
#-----------------------
# RT3052 GMAC
#-----------------------
choice 'Port 5 Connect to' "None P5_MAC_TO_NONE_MODE \
Giga_Phy(RGMII) P5_MAC_TO_PHY_MODE \
Giga_SW/iNIC(RGMII) P5_RGMII_TO_MAC_MODE \
External_CPU(MII_RvMII) P5_MII_TO_MAC_MODE \
External_CPU(RvMII_MII) P5_RMII_TO_MAC_MODE
" None
if [ "$P5_MAC_TO_PHY_MODE" = "y" ]; then
hex "GigaPHY address for Auto Polling" MAC_TO_GIGAPHY_MODE_ADDR 0x1f
fi
if [ "$P5_RGMII_TO_MAC_MODE" = "y" ]; then
define_bool GPIOx_RESET_MODE y
fi
#-----------------------
# RT3052 FLASH
#-----------------------
choice 'Flash Type' "NOR ON_BOARD_NOR_FLASH_COMPONENT \
NAND ON_BOARD_NAND_FLASH_COMPONENT \
SPI ON_BOARD_SPI_FLASH_COMPONENT
"NOR
if [ "$DUAL_IMAGE_SUPPORT" = "y" ]; then
choice 'Flash Size' "4M ON_BOARD_4M_FLASH_COMPONENT \
8M ON_BOARD_8M_FLASH_COMPONENT \
16M ON_BOARD_16M_FLASH_COMPONENT
" 4M
fi
#-----------------------
# RT3052 DRAM
#-----------------------
define_bool ON_BOARD_SDR y
choice 'DRAM Component' "64Mb ON_BOARD_64M_DRAM_COMPONENT \
128Mb ON_BOARD_128M_DRAM_COMPONENT \
256Mb ON_BOARD_256M_DRAM_COMPONENT \
512Mb ON_BOARD_512M_DRAM_COMPONENT
" 128Mb
choice 'DRAM Bus' "16bits ON_BOARD_16BIT_DRAM_BUS \
32bits ON_BOARD_32BIT_DRAM_BUS
" 32bits
#-----------------------
# RT3052 Option
#-----------------------
comment ""
if [ "$ON_BOARD_NOR_FLASH_COMPONENT" == "y" ]; then
choice 'Ram/Rom version' "RAM UBOOT_RAM \
ROM UBOOT_ROM
" ROM
else
define_bool UBOOT_RAM y
fi
bool "Dual Image" DUAL_IMAGE_SUPPORT
bool "Partition LAN/WAN" LAN_WAN_PARTITION
if [ "$LAN_WAN_PARTITION" = "y" ]; then
choice 'LAN/WAN Board Layout' "W/LLLL RALINK_DEMO_BOARD_PVLAN \
LLLL/W RALINK_EV_BOARD_PVLAN
" W/LLLL
fi
if [ "$UBOOT_RAM" = "y" ]; then
define_hex TEXT_BASE 0x80200000
else
define_hex TEXT_BASE 0xBF000000
fi
fi
#########################################################################################5
# RT3350
#########################################################################################3
if [ "$RT3350_ASIC_BOARD" = "y" ]; then
define_bool RT3052_ASIC_BOARD y
define_bool RT3052_MP2 y
#-----------------------
# RT3350 GMAC
#-----------------------
define_bool P5_MAC_TO_NONE_MODE y
#-----------------------
# RT3350 FLASH
#-----------------------
choice 'Flash Type' "NOR ON_BOARD_NOR_FLASH_COMPONENT \
NAND ON_BOARD_NAND_FLASH_COMPONENT \
SPI ON_BOARD_SPI_FLASH_COMPONENT
"NOR
if [ "$DUAL_IMAGE_SUPPORT" = "y" ]; then
choice 'Flash Size' "4M ON_BOARD_4M_FLASH_COMPONENT \
8M ON_BOARD_8M_FLASH_COMPONENT \
16M ON_BOARD_16M_FLASH_COMPONENT
" 4M
fi
#-----------------------
# RT3350 DRAM
#-----------------------
define_bool ON_BOARD_SDR y
choice 'DRAM Component' "64Mb ON_BOARD_64M_DRAM_COMPONENT \
128Mb ON_BOARD_128M_DRAM_COMPONENT \
256Mb ON_BOARD_256M_DRAM_COMPONENT \
512Mb ON_BOARD_512M_DRAM_COMPONENT
" 128Mb
define_bool ON_BOARD_16BIT_DRAM_BUS y
#-----------------------
# RT3350 Option
#-----------------------
comment ""
if [ "$ON_BOARD_NOR_FLASH_COMPONENT" == "y" ]; then
choice 'Ram/Rom version' "RAM UBOOT_RAM \
ROM UBOOT_ROM
" ROM
else
define_bool UBOOT_RAM y
fi
bool "Dual Image" DUAL_IMAGE_SUPPORT
bool "Partition LAN/WAN" LAN_WAN_PARTITION
if [ "$LAN_WAN_PARTITION" = "y" ]; then
choice 'LAN/WAN Board Layout' "W/LLLL RALINK_DEMO_BOARD_PVLAN \
LLLL/W RALINK_EV_BOARD_PVLAN
"
fi
if [ "$UBOOT_RAM" = "y" ]; then
define_hex TEXT_BASE 0x80200000
else
define_hex TEXT_BASE 0xBF000000
fi
fi
#########################################################################################3
# RT3883
#########################################################################################3
if [ "$RT3883_FPGA_BOARD" = "y" -o "$RT3883_ASIC_BOARD" = "y" ]; then
define_bool RT3883_MP y
#-----------------------
# RT3883 GMAC
#-----------------------
choice 'Use GE1 or GE2' "GMAC1 RT3883_USE_GE1 \
GMAC2 RT3883_USE_GE2
"
if [ "$RT3883_USE_GE1" = "y" ]; then
choice 'GE1 connected to' "GE_MII_FORCE_100 GE_MII_FORCE_100 \
GE_RVMII_FORCE_100 GE_RVMII_FORCE_100 \
GE_MII_AN GE_MII_AN \
GE_RGMII_FORCE_1000(MT7530) GE_RGMII_FORCE_1000 \
GE_RGMII_FORCE_VITESSE GE_RGMII_FORCE_VITESSE \
GE_RGMII_AN GE_RGMII_AN
"
else
choice 'GE2 connected to' "GE_MII_FORCE_100 GE_MII_FORCE_100 \
GE_RVMII_FORCE_100 GE_RVMII_FORCE_100 \
GE_MII_AN GE_MII_AN \
GE_RGMII_FORCE_1000 GE_RGMII_FORCE_1000 \
GE_RGMII_AN GE_RGMII_AN
"
fi
if [ "$GE_MII_FORCE_100" = "y" -o \
"$GE_RVMII_FORCE_100" = "y" ]; then
define_bool MAC_TO_100SW_MODE y
fi
if [ "$GE_MII_AN" = "y" ]; then
define_bool MAC_TO_100PHY_MODE y
hex "10/100 PHY address for Auto Polling" MAC_TO_GIGAPHY_MODE_ADDR 0x1f
fi
if [ "$GE_RGMII_FORCE_VITESSE" = "y" ]; then
define_bool MAC_TO_VITESSE_MODE y
define_bool GPIOx_RESET_MODE y
fi
if [ "$GE_RGMII_FORCE_1000" = "y" ]; then
define_bool MAC_TO_MT7530_MODE y
define_bool GPIOx_RESET_MODE y
fi
if [ "$GE_RGMII_AN" = "y" ]; then
define_bool MAC_TO_GIGAPHY_MODE y
hex "GigaPHY address for Auto Polling" MAC_TO_GIGAPHY_MODE_ADDR 0x1f
fi
#-----------------------
# RT3883 FLASH
#-----------------------
choice 'Flash Type' "NOR ON_BOARD_NOR_FLASH_COMPONENT \
NAND ON_BOARD_NAND_FLASH_COMPONENT \
SPI ON_BOARD_SPI_FLASH_COMPONENT
" NOR
if [ "$DUAL_IMAGE_SUPPORT" = "y" ]; then
choice 'Flash Size' "4M ON_BOARD_4M_FLASH_COMPONENT \
8M ON_BOARD_8M_FLASH_COMPONENT \
16M ON_BOARD_16M_FLASH_COMPONENT
" 4M
fi
#-----------------------
# RT3883 DRAM
#-----------------------
choice 'DRAM Type' "SDR ON_BOARD_SDR \
DDR2 ON_BOARD_DDR2
"DDR2
if [ "$ON_BOARD_SDR" = "y" ]; then
choice 'DRAM Component' "64Mb ON_BOARD_64M_DRAM_COMPONENT \
128Mb ON_BOARD_128M_DRAM_COMPONENT \
256Mb ON_BOARD_256M_DRAM_COMPONENT \
512Mb ON_BOARD_512M_DRAM_COMPONENT
" 128Mb
choice 'DRAM Bus' "16bits ON_BOARD_16BIT_DRAM_BUS \
32bits ON_BOARD_32BIT_DRAM_BUS
" 32bits
else
choice 'DDR Component' "256Mb ON_BOARD_256M_DRAM_COMPONENT \
512Mb ON_BOARD_512M_DRAM_COMPONENT \
1024Mb ON_BOARD_1024M_DRAM_COMPONENT
" 512Mb
choice 'DDR Width' "8bits ON_BOARD_DDR_WIDTH_8 \
16bits ON_BOARD_DDR_WIDTH_16
" 16bits
choice 'DRAM Bus' "16bits ON_BOARD_16BIT_DRAM_BUS \
32bits ON_BOARD_32BIT_DRAM_BUS
" 16bits
fi
#-----------------------
# RT3883 Option
#-----------------------
comment ""
if [ "$ON_BOARD_NOR_FLASH_COMPONENT" == "y" ]; then
choice 'Ram/Rom version' "RAM UBOOT_RAM \
ROM UBOOT_ROM
" ROM
else
define_bool UBOOT_RAM y
fi
bool "Dual Image" DUAL_IMAGE_SUPPORT
bool "Partition LAN/WAN" LAN_WAN_PARTITION
if [ "$LAN_WAN_PARTITION" = "y" ]; then
choice 'LAN/WAN Board Layout' "W/LLLL RALINK_DEMO_BOARD_PVLAN \
LLLL/W RALINK_EV_BOARD_PVLAN
"W/LLLL
fi
bool "Static DRAM Parameter" DRAM_PARAMETERS
if [ "$DRAM_PARAMETERS" = "y" ]; then
if [ "$ON_BOARD_SDR" = "y" ]; then
hex " SDRAM_CFG0" DRAM_CFG0 0
hex " SDRAM_CFG1" DRAM_CFG1 0
else
hex " SYSCFG1(hex)" DRAM_CFG0 26
hex " DDR_CFG3_ODT(hex)" DRAM_CFG1 2
fi
fi
if [ "$UBOOT_RAM" = "y" ]; then
define_hex TEXT_BASE 0x80200000
else
define_hex TEXT_BASE 0xBC000000
fi
fi
#########################################################################################3
# RT3352
#########################################################################################3
if [ "$RT3352_FPGA_BOARD" = "y" -o "$RT3352_ASIC_BOARD" = "y" ]; then
define_bool RT3352_MP y
#-----------------------
# RT3352 GMAC
#-----------------------
choice 'Port 5 Connect to' "None P5_MAC_TO_NONE_MODE \
Giga_Phy(RGMII) P5_MAC_TO_PHY_MODE \
Giga_SW/iNIC(RGMII) P5_RGMII_TO_MAC_MODE \
External_CPU(MII_RvMII) P5_MII_TO_MAC_MODE \
External_CPU(RvMII_MII) P5_RMII_TO_MAC_MODE
" None
if [ "$P5_MAC_TO_PHY_MODE" = "y" ]; then
hex "GigaPHY address for Auto Polling" MAC_TO_GIGAPHY_MODE_ADDR 0x1f
fi
if [ "$P5_RGMII_TO_MAC_MODE" = "y" ]; then
define_bool GPIOx_RESET_MODE y
fi
#-----------------------
# RT3352 FLASH
#-----------------------
define_bool ON_BOARD_SPI_FLASH_COMPONENT y
define_bool UBOOT_RAM y
if [ "$DUAL_IMAGE_SUPPORT" = "y" ]; then
choice 'Flash Size' "4M ON_BOARD_4M_FLASH_COMPONENT \
8M ON_BOARD_8M_FLASH_COMPONENT \
16M ON_BOARD_16M_FLASH_COMPONENT
" 4M
fi
#-----------------------
# RT3352 DRAM
#-----------------------
choice 'DRAM Type' "SDR ON_BOARD_SDR \
DDR2 ON_BOARD_DDR2
"SDR
if [ "$ON_BOARD_SDR" = "y" ]; then
choice 'DRAM Component' "64Mb ON_BOARD_64M_DRAM_COMPONENT \
128Mb ON_BOARD_128M_DRAM_COMPONENT \
256Mb ON_BOARD_256M_DRAM_COMPONENT \
512Mb ON_BOARD_512M_DRAM_COMPONENT
" 128Mb
choice 'DRAM Bus' "16bits ON_BOARD_16BIT_DRAM_BUS \
32bits ON_BOARD_32BIT_DRAM_BUS
" 16bits
else
choice 'DDR Component' "256Mb ON_BOARD_256M_DRAM_COMPONENT \
512Mb ON_BOARD_512M_DRAM_COMPONENT \
1024Mb ON_BOARD_1024M_DRAM_COMPONENT
" 512Mb
choice 'DDR Width' "8bits ON_BOARD_DDR_WIDTH_8 \
16bits ON_BOARD_DDR_WIDTH_16
" 16bits
choice 'DRAM Bus' "16bits ON_BOARD_16BIT_DRAM_BUS \
32bits ON_BOARD_32BIT_DRAM_BUS
" 16bits
fi
#-----------------------
# RT3352 Option
#-----------------------
comment ""
bool "Dual Image" DUAL_IMAGE_SUPPORT
bool "Partition LAN/WAN" LAN_WAN_PARTITION
if [ "$LAN_WAN_PARTITION" = "y" ]; then
choice 'LAN/WAN Board Layout' "W/LLLL RALINK_DEMO_BOARD_PVLAN \
LLLL/W RALINK_EV_BOARD_PVLAN
"
fi
bool "Static DRAM Parameter" DRAM_PARAMETERS
if [ "$DRAM_PARAMETERS" = "y" ]; then
if [ "$ON_BOARD_SDR" = "y" ]; then
hex " SDRAM_CFG0" DRAM_CFG0 0
hex " SDRAM_CFG1" DRAM_CFG1 0
else
hex " SYSCFG1(hex)" DRAM_CFG0 26
hex " DDR_CFG3_ODT(hex)" DRAM_CFG1 2
fi
fi
define_hex TEXT_BASE 0x80200000
fi
#########################################################################################3
# RT5350
#########################################################################################3
if [ "$RT5350_FPGA_BOARD" = "y" -o "$RT5350_ASIC_BOARD" = "y" ]; then
define_bool RT5350_MP y
#-----------------------
# RT5350 GMAC
#-----------------------
define_bool P5_MAC_TO_NONE_MODE y
#-----------------------
# RT5350 FLASH
#-----------------------
define_bool ON_BOARD_SPI_FLASH_COMPONENT y
define_bool UBOOT_RAM y
if [ "$DUAL_IMAGE_SUPPORT" = "y" ]; then
choice 'Flash Size' "4M ON_BOARD_4M_FLASH_COMPONENT \
8M ON_BOARD_8M_FLASH_COMPONENT \
16M ON_BOARD_16M_FLASH_COMPONENT
" 4M
fi
#-----------------------
# RT5350 DRAM
#-----------------------
define_bool ON_BOARD_SDR y
choice 'DRAM Component' "64Mb ON_BOARD_64M_DRAM_COMPONENT \
128Mb ON_BOARD_128M_DRAM_COMPONENT \
256Mb ON_BOARD_256M_DRAM_COMPONENT \
512Mb ON_BOARD_512M_DRAM_COMPONENT
" 128Mb
define_bool ON_BOARD_16BIT_DRAM_BUS y
#-----------------------
# RT5350 Option
#-----------------------
comment ""
bool "Dual Image" DUAL_IMAGE_SUPPORT
bool "Partition LAN/WAN" LAN_WAN_PARTITION
if [ "$LAN_WAN_PARTITION" = "y" ]; then
choice 'LAN/WAN Board Layout' "W/LLLL RALINK_DEMO_BOARD_PVLAN \
LLLL/W RALINK_EV_BOARD_PVLAN
"
fi
bool "Static DRAM Parameter" DRAM_PARAMETERS
if [ "$DRAM_PARAMETERS" = "y" ]; then
if [ "$ON_BOARD_SDR" = "y" ]; then
hex " SDRAM_CFG0" DRAM_CFG0 0
hex " SDRAM_CFG1" DRAM_CFG1 0
else
hex " SYSCFG1(hex)" DRAM_CFG0 26
hex " DDR_CFG3_ODT(hex)" DRAM_CFG1 2
fi
fi
bool "CPU PLL adjustment" CPU_PLL_PARAMETERS
if [ "$CPU_PLL_PARAMETERS" = "y" ]; then
hex " CPU PLL ADJUSTMENT " CPUPLLCFG 0
fi
define_hex TEXT_BASE 0x80200000
fi
#########################################################################################3
# RT6855
#########################################################################################3
if [ "$RT6855_FPGA_BOARD" = "y" -o "$RT6855_ASIC_BOARD" = "y" ]; then
define_bool RT6855_MP y
#-----------------------
# RT6855 GMAC
#-----------------------
choice 'Port 5 Connect to' "None P5_MAC_TO_NONE_MODE \
Giga_Phy(RGMII) P5_MAC_TO_PHY_MODE \
Giga_SW/iNIC(RGMII) P5_RGMII_TO_MAC_MODE \
External_CPU(MII_RvMII) P5_MII_TO_MAC_MODE \
External_CPU(RvMII_MII) P5_RMII_TO_MAC_MODE
" None
if [ "$P5_MAC_TO_PHY_MODE" = "y" ]; then
hex "GigaPHY address for Auto Polling" MAC_TO_GIGAPHY_MODE_ADDR 0x1f
fi
if [ "$P5_RGMII_TO_MAC_MODE" = "y" ]; then
define_bool GPIOx_RESET_MODE y
fi
#-----------------------
# RT6855 FLASH
#-----------------------
choice 'Flash Type' "NAND ON_BOARD_NAND_FLASH_COMPONENT \
SPI ON_BOARD_SPI_FLASH_COMPONENT
"SPI
if [ "$DUAL_IMAGE_SUPPORT" = "y" ]; then
choice 'Flash Size' "4M ON_BOARD_4M_FLASH_COMPONENT \
8M ON_BOARD_8M_FLASH_COMPONENT \
16M ON_BOARD_16M_FLASH_COMPONENT
" 4M
fi
#-----------------------
# RT6855 DRAM
#-----------------------
choice 'DRAM Type' "SDR ON_BOARD_SDR \
DDR1 ON_BOARD_DDR1 \
DDR2 ON_BOARD_DDR2
"SDR
if [ "$ON_BOARD_SDR" = "y" ]; then
choice 'DRAM Component' "64Mb ON_BOARD_64M_DRAM_COMPONENT \
128Mb ON_BOARD_128M_DRAM_COMPONENT \
256Mb ON_BOARD_256M_DRAM_COMPONENT \
512Mb ON_BOARD_512M_DRAM_COMPONENT
" 128Mb
else
choice 'DDR Component' "256Mb ON_BOARD_256M_DRAM_COMPONENT \
512Mb ON_BOARD_512M_DRAM_COMPONENT \
1024Mb ON_BOARD_1024M_DRAM_COMPONENT
" 512Mb
choice 'DDR Width' "8bits ON_BOARD_DDR_WIDTH_8 \
16bits ON_BOARD_DDR_WIDTH_16
" 16bits
fi
define_bool ON_BOARD_16BIT_DRAM_BUS y
#-----------------------
# RT6855 Option
#-----------------------
comment ""
if [ "$ON_BOARD_SPI_FLASH_COMPONENT" == "y" ]; then
choice 'Ram/Rom version' "RAM UBOOT_RAM \
ROM UBOOT_ROM
" ROM
#choice 'Small Uboot/Config partition' "Normal_Partition_5_sectors NORMAL_UBOOT_PARTITION \
# Small_Partition_3_sectors SMALL_UBOOT_PARTITION
# " Normal_Partition_5_sectors
else
define_bool UBOOT_RAM y
fi
bool "Dual Image" DUAL_IMAGE_SUPPORT
bool "Partition LAN/WAN" LAN_WAN_PARTITION
if [ "$LAN_WAN_PARTITION" = "y" ]; then
choice 'LAN/WAN Board Layout' "W/LLLL RALINK_DEMO_BOARD_PVLAN \
LLLL/W RALINK_EV_BOARD_PVLAN
"
fi
bool "Static DRAM Parameter" DRAM_PARAMETERS
if [ "$DRAM_PARAMETERS" = "y" ]; then
if [ "$ON_BOARD_SDR" = "y" ]; then
hex " SDRAM_CFG0" DRAM_CFG0 0
hex " SDRAM_CFG1" DRAM_CFG1 0
else
hex " SYSCFG1(hex)" DRAM_CFG0 26
hex " DDR_CFG3_ODT(hex)" DRAM_CFG1 2
fi
fi
bool "CPU PLL adjustment" CPU_PLL_PARAMETERS
if [ "$CPU_PLL_PARAMETERS" = "y" ]; then
hex " CPU PLL ADJUSTMENT " CPUPLLCFG 0
fi
if [ "$UBOOT_RAM" = "y" ]; then
define_hex TEXT_BASE 0x80200000
else
define_hex TEXT_BASE 0xBC000000
fi
fi
#########################################################################################3
# RT6855A
#########################################################################################3
if [ "$RT6855A_FPGA_BOARD" = "y" -o "$RT6855A_ASIC_BOARD" = "y" ]; then
define_bool RT6855A_MP y
#-----------------------
# RT6855A GMAC
#-----------------------
choice 'Port 5 Connect to' "None P5_MAC_TO_NONE_MODE \
Giga_Phy(RGMII) P5_MAC_TO_PHY_MODE \
Giga_SW/iNIC(RGMII) P5_RGMII_TO_MAC_MODE \
External_CPU(MII_RvMII) P5_MII_TO_MAC_MODE \
External_CPU(RvMII_MII) P5_RMII_TO_MAC_MODE
" None
if [ "$P5_MAC_TO_PHY_MODE" = "y" ]; then
hex "GigaPHY address for Auto Polling" MAC_TO_GIGAPHY_MODE_ADDR 0x5
fi
if [ "$P5_RGMII_TO_MAC_MODE" = "y" ]; then
define_bool GPIOx_RESET_MODE y
fi
#-----------------------
# RT6855A FLASH
#-----------------------
choice 'Flash Type' "NAND ON_BOARD_NAND_FLASH_COMPONENT \
SPI ON_BOARD_SPI_FLASH_COMPONENT
"SPI
#-----------------------
# RT6855A DRAM
#-----------------------
choice 'DRAM Type' "SDR ON_BOARD_SDR \
DDR1 ON_BOARD_DDR1 \
DDR2 ON_BOARD_DDR2
"SDR
if [ "$ON_BOARD_SDR" = "y" ]; then
choice 'DRAM Component' "16Mb ON_BOARD_16M_DRAM_COMPONENT \
64Mb ON_BOARD_64M_DRAM_COMPONENT \
128Mb ON_BOARD_128M_DRAM_COMPONENT \
256Mb ON_BOARD_256M_DRAM_COMPONENT
"128Mb
else
if [ "$ON_BOARD_DDR1" = "y" ]; then
choice 'DDR Component' "64Mb ON_BOARD_64M_DRAM_COMPONENT \
128Mb ON_BOARD_128M_DRAM_COMPONENT \
256Mb ON_BOARD_256M_DRAM_COMPONENT \
512Mb ON_BOARD_512M_DRAM_COMPONENT
"256Mb
else
if [ "$ON_BOARD_DDR2" = "y" ]; then
choice 'DDR Component' "256Mb ON_BOARD_256M_DRAM_COMPONENT \
512Mb ON_BOARD_512M_DRAM_COMPONENT \
1024Mb ON_BOARD_1024M_DRAM_COMPONENT \
2048Mb ON_BOARD_2048M_DRAM_COMPONENT
"512Mb
fi
fi
define_bool ON_BOARD_DDR_WIDTH_16 y
fi
define_bool ON_BOARD_16BIT_DRAM_BUS y
#-----------------------
# RT6855A Option
#-----------------------
comment ""
if [ "$ON_BOARD_SPI_FLASH_COMPONENT" == "y" ]; then
#choice 'Ram/Rom version' "RAM UBOOT_RAM \
# ROM UBOOT_ROM
# " ROM
#choice 'Small Uboot/Config partition' "Normal_Partition_5_sectors NORMAL_UBOOT_PARTITION \
# Small_Partition_3_sectors SMALL_UBOOT_PARTITION
# " Normal_Partition_5_sectors
define_bool UBOOT_ROM y
define_bool UBOOT_RAM n
else
define_bool UBOOT_ROM n
define_bool UBOOT_RAM y
fi
bool "Partition LAN/WAN" LAN_WAN_PARTITION
if [ "$LAN_WAN_PARTITION" = "y" ]; then
choice 'LAN/WAN Board Layout' "W/LLLL RALINK_DEMO_BOARD_PVLAN \
LLLL/W RALINK_EV_BOARD_PVLAN
"
fi
bool "Dual Image" DUAL_IMAGE_SUPPORT
if [ "$ON_BOARD_NAND_FLASH_COMPONENT" = "y" ]; then
bool "Static DRAM Parameter" DRAM_PARAMETERS
if [ "$DRAM_PARAMETERS" = "y" ]; then
if [ "$ON_BOARD_SDR" = "y" ]; then
hex " SDRAM_CFG0" DRAM_CFG0 11925282
hex " SDRAM_CFG1" DRAM_CFG1 8011088B
else
if [ "$ON_BOARD_DDR1" = "y" ]; then
hex " DDR_CFG0" DRAM_CFG0 352A2E34
hex " DDR_CFG1" DRAM_CFG1 202A2424
hex " DDR_CFG2" DDR_CFG2_SETTING 33
hex " DDR_CFG3" DDR_CFG3_SETTING 0
hex " DDR_CFG4" DDR_CFG4_SETTING 0
hex " DRAM_PAD_SETTING" DRAM_PAD_SETTING 00094054
else
if [ "$ON_BOARD_DDR2" = "y" ]; then
hex " DDR_CFG0" DRAM_CFG0 35A3238D
hex " DDR_CFG1" DRAM_CFG1 22322424
hex " DDR_CFG2" DDR_CFG2_SETTING 40000E43
hex " DDR_CFG3" DDR_CFG3_SETTING 10000400
hex " DDR_CFG4" DDR_CFG4_SETTING 0010080C
hex " DRAM_PAD_SETTING" DRAM_PAD_SETTING 00094054
fi
fi
fi
fi
fi
if [ "$UBOOT_RAM" = "y" ]; then
define_hex TEXT_BASE 0xa0200000
else
define_hex TEXT_BASE 0xBFC00000
fi
fi
#########################################################################################3
# MT7620
#########################################################################################3
if [ "$MT7620_FPGA_BOARD" = "y" -o "$MT7620_ASIC_BOARD" = "y" ]; then
define_bool MT7620_MP y
#-----------------------
# MT7620 GMAC
#-----------------------
choice 'Port 5 Connect to' "None P5_MAC_TO_NONE_MODE \
Giga_Phy(RGMII) P5_MAC_TO_PHY_MODE \
Giga_SW/iNIC(RGMII) P5_RGMII_TO_MAC_MODE \
External_CPU(MII_RvMII) P5_MII_TO_MAC_MODE \
External_CPU(RvMII_MII) P5_RMII_TO_MAC_MODE
" None
if [ "$P5_MAC_TO_PHY_MODE" = "y" ]; then
hex "GigaPHY address for Auto Polling" MAC_TO_GIGAPHY_MODE_ADDR 0x5
fi
if [ "$P5_RGMII_TO_MAC_MODE" = "y" ]; then
define_bool GPIOx_RESET_MODE y
fi
choice 'Port 4 Connect to' "None P4_MAC_TO_NONE_MODE \
Giga_Phy(RGMII) P4_MAC_TO_PHY_MODE \
Giga_SW/iNIC(RGMII) P4_RGMII_TO_MAC_MODE \
External_CPU(MII_RvMII) P4_MII_TO_MAC_MODE \
External_CPU(RvMII_MII) P4_RMII_TO_MAC_MODE
" None
if [ "$P4_MAC_TO_PHY_MODE" = "y" ]; then
hex "GigaPHY address for Auto Polling" MAC_TO_GIGAPHY_MODE_ADDR2 0x4
fi
#-----------------------
# MT7620 FLASH
#-----------------------
choice 'Flash Type' "NAND ON_BOARD_NAND_FLASH_COMPONENT \
SPI ON_BOARD_SPI_FLASH_COMPONENT
"SPI
if [ "$DUAL_IMAGE_SUPPORT" = "y" ]; then
choice 'Flash Size' "4M ON_BOARD_4M_FLASH_COMPONENT \
8M ON_BOARD_8M_FLASH_COMPONENT \
16M ON_BOARD_16M_FLASH_COMPONENT
" 4M
fi
#-----------------------
# MT7620 DRAM
#-----------------------
choice 'DRAM Type' "SDR ON_BOARD_SDR \
DDR1 ON_BOARD_DDR1 \
DDR2 ON_BOARD_DDR2
"SDR
if [ "$ON_BOARD_SDR" = "y" ]; then
choice 'DRAM Component' "64Mb ON_BOARD_64M_DRAM_COMPONENT \
128Mb ON_BOARD_128M_DRAM_COMPONENT \
256Mb ON_BOARD_256M_DRAM_COMPONENT \
512Mb ON_BOARD_512M_DRAM_COMPONENT
" 128Mb
else
if [ "$ON_BOARD_DDR1" = "y" ]; then
choice 'DDR Component' "128Mb ON_BOARD_128M_DRAM_COMPONENT \
256Mb ON_BOARD_256M_DRAM_COMPONENT \
512Mb ON_BOARD_512M_DRAM_COMPONENT \
1024Mb ON_BOARD_1024M_DRAM_COMPONENT
" 256Mb
else
if [ "$ON_BOARD_DDR2" = "y" ]; then
choice 'DDR Component' "256Mb ON_BOARD_256M_DRAM_COMPONENT \
512Mb ON_BOARD_512M_DRAM_COMPONENT \
1024Mb ON_BOARD_1024M_DRAM_COMPONENT \
2048Mb ON_BOARD_2048M_DRAM_COMPONENT
" 512Mb
fi
fi
fi
if [ "$ON_BOARD_DDR1" = "y" -o "$ON_BOARD_DDR2" = "y" ]; then
choice 'DDR Width' "8bits ON_BOARD_DDR_WIDTH_8 \
16bits ON_BOARD_DDR_WIDTH_16
" 16bits
fi
define_bool ON_BOARD_16BIT_DRAM_BUS y
#-----------------------
# MT7620 Option
#-----------------------
comment ""
define_bool PDMA_NEW y
define_bool RX_SCATTER_GATTER_DMA y
if [ "$ON_BOARD_SPI_FLASH_COMPONENT" == "y" ]; then
choice 'Ram/Rom version' "RAM UBOOT_RAM \
ROM UBOOT_ROM
" ROM
#choice 'Small Uboot/Config partition' "Normal_Partition_5_sectors NORMAL_UBOOT_PARTITION \
# Small_Partition_3_sectors SMALL_UBOOT_PARTITION
# " Normal_Partition_5_sectors
else
define_bool UBOOT_RAM y
fi
#
# Enable(uncomment) following line to enable the adjustment for CPU PLL settings in menuconfig,
# and then input: make mrproper;make menuconfig
#define_bool MT7620_CPU_PLL_PARAMETERS y
if [ "$MT7620_CPU_PLL_PARAMETERS" = "y" ]; then
if [ "$ON_BOARD_SDR" = "y" ]; then
choice 'CPU PLL source' "None CPLL_NONE \
AUX0 CPLL_FROM_480MHZ \
AUX1 CPLL_FROM_XTAL \
CONF CPLL_FROM_CONF
" None
else
choice 'CPU PLL source' "None CPLL_NONE \
AUX0 CPLL_FROM_480MHZ \
AUX1 CPLL_FROM_XTAL \
CONF CPLL_FROM_CONF
" CONF
fi
if [ "$CPLL_NONE" = "n" ]; then
define_hex CPU_PLL_PARAMETERS 1
fi
if [ "$CPLL_FROM_CONF" = "y" ]; then
choice ' PLL_MULTI_RATIO conf' "24 MT7620_PLL_MULTI_RATIO_24 \
25 MT7620_PLL_MULTI_RATIO_25 \
26 MT7620_PLL_MULTI_RATIO_26 \
27 MT7620_PLL_MULTI_RATIO_27 \
28 MT7620_PLL_MULTI_RATIO_28 \
29 MT7620_PLL_MULTI_RATIO_29 \
30 MT7620_PLL_MULTI_RATIO_30 \
" 29
if [ "$MT7620_PLL_MULTI_RATIO_24" = "y" ]; then
define_hex CPLL_MULTI_RATIO_CFG 0
fi
if [ "$MT7620_PLL_MULTI_RATIO_25" = "y" ]; then
define_hex CPLL_MULTI_RATIO_CFG 1
fi
if [ "$MT7620_PLL_MULTI_RATIO_26" = "y" ]; then
define_hex CPLL_MULTI_RATIO_CFG 2
fi
if [ "$MT7620_PLL_MULTI_RATIO_27" = "y" ]; then
define_hex CPLL_MULTI_RATIO_CFG 3
fi
if [ "$MT7620_PLL_MULTI_RATIO_28" = "y" ]; then
define_hex CPLL_MULTI_RATIO_CFG 4
fi
if [ "$MT7620_PLL_MULTI_RATIO_29" = "y" ]; then
define_hex CPLL_MULTI_RATIO_CFG 5
fi
if [ "$MT7620_PLL_MULTI_RATIO_30" = "y" ]; then
define_hex CPLL_MULTI_RATIO_CFG 6
fi
choice ' PLL_DIV_RATIO conf' "2 MT7620_PLL_DIV_RATIO_2 \
3 MT7620_PLL_DIV_RATIO_3 \
4 MT7620_PLL_DIV_RATIO_4 \
" 2
if [ "$MT7620_PLL_DIV_RATIO_2" = "y" ]; then
define_hex CPLL_DIV_RATIO_CFG 0
fi
if [ "$MT7620_PLL_DIV_RATIO_3" = "y" ]; then
define_hex CPLL_DIV_RATIO_CFG 1
fi
if [ "$MT7620_PLL_DIV_RATIO_4" = "y" ]; then
define_hex CPLL_DIV_RATIO_CFG 2
fi
#hex " SSC conf (CPLL_CFG0[4:9])" CPLL_SSC_CFG 0x7
define_hex CPLL_SSC_CFG 0x7