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0-width I/Os in VCS backend #180

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jwright6323 opened this issue Nov 22, 2017 · 0 comments
Open

0-width I/Os in VCS backend #180

jwright6323 opened this issue Nov 22, 2017 · 0 comments

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@jwright6323
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0-width wires in the top-level I/O are correctly removed in the verilator cpp test harness, but are included in the verilog test harness used by VCS:

  reg[-1:0] io_dlev_override = 0;                                                                                                                                               
  wire[-1:0] io_dlev_override_delay;

This causes VCS compilation to fail because the module instantiation is missing these 0-width ports, but they are included in the test harness DUT instantiation:

  /*** DUT instantiation ***/                                                                                                                                                   
  TransceiverSubsystem TransceiverSubsystem(
    .clock(clock),
    .reset(reset),
    .io_dlev_override(io_dlev_override_delay), // non-existent
    .io_dlev_dac_override(io_dlev_dac_override_delay), // non-existent
    .io_dfe_override(io_dfe_override_delay), // non-existent
    .io_cdr_override(io_cdr_override_delay), // non-existent
    .io_cdrp_override(io_cdrp_override_delay), // non-existent
    .io_cdri_override(io_cdri_override_delay), //non-existent
    .io_data_tx(io_data_tx_delay),
    .io_async_reset_in(io_async_reset_in_delay),
    .io_clock_ref(io_clock_ref_delay),
    .io_bias(io_bias_delay),
    .io_data_rx(io_data_rx_delay),
    .io_data_dlev(io_data_dlev_delay),
    .io_tx_n(io_tx_n_delay),
    .io_tx_p(io_tx_p_delay),
    .io_rx_n(io_rx_n_delay),
    .io_rx_p(io_rx_p_delay),
    .io_reset_out(io_reset_out_delay),
    .io_clock_digital(io_clock_digital_delay)  );

Module definition:

module TransceiverSubsystem(
  input         clock,
  input         reset,
  input         io_clock_ref,
  output        io_clock_digital,
  input         io_async_reset_in,
  output        io_reset_out,
  inout         io_rx_p,
  inout         io_rx_n,
  inout         io_tx_p,
  inout         io_tx_n,
  output [15:0] io_data_dlev,
  output [15:0] io_data_rx,
  input  [15:0] io_data_tx,
  inout         io_bias
);
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