Skip to content

Commit fad6a22

Browse files
tq-niebelmgregkh
tq-niebelm
authored and
gregkh
committed
arm64: dts: imx8mp-tqma8mpql: fix LDO5 power off
[ Upstream commit 5245dc5 ] Fix SD card removal caused by automatic LDO5 power off after boot: LDO5: disabling mmc1: card 59b4 removed EXT4-fs (mmcblk1p2): shut down requested (2) Aborting journal on device mmcblk1p2-8. JBD2: I/O error when updating journal superblock for mmcblk1p2-8. To prevent this, add vqmmc regulator for USDHC, using a GPIO-controlled regulator that is supplied by LDO5. Since this is implemented on SoM but used on baseboards with SD-card interface, implement the functionality on SoM part and optionally enable it on baseboards if needed. Fixes: 418d1d8 ("arm64: dts: freescale: add initial device tree for TQMa8MPQL with i.MX8MP") Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
1 parent 5d5cc7f commit fad6a22

File tree

3 files changed

+36
-12
lines changed

3 files changed

+36
-12
lines changed

‎arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts‎

Lines changed: 7 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -467,6 +467,10 @@
467467
status = "okay";
468468
};
469469

470+
&reg_usdhc2_vqmmc {
471+
status = "okay";
472+
};
473+
470474
&sai5 {
471475
pinctrl-names = "default";
472476
pinctrl-0 = <&pinctrl_sai5>;
@@ -876,8 +880,7 @@
876880
<MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d2>,
877881
<MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d2>,
878882
<MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d2>,
879-
<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d2>,
880-
<MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0>;
883+
<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d2>;
881884
};
882885

883886
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
@@ -886,8 +889,7 @@
886889
<MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4>,
887890
<MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4>,
888891
<MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4>,
889-
<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4>,
890-
<MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0>;
892+
<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4>;
891893
};
892894

893895
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
@@ -896,8 +898,7 @@
896898
<MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4>,
897899
<MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4>,
898900
<MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4>,
899-
<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4>,
900-
<MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0>;
901+
<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4>;
901902
};
902903

903904
pinctrl_usdhc2_gpio: usdhc2-gpiogrp {

‎arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts‎

Lines changed: 7 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -603,6 +603,10 @@
603603
status = "okay";
604604
};
605605

606+
&reg_usdhc2_vqmmc {
607+
status = "okay";
608+
};
609+
606610
&sai3 {
607611
pinctrl-names = "default";
608612
pinctrl-0 = <&pinctrl_sai3>;
@@ -982,8 +986,7 @@
982986
<MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d2>,
983987
<MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d2>,
984988
<MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d2>,
985-
<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d2>,
986-
<MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0>;
989+
<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d2>;
987990
};
988991

989992
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
@@ -992,8 +995,7 @@
992995
<MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4>,
993996
<MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4>,
994997
<MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4>,
995-
<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4>,
996-
<MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0>;
998+
<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4>;
997999
};
9981000

9991001
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
@@ -1002,8 +1004,7 @@
10021004
<MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4>,
10031005
<MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4>,
10041006
<MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4>,
1005-
<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4>,
1006-
<MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0>;
1007+
<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4>;
10071008
};
10081009

10091010
pinctrl_usdhc2_gpio: usdhc2-gpiogrp {

‎arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql.dtsi‎

Lines changed: 22 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -24,6 +24,20 @@
2424
regulator-max-microvolt = <3300000>;
2525
regulator-always-on;
2626
};
27+
28+
reg_usdhc2_vqmmc: regulator-usdhc2-vqmmc {
29+
compatible = "regulator-gpio";
30+
pinctrl-names = "default";
31+
pinctrl-0 = <&pinctrl_reg_usdhc2_vqmmc>;
32+
regulator-name = "V_SD2";
33+
regulator-min-microvolt = <1800000>;
34+
regulator-max-microvolt = <3300000>;
35+
gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
36+
states = <1800000 0x1>,
37+
<3300000 0x0>;
38+
vin-supply = <&ldo5_reg>;
39+
status = "disabled";
40+
};
2741
};
2842

2943
&A53_0 {
@@ -180,6 +194,10 @@
180194
};
181195
};
182196

197+
&usdhc2 {
198+
vqmmc-supply = <&reg_usdhc2_vqmmc>;
199+
};
200+
183201
&usdhc3 {
184202
pinctrl-names = "default", "state_100mhz", "state_200mhz";
185203
pinctrl-0 = <&pinctrl_usdhc3>;
@@ -229,6 +247,10 @@
229247
fsl,pins = <MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x10>;
230248
};
231249

250+
pinctrl_reg_usdhc2_vqmmc: regusdhc2vqmmcgrp {
251+
fsl,pins = <MX8MP_IOMUXC_GPIO1_IO04__GPIO1_IO04 0xc0>;
252+
};
253+
232254
pinctrl_usdhc3: usdhc3grp {
233255
fsl,pins = <MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194>,
234256
<MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4>,

0 commit comments

Comments
 (0)