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Instruction register and predecode #1

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Kurumiiw opened this issue Feb 22, 2022 · 0 comments · May be fixed by #2

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Kurumiiw commented Feb 22, 2022 •

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Module for the instruction register and predecode part of the processor.
NOTE

These two modules are two different blocks on the schematic by Breaknes - the reason for their combination here is for simplicity; their functionality are intertwined, to an extent that they may as well be the same module.

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Instruction register and predecode #2

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Kurumiiw linked a pull request

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Instruction register and predecode #2

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Kurumiiw added the schematic label

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