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Playground & Experimenting.html
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<!DOCTYPE html>
<html>
<head>
<link rel="Stylesheet" type="text/css" href="style.css">
<title>Playground %title% Experimenting</title>
<meta http-equiv="Content-Type" content="text/html; charset=utf-8">
</head>
<body>
<div id="Assembler"><h2 id="Assembler" class="header"><a href="#Assembler">Assembler</a></h2></div>
<p>
llvm-mc -assemble -arch=hexagon -debug main.s > log 2>&1
</p>
<blockquote>
Show debug output <br>
Must be using debug build otherwise -debug flag wil be ignored
</blockquote>
<p>
llc --asm-show-inst main.ll
</p>
<blockquote>
Emit internal instruction representation to assembly file
</blockquote>
<pre asm>
{
call printf
} // <MCInst #17 BUNDLE
// <MCOperand Imm:0>
// <MCOperand Inst:(<MCInst 1145 <MCOperand Expr:(printf)>>)>>
</pre>
<p>
echo "r0 = #14" | llvm-mc -arch=hexagon -show-encoding -show-inst
</p>
<blockquote>
Show instruction encodings <br>
Show internal instruction representation
</blockquote>
<pre asm>
.text
{
r0 = #14
} // encoding: [0xc0,0xc1,0x00,0x78]
// <MCInst #17 BUNDLE
// <MCOperand Imm:0>
// <MCOperand Inst:(<MCInst 854 <MCOperand Reg:83> <MCOperand Expr:(14)>>)>>
</pre>
<div id="Other"><h2 id="Other" class="header"><a href="#Other">Other</a></h2></div>
<p>
clang --target=hexagon -emit-llvm -c main.c generates IR bitcode file.
</p>
<p>
clang --target=hexagon -S -emit-llvm -c main.c generates IR code.
</p>
<p>
clang --target=hexagon -S main.c generates Hexagon assembly code.
</p>
<p>
llc -march=Hexagon -debug-pass=Structure *.bc shows the code generation
sequence.
</p>
<p>
Hexagon instruction are categorized into classes to determine what combinations
of instructions can be written in parallel
</p>
<p>
.td files define the transformation for llvm IR and the machine instructions of
their CPUs
</p>
<p>
In HexagonRegisterinfo.td the HexagonReg class is defined with 5 bits to
represent number so matches with 32 registers in the architecture
</p>
</body>
</html>