@@ -615,13 +615,28 @@ void log_print_buf(const uint8_t *b, size_t len){
615615 */
616616unsigned long uartBaudrateDetect (uart_t * uart , bool flg )
617617{
618- #ifndef CONFIG_IDF_TARGET_ESP32S3
618+
619619 if (uart == NULL ) {
620620 return 0 ;
621621 }
622622
623623 uart_dev_t * hw = UART_LL_GET_HW (uart -> num );
624624
625+ #ifdef CONFIG_IDF_TARGET_ESP32S3
626+
627+ while (hw -> rxd_cnt .rxd_edge_cnt < 30 ) { // UART_PULSE_NUM(uart_num)
628+ if (flg ) return 0 ;
629+ ets_delay_us (1000 );
630+ }
631+
632+ UART_MUTEX_LOCK ();
633+ //log_i("lowpulse_min_cnt = %d hightpulse_min_cnt = %d", hw->lowpulse.min_cnt, hw->highpulse.min_cnt);
634+ unsigned long ret = (hw -> lowpulse .lowpulse_min_cnt + hw -> highpulse .highpulse_min_cnt + 2 ) / 2 ;
635+ UART_MUTEX_UNLOCK ();
636+
637+ return ret ;
638+
639+ #else
625640 while (hw -> rxd_cnt .edge_cnt < 30 ) { // UART_PULSE_NUM(uart_num)
626641 if (flg ) return 0 ;
627642 ets_delay_us (1000 );
@@ -633,8 +648,7 @@ unsigned long uartBaudrateDetect(uart_t *uart, bool flg)
633648 UART_MUTEX_UNLOCK ();
634649
635650 return ret ;
636- #else
637- return 0 ;
651+
638652#endif
639653}
640654
@@ -679,6 +693,11 @@ void uartStartDetectBaudrate(uart_t *uart) {
679693 //hw->conf0.autobaud_en = 0;
680694 //hw->conf0.autobaud_en = 1;
681695#elif CONFIG_IDF_TARGET_ESP32S3
696+ uart_dev_t * hw = UART_LL_GET_HW (uart -> num );
697+ hw -> rx_filt .glitch_filt = 0x08 ;
698+ hw -> rx_filt .glitch_filt_en = 1 ;
699+ hw -> conf0 .autobaud_en = 0 ;
700+ hw -> conf0 .autobaud_en = 1 ;
682701#else
683702 uart_dev_t * hw = UART_LL_GET_HW (uart -> num );
684703 hw -> auto_baud .glitch_filt = 0x08 ;
@@ -707,23 +726,54 @@ uartDetectBaudrate(uart_t *uart)
707726 if (!divisor ) {
708727 return 0 ;
709728 }
729+
710730 // log_i(...) below has been used to check C3 baud rate detection results
711731 //log_i("Divisor = %d\n", divisor);
712732 //log_i("BAUD RATE based on Positive Pulse %d\n", getApbFrequency()/((hw->pospulse.min_cnt + 1)/2));
713733 //log_i("BAUD RATE based on Negative Pulse %d\n", getApbFrequency()/((hw->negpulse.min_cnt + 1)/2));
714734
715-
716- #ifdef CONFIG_IDF_TARGET_ESP32C3
717- //hw->conf0.autobaud_en = 0;
718- #elif CONFIG_IDF_TARGET_ESP32S3
719- #else
720735 uart_dev_t * hw = UART_LL_GET_HW (uart -> num );
721- hw -> auto_baud .en = 0 ;
722- #endif
736+
723737 uartStateDetectingBaudrate = false; // Initialize for the next round
738+ unsigned long baudrate = 0 ;
739+
740+
741+ #ifdef CONFIG_IDF_TARGET_ESP32S3
742+ hw -> conf0 .autobaud_en = 0 ;
743+
744+ uart_sclk_t clk_src ;
745+ uart_ll_get_sclk (hw , & clk_src );
746+
747+ switch (clk_src )
748+ {
749+ case UART_SCLK_APB :
750+ baudrate = getApbFrequency () / divisor ;
751+ break ;
752+
753+ #if SOC_UART_SUPPORT_RTC_CLK
754+ case UART_SCLK_RTC :
755+ // baudrate = rtc_clk_slow_freq_get_hz() / divisor;
756+ log_e ("Currently unsupported clock source: UART_SCLK_RTC" );
757+ return 0 ;
758+ #endif
759+
760+ #if SOC_UART_SUPPORT_XTAL_CLK
761+ case UART_SCLK_XTAL :
762+ baudrate = (getXtalFrequencyMhz () * 1000000 ) / divisor ;
763+ break ;
764+ #endif
765+
766+ default :
767+ log_e ("You should not ended up here! Unsupported clock source: %d" , clk_src );
768+ return 0 ;
769+ }
770+
771+ #else
772+ hw -> auto_baud .en = 0 ;
773+ baudrate = getApbFrequency () / divisor ;
774+ //log_i("APB_FREQ = %d\nraw baudrate detected = %d", getApbFrequency(), baudrate);
775+ #endif
724776
725- unsigned long baudrate = getApbFrequency () / divisor ;
726- //log_i("APB_FREQ = %d\nraw baudrate detected = %d", getApbFrequency(), baudrate);
727777
728778 static const unsigned long default_rates [] = {300 , 600 , 1200 , 2400 , 4800 , 9600 , 19200 , 38400 , 57600 , 74880 , 115200 , 230400 , 256000 , 460800 , 921600 , 1843200 , 3686400 };
729779
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