raltool-cfg.yaml

transforms:
  # Transform device names, keeping the RAL convention.
  - Rename:
      from: Mimxrt1011
      to: imxrt1011
  - Rename:
      from: Mimxrt1015
      to: imxrt1015
  - Rename:
      from: Mimxrt1021
      to: imxrt1021
  - Rename:
      from: Mimxrt1051
      to: imxrt1051
  - Rename:
      from: Mimxrt1052
      to: imxrt1052
  - Rename:
      from: Mimxrt1061
      to: imxrt1061
  - Rename:
      from: Mimxrt1062
      to: imxrt1062
  - Rename:
      from: Mimxrt1064
      to: imxrt1064
  - Rename:
      from: Mimxrt1176Cm7
      to: imxrt1176_cm7
  - Rename:
      from: Mimxrt1176Cm4
      to: imxrt1176_cm4
  - Rename:
      from: Mimxrt1189Cm33
      to: imxrt1189_cm33
  - Rename:
      from: Mimxrt1189Cm7
      to: imxrt1189_cm7
  - Rename:
      from: pit::Pit1
      to: pit::Pit
  - Rename:
      from: usb::Usb1
      to: usb::Usb
  - DeleteEnums:
      from: usb::vals::Fs2
  # Combine GPT OCR and ICR registrers for 10xx MCUs.
  # This allows it to match the 11xx MCUs, and reduce
  # code bloat.
  - MakeRegisterArray:
      blocks: gpt::Gpt(\d)
      from: OCR(\d)
      to: OCR
  - MakeRegisterArray:
      blocks: gpt::Gpt(\d)
      from: ICR(\d)
      to: ICR
  # Drop select enums from GPT fields. These extra enums
  # are present in 11xx SVDs and prevent the tool from
  # combining with the 10xx GPT definition.
  - DeleteEnums:
      from: gpt::vals::Im(\d)
  - DeleteEnums:
      from: gpt::vals::Om(\d)
  - DeleteEnums:
      from: gpt::vals::Fo(\d)
  - DeleteEnums:
      from: gpt::vals::Sr(\d)
  - DeleteEnums:
      from: gpt::vals::Of(\d)
  - DeleteEnums:
      from: gpt::vals::If(\d)
  - DeleteEnums:
      from: gpt::vals::Of(\d)ie
  - DeleteEnums:
      from: gpt::vals::If(\d)ie
  # Move the CAN wrapper instance number to the far right
  # so it's properly parsed.
  - Rename:
      from: CAN(\d)_WRAPPER
      to: CAN_WRAPPER$1
  # This resembles a XECC_FLEXSPI peripheral.
  # It consolidates when there's a number at the end.
  - Rename:
      from: XECC_SEMC
      to: XECC_SEMC0
  # This peripheral is tricky to support.
  #
  # - It has clusters in clusters. While we can generate code for this,
  #   we can't easily add macro support for this.
  # - It has clusters that alias each other. This is trickier to support
  #   in today's codegen tool, so we're punting.
  - Delete:
      from: caam::Caam
  # 1176 CM7 has GPIO blocks under a "cm7_gpio" module. Change this
  # so that they're under a "gpio" module. Also, rename the block so
  # that it matches the 10xx GPIO block name, and can be combined.
  - Rename:
      from: cm7_gpio::Cm7Gpio2
      to: gpio::Gpio1
  # Same goes for the 1176 CM4: rename for combining.
  - Rename:
      from: gpio::Gpio2
      to: gpio::Gpio1
  # Change the fast GPIO numbers on the 1176 CM7 so that they have a
  # unique instance number. Add 10 to make it distinct. This is faily hacky,
  # so TODO make this better.
  - Rename:
      from: CM7_GPIO2
      to: FAST_GPIO20
  - Rename:
      from: CM7_GPIO3
      to: FAST_GPIO30
  # Similar number suffixes result in duplicate instance types. Define unique
  # numbers (that are a bit less hacky, maybe).
  - Rename:
      from: PGMC_CPC0_MIF0
      to: PGMC_CPC_MIF00
  - Rename:
      from: PGMC_CPC0_MIF1
      to: PGMC_CPC_MIF01
  - Rename:
      from: PGMC_CPC1_MIF0
      to: PGMC_CPC_MIF10
  - Rename:
      from: PGMC_CPC1_MIF1
      to: PGMC_CPC_MIF11
  # 1176 LPSPI has fewer enums which prevent combining. Remove them from
  # the 10xx variants. They're simple, intuitive bool fields, so it's no
  # bit deal to remove.
  - DeleteEnums:
      from: lpspi::vals::Hren
  - DeleteEnums:
      from: lpspi::vals::Hrpol
  - DeleteEnums:
      from: lpspi::vals::Hrsel
  - DeleteEnums:
      from: lpspi::vals::Pcspol
  # The 1189 has two DMA peripherals. Avoid collision when unifying with 10xx
  # names.
  - Delete:
      from: dma3::Dma3
  # DMA and DMAMUX are suffixed with numbers on the 1176, since each core
  # has its own instance. They're also suffixed on 10xx chips, even though
  # there's just one instnace. Rename them so that the names are the same across
  # all chips.
  - Rename:
      from: dma(\d)::Dma(\d)
      to: dma::Dma
  - Rename:
      from: DMA(\d)
      to: DMA
  - Rename:
      from: dmamux(\d)::Dmamux(\d)
      to: dmamux::Dmamux
  - Rename:
      from: DMAMUX(\d)
      to: DMAMUX
  - RenameRegisters:
      block: ocotp::Ocotp
      from: HW_OCOTP_(.*)
      to: $1
  # Field is needlessly named 'AM1F' on the 1176.
  # All 1000-series use AM1IE. The field meaning
  # is the same regardless, and this lets us combine
  # the LPI2C blocks.
  - RenameFields:
      fieldset: lpi2c::regs::Sier
      from: AM1F
      to: AM1IE
  - RenameFields:
      fieldset: src::regs::Srsr
      from: LOCKUP
      to: LOCKUP_SYSRESETREQ
  # Groups of 1189 peripherals that use derivedFrom but with meaningful names
  # instead of plain numbering. raltool only handles the numbered case, so
  # delete them until someone needs them.
  - Delete:
      from: aon_mif_ln28fdsoi_spllram::AonMifLn28fdsoiSpllram
  - Delete:
      from: aon_mif_s28spregh::AonMifS28spregh
  - Delete:
      from: aon_mix_slice::AonMixSlice
  - Delete:
      from: enetc0_revmii_mac::Enetc0RevmiiMac
  - Delete:
      from: enetc0_revmii_phy::Enetc0RevmiiPhy
  - Delete:
      from: ethernet_pll::EthernetPll
  - Delete:
      from: mu2_mua::Mu2Mua
  - Delete:
      from: mu_apps_s3mua::MuAppsS3mua
  - Delete:
      from: sw0_global::Sw0Global
  - Delete:
      from: tstmr2_tstmra::Tstmr2Tstmra
  - Delete:
      from: xcache_pc::XcachePc
  - Delete:
      from: m33_pcf::M33Pcf1
  # Aliased cluster arrays are not supported by raltool at the time of writing.
  - Delete:
      from: ecat::RxErrorCntr
  - Delete:
      from: ecat::ForwardedRxErrorCntr
  - Delete:
      from: ecat::LostLinkCntr
  - Delete:
      from: ecat::Fmmu
  - Delete:
      from: ecat::Syncmanager
  # This one probably just needs some renaming to work.
  - Delete:
      from: mu2_mub::Mu2Mub

# Settings for the combine pass.
combines:
  # By default, the combiner will claim that field's enums are equivalent if their
  # plurality, bit size, and values are the same. It does not consider the enum name.
  # Once they're deemed equivalent, the combiner is allowed to consolidate these enums
  # across all fields and devices. This default behavior lets us consolidate enum variants
  # that are written like "OFF / ON" in one SVD, and "DISABLED / ENABLED" in another SVD.
  # Those variants have the same meaning, so it makes sense to combine these differences.
  #
  # This behavior isn't always appropriate. For example, an IOMUXC field LPSPI1_SCK_SELECT_INPUT
  # on the 1021 might have enum variants named GPIO_SD_B0_02_ALT4 and GPIO_AD_B0_10_ALT1.
  # The same field on the 1011 might have enum variants named GPIO_AD_06_ALT0 and
  # GPIO_SD_08_ALT2 with the same respective values. If the combiner does not check
  # the names, its allowed to replace the 1021 enum variants with the 1011 names. That's
  # confusing and misleading. So in cases where this behavior shouldn't happen, we add
  # those peripherals to this list, and we force the combiner to consider the enum variant
  # names.
  #
  # It's always safe to add to this list. By adding peripherals to this list, you make it harder
  # to develop drivers that work across all MCUs.
  - StrictEnumNames:
    - iomuxc
    - iomuxc_gpr
    - iomuxc_snvs
  - StrictEnumDescs:
    - iomuxc
    - iomuxc_gpr
    - iomuxc_snvs
  # IR paths that should never be combined.
  #
  # These regexes match IR paths. If there's a match, that element is *never* considered for
  # combination by the combiner. When applied to blocks, this is a stronger "never combine"
  # guarantee than StrictEnumNames. In particular, if an IOMUXC block were in this list, this
  # would prevent the 1061 IOMUXC from being combined with the 1062 IOMUXC.
  - NeverCombine:
    - ccm::regs::Ccgr\d+
  # Force these peripheral blocks to become the common representation for all MCUs.
  - ForceCommonBlock:
    # The 1180 supports these three LP* peripherals with additional registers. The combiner
    # doesn't like those extra registers, so it doesn't treat them as equivalent. The LP*
    # blocks on the 1000 and 1170 series represent the minimal support for these peripherals,
    # so it should be safe to use this minimal subset on the 1180.
    - block: lpuart::Lpuart1
      mcu: imxrt1011
    - block: lpspi::Lpspi1
      mcu: imxrt1011
    - block: lpi2c::Lpi2c1
      mcu: imxrt1011
    # The GPTs defined in the 1000 and 1170 SVDs only support four clock sources. The 1180
    # SVD has defined five clock sources. One approach to combining these GPTs would be to remove
    # all enums for the field, since the filed is always the same size. This is faster...
    #
    # Curiously, our imxrt-hal driver assmes there's five clock sources! I designed that driver
    # to one of the reference manuals, which must have had that fifth clock source documented.
    - block: gpt::Gpt1
      mcu: imxrt1011