AES-GCM algorithm was optimized for Intel(R) Microarchitecture Code Named Cascade Lake with Intel(R) AES New Instructions (Intel(R) AES-NI). Crypto Multi-buffer library installation instructions update.

Author: ElenaTyuleneva

BUILD.md

@@ -280,4 +280,4 @@ endif()
 #     `IPPCRYPTO_LIBRARIES` - static library name
 #     `IPPCRYPTO_INCLUDE_DIRS` - path to Intel IPP Cryptography headers
 #     `IPPCRYPTO_ROOT_DIR` - library root dir (a folder with 'include' and 'lib' directories)
-```
+```

CHANGELOG.md

@@ -2,25 +2,29 @@
 
 This is a list of notable changes to Intel(R) IPP Cryptography, in reverse chronological order.
 
+## 2020-06-09
+- AES-GCM algorithm was optimized for Intel(R) Microarchitecture Code Named Cascade Lake with Intel(R) AES New Instructions (Intel(R) AES-NI).
+- Crypto Multi-buffer library installation instructions update.
+
 ## 2020-04-27
-- In the Readme file of the Crypto Multi-buffer Library was added the information about possible fails on the installation step, when the library is installed by default paths.
+- The Readme file of Crypto Multi-buffer Library was updated by information about possible installation fails in specific environment.
 
 ## 2020-04-21
 - Documentation of Crypto Multi-buffer Library was updated.
 - Position Independent Execution (PIE) option was added to Crypto Multi-buffer Library build scripts.
 
 ## 2020-04-19
-- AES-XTS optimization for Ice Lake with vector extensions of Intel(R) AES New Instructions (Intel(R) AES-NI) was improved.
+- AES-XTS optimization for Intel(R) Microarchitecture Code Named Ice Lake with vector extensions of Intel(R) AES New Instructions (Intel(R) AES-NI) was improved.
 - Fixed a build issue that affect build of the Intel(R) IPP Crypto library with MSVC\* compiler on Windows\* OS.
 - Duplicated APIs of HASH, HMAC, MGF, RSA, ECCP functionality were marked as deprecated. For more information see [Deprecation notes](./DEPRECATION_NOTES.md)
 - Added examples demonstrating usage of SMS4-CBC encryption and decryption.
 
 ## 2020-02-25
-- ECB,CBC,CTR modes of SMS4 algorithm were optimized for Ice Lake with average 6x performance improvement.
-- Clang9.0\* for Linux and Clang11.0\* for MacOS support added.
-- RSA multi-buffer Encrypt/Decrypt example added.
-- Added Control-flow Enforcement Technology enabling for NASM\* compiler on Linux and Windows.
-- API of ippsGFpECSignDSA, ippsGFpECSignNR and ippsGFpECSignSM2 functions changed.
+- SM4-ECB, SM4-CBC and SM4-CTR were enabled for Intel(R) Microarchitecture Code Named Ice Lake with Intel(R) Advanced Vector Extensions 512 (Intel(R) AVX-512) GFNI instructions.
+- Added support of Clang 9.0 for Linux and Clang 11.0 for MacOS compilers.
+- Added example of RSA Multi-Buffer Encryption/Decryption usage.
+- The library was enabled with Intel(R) Control-flow Enforcement Technology (CET) on Linux and Windows.
+- Changed API of ippsGFpECSignDSA, ippsGFpECSignNR and ippsGFpECSignSM2 functions: const-ness requirement of private ephemeral keys is removed and now the ephemeral keys are cleaned up after signing.
 
 ## 2019-12-13
 - Removed Android support. Use Linux libraries instead.

README.md

@@ -49,7 +49,7 @@ The library provides a comprehensive set of routines commonly used for cryptogra
 ## Documentation
 
 - [Introduction to Intel IPP Cryptography Library](./OVERVIEW.md)
-- [Introduction to RSA IFMA Library](./sources/ippcp/ifma_rsa_mb/Readme.md)
+- [Introduction to Crypto Multi-buffer Library](./sources/ippcp/crypto_mb/Readme.md)
 - [Intel IPP Cryptography Build Instructions](./BUILD.md)
 - [Intel IPP Release Notes](https://software.intel.com/en-us/articles/intel-ipp-release-notes-and-new-features)
 - [Intel IPP Cryptography Developer Reference](https://software.intel.com/en-us/ipp-crypto-reference)

include/ippcp.h

@@ -90,9 +90,9 @@ endif()
 set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -fpack-struct=16")
 if(${ARCH} MATCHES "ia32")
   # Stack alignment = 16 bytes
-  set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -mpreferred-stack-boundary=4")
+  set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -mstack-alignment=4")
   # 32bit linker command
-  set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -Wa,--32")
+  #set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -Xassembler --32")
   # Tells the compiler to generate code for a specific architecture (32)
   set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -m32")
 endif(${ARCH} MATCHES "ia32")

sources/cmake/linux/Clang9.0.0.cmake

@@ -93,9 +93,7 @@ endif()
 set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -fpack-struct=16")
 if(${ARCH} MATCHES "ia32")
   # Stack alignment = 16 bytes
-  set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -mpreferred-stack-boundary=4")
-  # 32bit linker command
-  set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -Wa,--32")
+  set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -mstack-alignment=4")
   # Tells the compiler to generate code for a specific architecture (32)
   set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -m32")
 endif(${ARCH} MATCHES "ia32")

sources/cmake/macosx/AppleClang11.0.0.cmake

@@ -154,7 +154,8 @@
 IPPAPI(IppStatus, {FunName},{FunArg})
 {{
     __asm( ".L0: mov ippcpJumpIndexForMergedLibs, %eax");
-    __asm( "jmp *(arraddr+4)(,%eax,4)" );
+    __asm( "mov (arraddr+4)(,%eax,4), %eax" );
+    __asm( "jmp *%eax" );
     __asm( ".global in_{FunName}" );
     __asm( "in_{FunName}:" );
     {endbr32}

sources/dispatcher/gen_disp_lin32.nonpic.py

@@ -167,7 +167,8 @@
     __asm( "movd ippcpJumpIndexForMergedLibs@GOT(%eax), %xmm0" );
     __asm( "movd %xmm0, %edx" );
     __asm( "mov (%edx), %edx" );
-    __asm( "jmp *(arraddr@GOTOFF+4)(%eax,%edx,4)" );
+    __asm( "mov (arraddr@GOTOFF+4)(%eax,%edx,4), %edx" );
+    __asm( "jmp *%edx" );
     __asm( ".global in_{FunName}" );
     __asm( "in_{FunName}:" );
     {endbr32}

sources/dispatcher/gen_disp_lin32.py

@@ -101,7 +101,8 @@
     {endbr64}
     movsxd  rax, dword [ippcpJumpIndexForMergedLibs]
     lea     r11, [rel .Larraddr_{FunName}]
-    jmp     qword [r11 + rax*8]
+    mov     r11, qword [r11 + rax*8]
+    jmp     r11
 .LEnd{FunName}:
 """.format(FunName=FunName, endbr64='db 0xf3, 0x0f, 0x1e, 0xfa'))
             ASMDISP.close()
@@ -149,7 +150,8 @@
 {{
     __asm{{
         movsxd rax, dword ptr ippcpJumpIndexForMergedLibs
-        jmp    qword ptr [8*rax+8+arraddr]
+        mov    rax, qword ptr [8*rax+8+arraddr]
+        jmp    rax
     }}
 }}
 

sources/dispatcher/gen_disp_lin64.nonpic.py

@@ -103,7 +103,8 @@
     mov     rax, qword [rel ippcpJumpIndexForMergedLibs wrt ..gotpc]
     movsxd  rax, dword [rax]
     lea     r11, [rel .Larraddr_{FunName}]
-    jmp     qword [r11+rax*8]
+    mov     r11, qword [r11+rax*8]
+    jmp     r11
 .LEnd{FunName}:
 """.format(FunName=FunName, endbr64='db 0xf3, 0x0f, 0x1e, 0xfa'))
             ASMDISP.close()