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-65
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20 files changed

+1315
-65
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‎IGC/AdaptorOCL/UnifyIROCL.cpp‎

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/*========================== begin_copyright_notice ============================
22
3-
Copyright (C) 2017-2024 Intel Corporation
3+
Copyright (C) 2017-2025 Intel Corporation
44
55
SPDX-License-Identifier: MIT
66
@@ -106,6 +106,7 @@ SPDX-License-Identifier: MIT
106106
#include "Compiler/Optimizer/OpenCLPasses/DpasFuncs/DpasFuncsResolution.hpp"
107107
#include "Compiler/Optimizer/OpenCLPasses/LSCFuncs/LSCFuncsResolution.hpp"
108108
#include "Compiler/Optimizer/OpenCLPasses/NamedBarriers/NamedBarriersResolution.hpp"
109+
#include "Compiler/Optimizer/OpenCLPasses/ManageableBarriers/ManageableBarriersResolution.hpp"
109110
#include "Compiler/Optimizer/OpenCLPasses/JointMatrixFuncsResolutionPass/JointMatrixFuncsResolutionPass.h"
110111
#include "Compiler/Optimizer/OpenCLPasses/RayTracing/ResolveOCLRaytracingBuiltins.hpp"
111112
#include "Compiler/Optimizer/OpenCLPasses/AccuracyDecoratedCallsBiFResolution/AccuracyDecoratedCallsBiFResolution.hpp"
@@ -473,6 +474,11 @@ static void CommonOCLBasedPasses(OpenCLProgramContext* pContext)
473474
mpm.add(new PurgeMetaDataUtils());
474475
}
475476

477+
if (ManageableBarriersResolution::HasHWSupport(pContext->platform.getPlatformInfo().eRenderCoreFamily))
478+
{
479+
mpm.add(new ManageableBarriersResolution());
480+
}
481+
476482
// OpenCL WI + image function resolution
477483

478484
// OCLTODO : do another DCE that will get rid of unused WI func calls before this?

‎IGC/BiFModule/Languages/OpenCL/PreRelease/opencl_cth_pre_release.h‎

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2920,3 +2920,11 @@ void intel_rt_sync(rtfence_t fence);
29202920
global void *intel_get_implicit_dispatch_globals();
29212921

29222922
#endif // defined(cl_intel_pvc_rt_validation)
2923+
2924+
typedef __local void manageable_barrier_t;
2925+
manageable_barrier_t* intel_manageable_barrier_init(uint ProducerCount, uint ConsumerCount);
2926+
void intel_manageable_barrier_release(manageable_barrier_t* BData);
2927+
void intel_manageable_barrier_arrive(manageable_barrier_t* BData);
2928+
void intel_manageable_barrier_wait(manageable_barrier_t* BData);
2929+
void intel_manageable_barrier_arrivewait(manageable_barrier_t* BData);
2930+
void intel_manageable_barrier_arrivedrop(manageable_barrier_t* BData);

‎IGC/Compiler/CISACodeGen/EmitVISAPass.cpp‎

Lines changed: 29 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -4601,37 +4601,36 @@ void EmitPass::Mul64(CVariable* dst, CVariable* src[2], SIMDMode simdMode, bool
46014601
m_encoder->Push();
46024602
}
46034603

4604-
static unsigned int getVectorSize(Value *I) {
4604+
static unsigned getVectorSize(Value *I) {
46054605
IGCLLVM::FixedVectorType *VecType =
46064606
llvm::dyn_cast<IGCLLVM::FixedVectorType>(I->getType());
46074607
if (!VecType)
4608-
return 0;
4609-
unsigned int NumElements = VecType->getNumElements();
4608+
IGC_ASSERT_EXIT_MESSAGE(0, "IGC Vectorizer always creates FixedVectors, we do not expect other vector types");
4609+
unsigned NumElements = VecType->getNumElements();
46104610
return NumElements;
46114611
}
46124612

46134613
void EmitPass::FPTrunc(const SSource sources[2], const DstModifier& modifier) {
46144614

46154615
CVariable* src[2];
46164616
src[0] = GetSrcVariable(sources[0]);
4617-
if (IGC_IS_FLAG_ENABLED(EnableVectorEmitter) && sources[0].value->getType()->isVectorTy()) {
4617+
if (IGC_IS_FLAG_ENABLED(EnableVectorEmitter) &&
4618+
sources[0].value->getType()->isVectorTy()) {
46184619

4619-
unsigned int VectorSize = 0;
4620-
if (llvm::isa<Instruction>(sources[0].value))
4621-
VectorSize = getVectorSize(llvm::cast<Instruction>(sources[0].value));
4620+
unsigned VectorSize = getVectorSize(sources[0].value);
46224621

46234622
// float is 4 bytes --> divide by 4
4624-
unsigned int NumberOfFloatsThatFitInRegister = m_currShader->getGRFSize()/4;
4625-
for (unsigned int i = 0; i < VectorSize; ++i) {
4623+
unsigned NumberOfFloatsThatFitInRegister = m_currShader->getGRFSize()/4;
4624+
for (unsigned i = 0; i < VectorSize; ++i) {
46264625

46274626
// this is FPTrunc we move from 32bits to 16 this gives us factor of 2
4628-
unsigned int row = i / 2;
4627+
unsigned row = i / 2;
46294628
// now we can fit twice as many half floats into the same register:
46304629
// .decl vector331 v_type=G type=f num_elts=128 align=wordx32
46314630
// .decl vectorized_cast v_type=G type=hf num_elts=128 align=wordx32
46324631
// mov (M1, 16) vectorized_cast(0,0 <-- this is odd col)<1> vector331(0,0)<1;1,0>
46334632
// mov (M1, 16) vectorized_cast(0,16 <-- this is even col)<1> vector331(1,0)<1;1,0>
4634-
unsigned int col = (i%2) * NumberOfFloatsThatFitInRegister;
4633+
unsigned col = (i%2) * NumberOfFloatsThatFitInRegister;
46354634
SetSourceModifiers(0, sources[0]);
46364635
if (src[0]->IsUniform()) { m_encoder->SetSrcSubReg(0, i); }
46374636
else m_encoder->SetSrcSubVar(0, i);
@@ -4653,13 +4652,13 @@ void EmitPass::Add(const SSource sources[2], const DstModifier& modifier)
46534652
src[i] = GetSrcVariable(sources[i]);
46544653
}
46554654

4656-
if (IGC_IS_FLAG_ENABLED(EnableVectorEmitter) && sources[0].value->getType()->isVectorTy() && sources[1].value->getType()->isVectorTy()) {
4655+
if (IGC_IS_FLAG_ENABLED(EnableVectorEmitter) &&
4656+
sources[0].value->getType()->isVectorTy() &&
4657+
sources[1].value->getType()->isVectorTy()) {
46574658

4658-
unsigned int VectorSize = 0;
4659-
if (llvm::isa<Instruction>(sources[0].value))
4660-
VectorSize = getVectorSize(llvm::cast<Instruction>(sources[0].value));
4659+
unsigned VectorSize = getVectorSize(sources[0].value);
46614660

4662-
for (unsigned int i = 0; i < VectorSize; ++i) {
4661+
for (unsigned i = 0; i < VectorSize; ++i) {
46634662
SetSourceModifiers(0, sources[0]);
46644663
SetSourceModifiers(1, sources[1]);
46654664

@@ -4692,13 +4691,13 @@ void EmitPass::Mul(const SSource sources[2], const DstModifier& modifier)
46924691
src[i] = GetSrcVariable(sources[i]);
46934692
}
46944693

4695-
if (IGC_IS_FLAG_ENABLED(EnableVectorEmitter) && sources[0].value->getType()->isVectorTy() && sources[1].value->getType()->isVectorTy()) {
4694+
if (IGC_IS_FLAG_ENABLED(EnableVectorEmitter) &&
4695+
sources[0].value->getType()->isVectorTy() &&
4696+
sources[1].value->getType()->isVectorTy()) {
46964697

4697-
unsigned int VectorSize = 0;
4698-
if (llvm::isa<Instruction>(sources[0].value))
4699-
VectorSize = getVectorSize(llvm::cast<Instruction>(sources[0].value));
4698+
unsigned VectorSize = getVectorSize(sources[0].value);
47004699

4701-
for (unsigned int i = 0; i < VectorSize; ++i) {
4700+
for (unsigned i = 0; i < VectorSize; ++i) {
47024701
SetSourceModifiers(0, sources[0]);
47034702
SetSourceModifiers(1, sources[1]);
47044703

@@ -4749,13 +4748,13 @@ void EmitPass::Div(const SSource sources[2], const DstModifier& modifier)
47494748
CVariable* src[2];
47504749
for (int i = 0; i < 2; ++i) src[i] = GetSrcVariable(sources[i]);
47514750

4752-
if (IGC_IS_FLAG_ENABLED(EnableVectorEmitter) && sources[0].value->getType()->isVectorTy() && sources[1].value->getType()->isVectorTy()) {
4751+
if (IGC_IS_FLAG_ENABLED(EnableVectorEmitter) &&
4752+
sources[0].value->getType()->isVectorTy() &&
4753+
sources[1].value->getType()->isVectorTy()) {
47534754

4754-
unsigned int VectorSize = 0;
4755-
if (llvm::isa<Instruction>(sources[0].value))
4756-
VectorSize = getVectorSize(llvm::cast<Instruction>(sources[0].value));
4755+
unsigned VectorSize = getVectorSize(sources[0].value);
47574756

4758-
for (unsigned int i = 0; i < VectorSize; ++i) {
4757+
for (unsigned i = 0; i < VectorSize; ++i) {
47594758
SetSourceModifiers(0, sources[0]);
47604759
SetSourceModifiers(1, sources[1]);
47614760

@@ -4780,15 +4779,13 @@ void EmitPass::Inv(const SSource sources[2], const DstModifier& modifier) {
47804779
sources[0].value->getType()->isVectorTy() &&
47814780
sources[1].value->getType()->isVectorTy()) {
47824781

4783-
unsigned int VectorSize = 0;
4784-
if (llvm::isa<Value>(sources[0].value))
4785-
VectorSize = getVectorSize(llvm::cast<Value>(sources[0].value));
4782+
unsigned VectorSize = getVectorSize(sources[0].value);
47864783

47874784
CVariable* src[1];
47884785
// sources[0] got used to check that it contains all 1
47894786
src[0] = GetSrcVariable(sources[1]);
47904787

4791-
for (unsigned int i = 0; i < VectorSize; ++i) {
4788+
for (unsigned i = 0; i < VectorSize; ++i) {
47924789
SetSourceModifiers(0, sources[1]);
47934790

47944791
if (src[0]->IsUniform()) {
@@ -4812,11 +4809,9 @@ void EmitPass::VectorMad(const SSource sources[3], const DstModifier& modifier)
48124809
CVariable* src[3];
48134810
for (int i = 0; i < 3; ++i) src[i] = GetSrcVariable(sources[i]);
48144811

4815-
unsigned int VectorSize = 0;
4816-
if (llvm::isa<Instruction>(sources[0].value))
4817-
VectorSize = getVectorSize(llvm::cast<Instruction>(sources[0].value));
4812+
unsigned VectorSize = getVectorSize(sources[0].value);
48184813

4819-
for (unsigned int i = 0; i < VectorSize; ++i) {
4814+
for (unsigned i = 0; i < VectorSize; ++i) {
48204815

48214816
SetSourceModifiers(0, sources[0]);
48224817
SetSourceModifiers(1, sources[1]);

‎IGC/Compiler/CodeGenContext.cpp‎

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/*========================== begin_copyright_notice ============================
22
3-
Copyright (C) 2018-2022 Intel Corporation
3+
Copyright (C) 2018-2025 Intel Corporation
44
55
SPDX-License-Identifier: MIT
66
@@ -828,6 +828,9 @@ namespace IGC
828828

829829
void CodeGenContext::EmitWarning(const char* warningstr, const llvm::Value* context)
830830
{
831+
if (IGC_IS_FLAG_ENABLED(DisableWarnings))
832+
return;
833+
831834
this->oclWarningMessage << "\nwarning: ";
832835
EmitMessage(this->oclWarningMessage, warningstr, context);
833836
this->oclWarningMessage << "\n";

‎IGC/Compiler/MetaDataApi/SpirMetaDataApi.h‎

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -920,12 +920,6 @@ namespace IGC::SPIRMD
920920
{
921921
m_pModule->eraseNamedMetadata(OpenCLVersionsNode);
922922
}
923-
924-
llvm::NamedMDNode* SPIRVExtensionsNode = m_pModule->getNamedMetadata("igc.spirv.extensions");
925-
if (SPIRVExtensionsNode)
926-
{
927-
m_pModule->eraseNamedMetadata(SPIRVExtensionsNode);
928-
}
929923
}
930924

931925
private:

‎IGC/Compiler/Optimizer/OpenCLPasses/CMakeLists.txt‎

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
#=========================== begin_copyright_notice ============================
22
#
3-
# Copyright (C) 2017-2024 Intel Corporation
3+
# Copyright (C) 2025 Intel Corporation
44
#
55
# SPDX-License-Identifier: MIT
66
#
@@ -37,6 +37,7 @@ add_subdirectory(Decompose2DBlockFuncs)
3737
add_subdirectory(LocalBuffers)
3838
add_subdirectory(MinimumValidAddressChecking)
3939
add_subdirectory(NamedBarriers)
40+
add_subdirectory(ManageableBarriers)
4041
add_subdirectory(NontemporalLoadsAndStoresInAssert)
4142
add_subdirectory(OpenCLPrintf)
4243
add_subdirectory(PoisonFP64KernelsPass)
@@ -90,6 +91,7 @@ set(IGC_BUILD__SRC__Optimizer_OpenCLPasses_All
9091
${IGC_BUILD__SRC__OpenCLPasses_LocalBuffers}
9192
${IGC_BUILD__SRC__OpenCLPasses_MinimumValidAddressChecking}
9293
${IGC_BUILD__SRC__OpenCLPasses_NamedBarriers}
94+
${IGC_BUILD__SRC__OpenCLPasses_ManageableBarriers}
9395
${IGC_BUILD__SRC__OpenCLPasses_NontemporalLoadsAndStoresInAssert}
9496
${IGC_BUILD__SRC__OpenCLPasses_OpenCLPrintf}
9597
${IGC_BUILD__SRC__OpenCLPasses_PoisonFP64KernelsPass}
@@ -149,6 +151,7 @@ set(IGC_BUILD__HDR__Optimizer_OpenCLPasses_All
149151
${IGC_BUILD__HDR__OpenCLPasses_LocalBuffers}
150152
${IGC_BUILD__HDR__OpenCLPasses_MinimumValidAddressChecking}
151153
${IGC_BUILD__HDR__OpenCLPasses_NamedBarriers}
154+
${IGC_BUILD__HDR__OpenCLPasses_ManageableBarriers}
152155
${IGC_BUILD__HDR__OpenCLPasses_NontemporalLoadsAndStoresInAssert}
153156
${IGC_BUILD__HDR__OpenCLPasses_OpenCLPrintf}
154157
${IGC_BUILD__HDR__OpenCLPasses_PrivateMemory}
@@ -208,6 +211,7 @@ set(IGC_BUILD_Compiler_OpenCLPasses_Groups
208211
Compiler__OpenCLPasses_LocalBuffers
209212
Compiler__OpenCLPasses_MinimumValidAddressChecking
210213
Compiler__OpenCLPasses_NamedBarriers
214+
Compiler__OpenCLPasses_ManageableBarriers
211215
Compiler__OpenCLPasses_NontemporalLoadsAndStoresInAssert
212216
Compiler__OpenCLPasses_OpenCLPrintf
213217
Compiler__OpenCLPasses_PoisonFP64KernelsPass

‎IGC/Compiler/Optimizer/OpenCLPasses/ManageableBarriers/CMakeLists.txt‎

Lines changed: 29 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,29 @@
1+
#=========================== begin_copyright_notice ============================
2+
#
3+
# Copyright (C) 2020-2025 Intel Corporation
4+
#
5+
# SPDX-License-Identifier: MIT
6+
#
7+
#============================ end_copyright_notice =============================
8+
9+
include_directories("${CMAKE_CURRENT_SOURCE_DIR}")
10+
11+
12+
set(IGC_BUILD__SRC__ManageableBarriers
13+
"${CMAKE_CURRENT_SOURCE_DIR}/ManageableBarriersResolution.cpp"
14+
)
15+
set(IGC_BUILD__SRC__OpenCLPasses_ManageableBarriers ${IGC_BUILD__SRC__ManageableBarriers} PARENT_SCOPE)
16+
17+
set(IGC_BUILD__HDR__ManageableBarriers
18+
"${CMAKE_CURRENT_SOURCE_DIR}/ManageableBarriersResolution.hpp"
19+
)
20+
set(IGC_BUILD__HDR__OpenCLPasses_ManageableBarriers ${IGC_BUILD__HDR__ManageableBarriers} PARENT_SCOPE)
21+
22+
23+
igc_sg_register(
24+
Compiler__OpenCLPasses_ManageableBarriers
25+
"ManageableBarriers"
26+
FILES
27+
${IGC_BUILD__SRC__ManageableBarriers}
28+
${IGC_BUILD__HDR__ManageableBarriers}
29+
)

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