1111// XFAIL: esimd_emulator
1212// RUN: %{build} -fno-sycl-esimd-force-stateless-mem -o %t1.out
1313// RUN: %{run} %t1.out
14- // RUN: %{build} -DNEW_API -fno-sycl-esimd-force-stateless-mem -o %t2.out
15- // RUN: %{run} %t2.out
1614
1715// The test checks raw send functionality with block read/write implementation
1816// on SKL. It does not work on DG1 due to send instruction incompatibility.
@@ -42,13 +40,8 @@ ESIMD_INLINE simd<T, N> dwaligned_block_read(AccessorTy acc,
4240 constexpr uint8_t sfid = 0x0 ;
4341 constexpr uint8_t numSrc0 = 0x1 ;
4442 constexpr uint8_t numDst = 0x2 ;
45- #ifdef NEW_API
4643 return experimental::esimd::raw_send (oldDst, src0, exDesc, desc, execSize,
4744 sfid, numSrc0, numDst);
48- #else
49- return experimental::esimd::raw_send_load (oldDst, src0, exDesc, desc,
50- execSize, sfid, numSrc0, numDst);
51- #endif
5245}
5346
5447template <typename T, int N, typename AccessorTy>
@@ -64,13 +57,8 @@ ESIMD_INLINE void block_write1(AccessorTy acc, unsigned int offset,
6457 constexpr uint8_t sfid = 0x0 ;
6558 constexpr uint8_t numSrc0 = 0x1 ;
6659 constexpr uint8_t numSrc1 = 0x1 ;
67- #ifdef NEW_API
6860 return experimental::esimd::raw_sends (src0, data, exDesc, desc, execSize,
6961 sfid, numSrc0, numSrc1);
70- #else
71- return experimental::esimd::raw_sends_store (src0, data, exDesc, desc,
72- execSize, sfid, numSrc0, numSrc1);
73- #endif
7462}
7563
7664template <typename T, int N, typename AccessorTy>
@@ -89,13 +77,8 @@ ESIMD_INLINE void block_write2(AccessorTy acc, unsigned int offset,
8977 constexpr uint8_t execSize = 0x83 ;
9078 constexpr uint8_t sfid = 0x0 ;
9179 constexpr uint8_t numSrc0 = 0x2 ;
92- #ifdef NEW_API
9380 return experimental::esimd::raw_send (src0, exDesc, desc, execSize, sfid,
9481 numSrc0);
95- #else
96- return experimental::esimd::raw_send_store (src0, exDesc, desc, execSize, sfid,
97- numSrc0);
98- #endif
9982}
10083
10184template <typename T> int test (queue q) {
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