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Copy file name to clipboardExpand all lines: sycl/doc/extensions/ExplicitSIMD/README.md
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@@ -6,7 +6,7 @@ yet allows to write explicitly vectorized device code. This helps programmer to
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have more control over the generated code and depend less on compiler
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optimizations. The [specification](https://github.com/intel/llvm/blob/sycl/sycl/doc/extensions/ExplicitSIMD/dpcpp-explicit-simd.md),
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[documented ESIMD APIs headers](https://github.com/intel/llvm/tree/sycl/sycl/include/CL/sycl/INTEL/esimd) and
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[working code examples](https://github.com/intel/llvm/blob/sycl/sycl/test/esimd/on-device) are available on the Intel DPC++ project's github.
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[working code examples](https://github.com/intel/llvm-test-suite/tree/intel/SYCL/ESIMD) are available on the Intel DPC++ project's github.
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**_NOTE:_**_This extension is under active development and lots of APIs are
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subject to change. There are currenly a number of restrictions specified
@@ -53,7 +53,7 @@ kernel is a ESIMD one and ESIMD APIs can be used inside it. Here the `simd`
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objects and `block_load`/`block_store` intrinsics are used which are avaiable
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