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[CodeGen] Add lround/llround builtins
This patch add the ISD::LROUND and ISD::LLROUND along with new intrinsics. The changes are straightforward as for other floating-point rounding functions, with just some adjustments required to handle the return value being an interger. The idea is to optimize lround/llround generation for AArch64 in a subsequent patch. Current semantic is just route it to libm symbol. llvm-svn: 360889
1 parent 2120748 commit 73643b5

24 files changed

+883
-0
lines changed

Diff for: ‎llvm/docs/LangRef.rst

+75
Original file line numberDiff line numberDiff line change
@@ -12344,6 +12344,81 @@ Semantics:
1234412344
This function returns the same values as the libm ``round``
1234512345
functions would, and handles error conditions in the same way.
1234612346

12347+
'``llvm.lround.*``' Intrinsic
12348+
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
12349+
12350+
Syntax:
12351+
"""""""
12352+
12353+
This is an overloaded intrinsic. You can use ``llvm.lround`` on any
12354+
floating-point type. Not all targets support all types however.
12355+
12356+
::
12357+
12358+
declare i32 @llvm.lround.i32.f32(float %Val)
12359+
declare i32 @llvm.lround.i32.f64(double %Val)
12360+
declare i32 @llvm.lround.i32.f80(float %Val)
12361+
declare i32 @llvm.lround.i32.f128(double %Val)
12362+
declare i32 @llvm.lround.i32.ppcf128(double %Val)
12363+
12364+
declare i64 @llvm.lround.i64.f32(float %Val)
12365+
declare i64 @llvm.lround.i64.f64(double %Val)
12366+
declare i64 @llvm.lround.i64.f80(float %Val)
12367+
declare i64 @llvm.lround.i64.f128(double %Val)
12368+
declare i64 @llvm.lround.i64.ppcf128(double %Val)
12369+
12370+
Overview:
12371+
"""""""""
12372+
12373+
The '``llvm.lround.*``' intrinsics returns the operand rounded to the
12374+
nearest integer.
12375+
12376+
Arguments:
12377+
""""""""""
12378+
12379+
The argument is a floating-point number and return is i32 for
12380+
``llvm.lround.i32`` and i64 for ``llvm.lround.i64``.
12381+
12382+
Semantics:
12383+
""""""""""
12384+
12385+
This function returns the same values as the libm ``lround``
12386+
functions would, but without setting errno.
12387+
12388+
'``llvm.llround.*``' Intrinsic
12389+
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
12390+
12391+
Syntax:
12392+
"""""""
12393+
12394+
This is an overloaded intrinsic. You can use ``llvm.llround`` on any
12395+
floating-point type. Not all targets support all types however.
12396+
12397+
::
12398+
12399+
declare i64 @llvm.lround.f32(float %Val)
12400+
declare i64 @llvm.lround.f64(double %Val)
12401+
declare i64 @llvm.lround.f80(float %Val)
12402+
declare i64 @llvm.lround.f128(double %Val)
12403+
declare i64 @llvm.lround.ppcf128(double %Val)
12404+
12405+
Overview:
12406+
"""""""""
12407+
12408+
The '``llvm.llround.*``' intrinsics returns the operand rounded to the
12409+
nearest integer.
12410+
12411+
Arguments:
12412+
""""""""""
12413+
12414+
The argument is a floating-point number and return is i64.
12415+
12416+
Semantics:
12417+
""""""""""
12418+
12419+
This function returns the same values as the libm ``llround``
12420+
functions would, but without setting errno.
12421+
1234712422
Bit Manipulation Intrinsics
1234812423
---------------------------
1234912424

Diff for: ‎llvm/include/llvm/CodeGen/ISDOpcodes.h

+2
Original file line numberDiff line numberDiff line change
@@ -605,6 +605,8 @@ namespace ISD {
605605
FNEG, FABS, FSQRT, FCBRT, FSIN, FCOS, FPOWI, FPOW,
606606
FLOG, FLOG2, FLOG10, FEXP, FEXP2,
607607
FCEIL, FTRUNC, FRINT, FNEARBYINT, FROUND, FFLOOR,
608+
LROUND, LLROUND,
609+
608610
/// FMINNUM/FMAXNUM - Perform floating-point minimum or maximum on two
609611
/// values.
610612
//

Diff for: ‎llvm/include/llvm/IR/Intrinsics.td

+4
Original file line numberDiff line numberDiff line change
@@ -538,6 +538,10 @@ let IntrProperties = [IntrNoMem, IntrSpeculatable] in {
538538
def int_round : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>]>;
539539
def int_canonicalize : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>],
540540
[IntrNoMem]>;
541+
542+
def int_lround_i32 : Intrinsic<[llvm_i32_ty], [llvm_anyfloat_ty]>;
543+
def int_lround_i64 : Intrinsic<[llvm_i64_ty], [llvm_anyfloat_ty]>;
544+
def int_llround : Intrinsic<[llvm_i64_ty], [llvm_anyfloat_ty]>;
541545
}
542546

543547
def int_minnum : Intrinsic<[llvm_anyfloat_ty],

Diff for: ‎llvm/include/llvm/IR/RuntimeLibcalls.def

+10
Original file line numberDiff line numberDiff line change
@@ -254,6 +254,16 @@ HANDLE_LIBCALL(FMAX_F64, "fmax")
254254
HANDLE_LIBCALL(FMAX_F80, "fmaxl")
255255
HANDLE_LIBCALL(FMAX_F128, "fmaxl")
256256
HANDLE_LIBCALL(FMAX_PPCF128, "fmaxl")
257+
HANDLE_LIBCALL(LROUND_F32, "lroundf")
258+
HANDLE_LIBCALL(LROUND_F64, "lround")
259+
HANDLE_LIBCALL(LROUND_F80, "lroundl")
260+
HANDLE_LIBCALL(LROUND_F128, "lroundl")
261+
HANDLE_LIBCALL(LROUND_PPCF128, "lroundl")
262+
HANDLE_LIBCALL(LLROUND_F32, "llroundf")
263+
HANDLE_LIBCALL(LLROUND_F64, "llround")
264+
HANDLE_LIBCALL(LLROUND_F80, "llroundl")
265+
HANDLE_LIBCALL(LLROUND_F128, "llroundl")
266+
HANDLE_LIBCALL(LLROUND_PPCF128, "llroundl")
257267

258268
// Conversion
259269
HANDLE_LIBCALL(FPEXT_F32_PPCF128, "__gcc_stoq")

Diff for: ‎llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

+39
Original file line numberDiff line numberDiff line change
@@ -149,6 +149,10 @@ class SelectionDAGLegalize {
149149
RTLIB::Libcall Call_I32,
150150
RTLIB::Libcall Call_I64,
151151
RTLIB::Libcall Call_I128);
152+
SDValue ExpandArgFPLibCall(SDNode *Node,
153+
RTLIB::Libcall Call_F32, RTLIB::Libcall Call_F64,
154+
RTLIB::Libcall Call_F80, RTLIB::Libcall Call_F128,
155+
RTLIB::Libcall Call_PPCF128);
152156
void ExpandDivRemLibCall(SDNode *Node, SmallVectorImpl<SDValue> &Results);
153157
void ExpandSinCosLibCall(SDNode *Node, SmallVectorImpl<SDValue> &Results);
154158

@@ -997,6 +1001,8 @@ void SelectionDAGLegalize::LegalizeOp(SDNode *Node) {
9971001
case ISD::SINT_TO_FP:
9981002
case ISD::UINT_TO_FP:
9991003
case ISD::EXTRACT_VECTOR_ELT:
1004+
case ISD::LROUND:
1005+
case ISD::LLROUND:
10001006
Action = TLI.getOperationAction(Node->getOpcode(),
10011007
Node->getOperand(0).getValueType());
10021008
break;
@@ -2153,6 +2159,27 @@ SDValue SelectionDAGLegalize::ExpandIntLibCall(SDNode* Node, bool isSigned,
21532159
return ExpandLibCall(LC, Node, isSigned);
21542160
}
21552161

2162+
/// Expand the node to a libcall based on first argument type (for instance
2163+
/// lround and its variant).
2164+
SDValue SelectionDAGLegalize::ExpandArgFPLibCall(SDNode* Node,
2165+
RTLIB::Libcall Call_F32,
2166+
RTLIB::Libcall Call_F64,
2167+
RTLIB::Libcall Call_F80,
2168+
RTLIB::Libcall Call_F128,
2169+
RTLIB::Libcall Call_PPCF128) {
2170+
RTLIB::Libcall LC;
2171+
switch (Node->getOperand(0).getValueType().getSimpleVT().SimpleTy) {
2172+
default: llvm_unreachable("Unexpected request for libcall!");
2173+
case MVT::f32: LC = Call_F32; break;
2174+
case MVT::f64: LC = Call_F64; break;
2175+
case MVT::f80: LC = Call_F80; break;
2176+
case MVT::f128: LC = Call_F128; break;
2177+
case MVT::ppcf128: LC = Call_PPCF128; break;
2178+
}
2179+
2180+
return ExpandLibCall(LC, Node, false);
2181+
}
2182+
21562183
/// Issue libcalls to __{u}divmod to compute div / rem pairs.
21572184
void
21582185
SelectionDAGLegalize::ExpandDivRemLibCall(SDNode *Node,
@@ -2878,6 +2905,18 @@ bool SelectionDAGLegalize::ExpandNode(SDNode *Node) {
28782905
if (TLI.expandFP_TO_UINT(Node, Tmp1, DAG))
28792906
Results.push_back(Tmp1);
28802907
break;
2908+
case ISD::LROUND:
2909+
Results.push_back(ExpandArgFPLibCall(Node, RTLIB::LROUND_F32,
2910+
RTLIB::LROUND_F64, RTLIB::LROUND_F80,
2911+
RTLIB::LROUND_F128,
2912+
RTLIB::LROUND_PPCF128));
2913+
break;
2914+
case ISD::LLROUND:
2915+
Results.push_back(ExpandArgFPLibCall(Node, RTLIB::LLROUND_F32,
2916+
RTLIB::LLROUND_F64, RTLIB::LLROUND_F80,
2917+
RTLIB::LLROUND_F128,
2918+
RTLIB::LLROUND_PPCF128));
2919+
break;
28812920
case ISD::VAARG:
28822921
Results.push_back(DAG.expandVAArg(Node));
28832922
Results.push_back(Results[0].getValue(1));

Diff for: ‎llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp

+55
Original file line numberDiff line numberDiff line change
@@ -772,6 +772,8 @@ bool DAGTypeLegalizer::SoftenFloatOperand(SDNode *N, unsigned OpNo) {
772772
case ISD::FP_ROUND: Res = SoftenFloatOp_FP_ROUND(N); break;
773773
case ISD::FP_TO_SINT:
774774
case ISD::FP_TO_UINT: Res = SoftenFloatOp_FP_TO_XINT(N); break;
775+
case ISD::LROUND: Res = SoftenFloatOp_LROUND(N); break;
776+
case ISD::LLROUND: Res = SoftenFloatOp_LLROUND(N); break;
775777
case ISD::SELECT: Res = SoftenFloatOp_SELECT(N); break;
776778
case ISD::SELECT_CC: Res = SoftenFloatOp_SELECT_CC(N); break;
777779
case ISD::SETCC: Res = SoftenFloatOp_SETCC(N); break;
@@ -1038,6 +1040,33 @@ SDValue DAGTypeLegalizer::SoftenFloatOp_STORE(SDNode *N, unsigned OpNo) {
10381040
ST->getMemOperand());
10391041
}
10401042

1043+
SDValue DAGTypeLegalizer::SoftenFloatOp_LROUND(SDNode *N) {
1044+
EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1045+
1046+
SDValue Op = GetSoftenedFloat(N->getOperand(0));
1047+
EVT RetVT = N->getOperand(0).getValueType().getSimpleVT().SimpleTy;
1048+
return TLI.makeLibCall(DAG, GetFPLibCall(RetVT,
1049+
RTLIB::LROUND_F32,
1050+
RTLIB::LROUND_F64,
1051+
RTLIB::LROUND_F80,
1052+
RTLIB::LROUND_F128,
1053+
RTLIB::LROUND_PPCF128),
1054+
NVT, Op, false, SDLoc(N)).first;
1055+
}
1056+
1057+
SDValue DAGTypeLegalizer::SoftenFloatOp_LLROUND(SDNode *N) {
1058+
EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1059+
1060+
SDValue Op = GetSoftenedFloat(N->getOperand(0));
1061+
EVT RetVT = N->getOperand(0).getValueType().getSimpleVT().SimpleTy;
1062+
return TLI.makeLibCall(DAG, GetFPLibCall(RetVT,
1063+
RTLIB::LLROUND_F32,
1064+
RTLIB::LLROUND_F64,
1065+
RTLIB::LLROUND_F80,
1066+
RTLIB::LLROUND_F128,
1067+
RTLIB::LLROUND_PPCF128),
1068+
NVT, Op, false, SDLoc(N)).first;
1069+
}
10411070

10421071
//===----------------------------------------------------------------------===//
10431072
// Float Result Expansion
@@ -1571,6 +1600,8 @@ bool DAGTypeLegalizer::ExpandFloatOperand(SDNode *N, unsigned OpNo) {
15711600
case ISD::FP_ROUND: Res = ExpandFloatOp_FP_ROUND(N); break;
15721601
case ISD::FP_TO_SINT: Res = ExpandFloatOp_FP_TO_SINT(N); break;
15731602
case ISD::FP_TO_UINT: Res = ExpandFloatOp_FP_TO_UINT(N); break;
1603+
case ISD::LROUND: Res = ExpandFloatOp_LROUND(N); break;
1604+
case ISD::LLROUND: Res = ExpandFloatOp_LLROUND(N); break;
15741605
case ISD::SELECT_CC: Res = ExpandFloatOp_SELECT_CC(N); break;
15751606
case ISD::SETCC: Res = ExpandFloatOp_SETCC(N); break;
15761607
case ISD::STORE: Res = ExpandFloatOp_STORE(cast<StoreSDNode>(N),
@@ -1741,6 +1772,30 @@ SDValue DAGTypeLegalizer::ExpandFloatOp_STORE(SDNode *N, unsigned OpNo) {
17411772
ST->getMemoryVT(), ST->getMemOperand());
17421773
}
17431774

1775+
SDValue DAGTypeLegalizer::ExpandFloatOp_LROUND(SDNode *N) {
1776+
EVT RVT = N->getValueType(0);
1777+
EVT RetVT = N->getOperand(0).getValueType().getSimpleVT().SimpleTy;
1778+
return TLI.makeLibCall(DAG, GetFPLibCall(RetVT,
1779+
RTLIB::LROUND_F32,
1780+
RTLIB::LROUND_F64,
1781+
RTLIB::LROUND_F80,
1782+
RTLIB::LROUND_F128,
1783+
RTLIB::LROUND_PPCF128),
1784+
RVT, N->getOperand(0), false, SDLoc(N)).first;
1785+
}
1786+
1787+
SDValue DAGTypeLegalizer::ExpandFloatOp_LLROUND(SDNode *N) {
1788+
EVT RVT = N->getValueType(0);
1789+
EVT RetVT = N->getOperand(0).getValueType().getSimpleVT().SimpleTy;
1790+
return TLI.makeLibCall(DAG, GetFPLibCall(RetVT,
1791+
RTLIB::LLROUND_F32,
1792+
RTLIB::LLROUND_F64,
1793+
RTLIB::LLROUND_F80,
1794+
RTLIB::LLROUND_F128,
1795+
RTLIB::LLROUND_PPCF128),
1796+
RVT, N->getOperand(0), false, SDLoc(N)).first;
1797+
}
1798+
17441799
//===----------------------------------------------------------------------===//
17451800
// Float Operand Promotion
17461801
//===----------------------------------------------------------------------===//

Diff for: ‎llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp

+27
Original file line numberDiff line numberDiff line change
@@ -1600,6 +1600,7 @@ void DAGTypeLegalizer::ExpandIntegerResult(SDNode *N, unsigned ResNo) {
16001600
case ISD::FLT_ROUNDS_: ExpandIntRes_FLT_ROUNDS(N, Lo, Hi); break;
16011601
case ISD::FP_TO_SINT: ExpandIntRes_FP_TO_SINT(N, Lo, Hi); break;
16021602
case ISD::FP_TO_UINT: ExpandIntRes_FP_TO_UINT(N, Lo, Hi); break;
1603+
case ISD::LLROUND: ExpandIntRes_LLROUND(N, Lo, Hi); break;
16031604
case ISD::LOAD: ExpandIntRes_LOAD(cast<LoadSDNode>(N), Lo, Hi); break;
16041605
case ISD::MUL: ExpandIntRes_MUL(N, Lo, Hi); break;
16051606
case ISD::READCYCLECOUNTER: ExpandIntRes_READCYCLECOUNTER(N, Lo, Hi); break;
@@ -2465,6 +2466,32 @@ void DAGTypeLegalizer::ExpandIntRes_FP_TO_UINT(SDNode *N, SDValue &Lo,
24652466
Lo, Hi);
24662467
}
24672468

2469+
void DAGTypeLegalizer::ExpandIntRes_LLROUND(SDNode *N, SDValue &Lo,
2470+
SDValue &Hi) {
2471+
RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
2472+
EVT VT = N->getOperand(0).getValueType().getSimpleVT().SimpleTy;
2473+
if (VT == MVT::f32)
2474+
LC = RTLIB::LLROUND_F32;
2475+
else if (VT == MVT::f64)
2476+
LC = RTLIB::LLROUND_F64;
2477+
else if (VT == MVT::f80)
2478+
LC = RTLIB::LLROUND_F80;
2479+
else if (VT == MVT::f128)
2480+
LC = RTLIB::LLROUND_F128;
2481+
else if (VT == MVT::ppcf128)
2482+
LC = RTLIB::LLROUND_PPCF128;
2483+
assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unexpected llround input type!");
2484+
2485+
SDValue Op = N->getOperand(0);
2486+
if (getTypeAction(Op.getValueType()) == TargetLowering::TypePromoteFloat)
2487+
Op = GetPromotedFloat(Op);
2488+
2489+
SDLoc dl(N);
2490+
EVT RetVT = N->getValueType(0);
2491+
SplitInteger(TLI.makeLibCall(DAG, LC, RetVT, Op, true/*irrelevant*/, dl).first,
2492+
Lo, Hi);
2493+
}
2494+
24682495
void DAGTypeLegalizer::ExpandIntRes_LOAD(LoadSDNode *N,
24692496
SDValue &Lo, SDValue &Hi) {
24702497
if (ISD::isNormalLoad(N)) {

Diff for: ‎llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h

+5
Original file line numberDiff line numberDiff line change
@@ -418,6 +418,7 @@ class LLVM_LIBRARY_VISIBILITY DAGTypeLegalizer {
418418
void ExpandIntRes_FLT_ROUNDS (SDNode *N, SDValue &Lo, SDValue &Hi);
419419
void ExpandIntRes_FP_TO_SINT (SDNode *N, SDValue &Lo, SDValue &Hi);
420420
void ExpandIntRes_FP_TO_UINT (SDNode *N, SDValue &Lo, SDValue &Hi);
421+
void ExpandIntRes_LLROUND (SDNode *N, SDValue &Lo, SDValue &Hi);
421422

422423
void ExpandIntRes_Logical (SDNode *N, SDValue &Lo, SDValue &Hi);
423424
void ExpandIntRes_ADDSUB (SDNode *N, SDValue &Lo, SDValue &Hi);
@@ -553,6 +554,8 @@ class LLVM_LIBRARY_VISIBILITY DAGTypeLegalizer {
553554
SDValue SoftenFloatOp_FP_EXTEND(SDNode *N);
554555
SDValue SoftenFloatOp_FP_ROUND(SDNode *N);
555556
SDValue SoftenFloatOp_FP_TO_XINT(SDNode *N);
557+
SDValue SoftenFloatOp_LROUND(SDNode *N);
558+
SDValue SoftenFloatOp_LLROUND(SDNode *N);
556559
SDValue SoftenFloatOp_SELECT(SDNode *N);
557560
SDValue SoftenFloatOp_SELECT_CC(SDNode *N);
558561
SDValue SoftenFloatOp_SETCC(SDNode *N);
@@ -612,6 +615,8 @@ class LLVM_LIBRARY_VISIBILITY DAGTypeLegalizer {
612615
SDValue ExpandFloatOp_FP_ROUND(SDNode *N);
613616
SDValue ExpandFloatOp_FP_TO_SINT(SDNode *N);
614617
SDValue ExpandFloatOp_FP_TO_UINT(SDNode *N);
618+
SDValue ExpandFloatOp_LROUND(SDNode *N);
619+
SDValue ExpandFloatOp_LLROUND(SDNode *N);
615620
SDValue ExpandFloatOp_SELECT_CC(SDNode *N);
616621
SDValue ExpandFloatOp_SETCC(SDNode *N);
617622
SDValue ExpandFloatOp_STORE(SDNode *N, unsigned OpNo);

Diff for: ‎llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

+16
Original file line numberDiff line numberDiff line change
@@ -6025,6 +6025,22 @@ SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, unsigned Intrinsic) {
60256025
getValue(I.getArgOperand(0))));
60266026
return nullptr;
60276027
}
6028+
case Intrinsic::lround_i32:
6029+
case Intrinsic::lround_i64:
6030+
case Intrinsic::llround: {
6031+
unsigned Opcode;
6032+
MVT RetVT;
6033+
switch (Intrinsic) {
6034+
default: llvm_unreachable("Impossible intrinsic"); // Can't reach here.
6035+
case Intrinsic::lround_i32: Opcode = ISD::LROUND; RetVT = MVT::i32; break;
6036+
case Intrinsic::lround_i64: Opcode = ISD::LROUND; RetVT = MVT::i64; break;
6037+
case Intrinsic::llround: Opcode = ISD::LLROUND; RetVT = MVT::i64; break;
6038+
}
6039+
6040+
setValue(&I, DAG.getNode(Opcode, sdl, RetVT,
6041+
getValue(I.getArgOperand(0))));
6042+
return nullptr;
6043+
}
60286044
case Intrinsic::minnum: {
60296045
auto VT = getValue(I.getArgOperand(0)).getValueType();
60306046
unsigned Opc =

Diff for: ‎llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp

+2
Original file line numberDiff line numberDiff line change
@@ -328,6 +328,8 @@ std::string SDNode::getOperationName(const SelectionDAG *G) const {
328328
case ISD::ADDRSPACECAST: return "addrspacecast";
329329
case ISD::FP16_TO_FP: return "fp16_to_fp";
330330
case ISD::FP_TO_FP16: return "fp_to_fp16";
331+
case ISD::LROUND: return "lround";
332+
case ISD::LLROUND: return "llround";
331333

332334
// Control flow instructions
333335
case ISD::BR: return "br";

Diff for: ‎llvm/lib/CodeGen/TargetLoweringBase.cpp

+2
Original file line numberDiff line numberDiff line change
@@ -710,6 +710,8 @@ void TargetLoweringBase::initActions() {
710710
setOperationAction(ISD::FRINT, VT, Expand);
711711
setOperationAction(ISD::FTRUNC, VT, Expand);
712712
setOperationAction(ISD::FROUND, VT, Expand);
713+
setOperationAction(ISD::LROUND, VT, Expand);
714+
setOperationAction(ISD::LLROUND, VT, Expand);
713715
}
714716

715717
// Default ISD::TRAP to expand (which turns it into abort).

Diff for: ‎llvm/lib/Target/X86/X86ISelLowering.cpp

+2
Original file line numberDiff line numberDiff line change
@@ -672,6 +672,8 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
672672
setOperationAction(ISD::FRINT, MVT::f80, Expand);
673673
setOperationAction(ISD::FNEARBYINT, MVT::f80, Expand);
674674
setOperationAction(ISD::FMA, MVT::f80, Expand);
675+
setOperationAction(ISD::LROUND, MVT::f80, Expand);
676+
setOperationAction(ISD::LLROUND, MVT::f80, Expand);
675677
}
676678

677679
// Always use a library call for pow.

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